X-Git-Url: http://plrg.eecs.uci.edu/git/?p=oota-llvm.git;a=blobdiff_plain;f=test%2FCodeGen%2FX86%2Fextractelement-load.ll;h=8647599769361751e044c38b3dd900078b10bff8;hp=06d739ceed9ee5374bca7b8463d5d197693b3041;hb=44efa200e23c54ece92cdff8f505d7014c5178b9;hpb=ed4b4272ba2c2ff68f839738ba8147c3606d8885 diff --git a/test/CodeGen/X86/extractelement-load.ll b/test/CodeGen/X86/extractelement-load.ll index 06d739ceed9..86475997693 100644 --- a/test/CodeGen/X86/extractelement-load.ll +++ b/test/CodeGen/X86/extractelement-load.ll @@ -1,8 +1,10 @@ ; RUN: llc < %s -march=x86 -mattr=+sse2 -mcpu=yonah | FileCheck %s ; RUN: llc < %s -march=x86-64 -mattr=+sse2 -mcpu=core2 | FileCheck %s +target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128" + define i32 @t(<2 x i64>* %val) nounwind { -; CHECK: t: +; CHECK-LABEL: t: ; CHECK-NOT: movd ; CHECK: movl 8( ; CHECK-NEXT: ret @@ -15,7 +17,7 @@ define i32 @t(<2 x i64>* %val) nounwind { ; Case where extractelement of load ends up as undef. ; (Making sure this doesn't crash.) define i32 @t2(<8 x i32>* %xp) { -; CHECK: t2: +; CHECK-LABEL: t2: ; CHECK: ret %x = load <8 x i32>* %xp %Shuff68 = shufflevector <8 x i32> %x, <8 x i32> undef, <8 x i32> %y = extractelement <8 x i32> %Shuff68, i32 0 ret i32 %y } + +; This case could easily end up inf-looping in the DAG combiner due to an +; low alignment load of the vector which prevents us from reliably forming a +; narrow load. +; FIXME: It would be nice to detect whether the target has fast and legal +; unaligned loads and use them here. +define void @t3() { +; CHECK-LABEL: t3: +; +; This movs the entire vector, shuffling the high double down. If we fixed the +; FIXME above it would just move the high double directly. +; CHECK: movupd +; CHECK: shufpd +; CHECK: movlpd + +bb: + %tmp13 = load <2 x double>* undef, align 1 + %.sroa.3.24.vec.extract = extractelement <2 x double> %tmp13, i32 1 + store double %.sroa.3.24.vec.extract, double* undef, align 8 + unreachable +} + +; Case where a load is unary shuffled, then bitcast (to a type with the same +; number of elements) before extractelement. +; This is testing for an assertion - the extraction was assuming that the undef +; second shuffle operand was a post-bitcast type instead of a pre-bitcast type. +define i64 @t4(<2 x double>* %a) { +; CHECK-LABEL: t4: +; CHECK: mov +; CHECK: ret + %b = load <2 x double>* %a, align 16 + %c = shufflevector <2 x double> %b, <2 x double> %b, <2 x i32> + %d = bitcast <2 x double> %c to <2 x i64> + %e = extractelement <2 x i64> %d, i32 1 + ret i64 %e +} +