X-Git-Url: http://plrg.eecs.uci.edu/git/?p=oota-llvm.git;a=blobdiff_plain;f=lib%2FTarget%2FX86%2FX86MCInstLower.cpp;h=4e0d594238c2ef09bed5961876b489354e03e779;hp=f01e86cf366ba63477f081cc82c17adcd97f4f78;hb=e1610162fb298e43a9bb1c94cadc0579ff31160d;hpb=f00b50b6efb368a24ad54e1f15504d77306035f8 diff --git a/lib/Target/X86/X86MCInstLower.cpp b/lib/Target/X86/X86MCInstLower.cpp index f01e86cf366..4e0d594238c 100644 --- a/lib/Target/X86/X86MCInstLower.cpp +++ b/lib/Target/X86/X86MCInstLower.cpp @@ -264,7 +264,8 @@ MCOperand X86MCInstLower::LowerSymbolOperand(const MachineOperand &MO, Expr = MCBinaryExpr::CreateSub(Expr, MCSymbolRefExpr::Create(MF.getPICBaseSymbol(), Ctx), Ctx); - if (MO.isJTI() && MAI.hasSetDirective()) { + if (MO.isJTI()) { + assert(MAI.doesSetDirectiveSuppressesReloc()); // If .set directive is supported, use it to reduce the number of // relocations the assembler will generate for differences between // local labels. This is only safe when the symbols are in the same @@ -864,25 +865,23 @@ PrevCrossBBInst(MachineBasicBlock::const_iterator MBBI) { return --MBBI; } -static const Constant *getShuffleMaskConstant(const MachineInstr &MI, - const MachineOperand &DstOp, - const MachineOperand &SrcOp, - const MachineOperand &MaskOp) { - if (!MaskOp.isCPI()) +static const Constant *getConstantFromPool(const MachineInstr &MI, + const MachineOperand &Op) { + if (!Op.isCPI()) return nullptr; ArrayRef Constants = MI.getParent()->getParent()->getConstantPool()->getConstants(); - const MachineConstantPoolEntry &MaskConstantEntry = - Constants[MaskOp.getIndex()]; + const MachineConstantPoolEntry &ConstantEntry = + Constants[Op.getIndex()]; // Bail if this is a machine constant pool entry, we won't be able to dig out // anything useful. - if (MaskConstantEntry.isMachineConstantPoolEntry()) + if (ConstantEntry.isMachineConstantPoolEntry()) return nullptr; - auto *C = dyn_cast(MaskConstantEntry.Val.ConstVal); - assert((!C || MaskConstantEntry.getType() == C->getType()) && + auto *C = dyn_cast(ConstantEntry.Val.ConstVal); + assert((!C || ConstantEntry.getType() == C->getType()) && "Expected a constant of the same type!"); return C; } @@ -1100,7 +1099,8 @@ void X86AsmPrinter::EmitInstruction(const MachineInstr *MI) { // a constant shuffle mask. We won't be able to do this at the MC layer // because the mask isn't an immediate. case X86::PSHUFBrm: - case X86::VPSHUFBrm: { + case X86::VPSHUFBrm: + case X86::VPSHUFBYrm: { if (!OutStreamer.isVerboseAsm()) break; assert(MI->getNumOperands() > 5 && @@ -1109,7 +1109,7 @@ void X86AsmPrinter::EmitInstruction(const MachineInstr *MI) { const MachineOperand &SrcOp = MI->getOperand(1); const MachineOperand &MaskOp = MI->getOperand(5); - if (auto *C = getShuffleMaskConstant(*MI, DstOp, SrcOp, MaskOp)) { + if (auto *C = getConstantFromPool(*MI, MaskOp)) { SmallVector Mask; DecodePSHUFBMask(C, Mask); if (!Mask.empty()) @@ -1129,7 +1129,7 @@ void X86AsmPrinter::EmitInstruction(const MachineInstr *MI) { const MachineOperand &SrcOp = MI->getOperand(1); const MachineOperand &MaskOp = MI->getOperand(5); - if (auto *C = getShuffleMaskConstant(*MI, DstOp, SrcOp, MaskOp)) { + if (auto *C = getConstantFromPool(*MI, MaskOp)) { SmallVector Mask; DecodeVPERMILPMask(C, Mask); if (!Mask.empty()) @@ -1137,9 +1137,93 @@ void X86AsmPrinter::EmitInstruction(const MachineInstr *MI) { } break; } + + // For loads from a constant pool to a vector register, print the constant + // loaded. + case X86::MOVAPDrm: + case X86::VMOVAPDrm: + case X86::VMOVAPDYrm: + case X86::MOVUPDrm: + case X86::VMOVUPDrm: + case X86::VMOVUPDYrm: + case X86::MOVAPSrm: + case X86::VMOVAPSrm: + case X86::VMOVAPSYrm: + case X86::MOVUPSrm: + case X86::VMOVUPSrm: + case X86::VMOVUPSYrm: + case X86::MOVDQArm: + case X86::VMOVDQArm: + case X86::VMOVDQAYrm: + case X86::MOVDQUrm: + case X86::VMOVDQUrm: + case X86::VMOVDQUYrm: + if (!OutStreamer.isVerboseAsm()) + break; + if (MI->getNumOperands() > 4) + if (auto *C = getConstantFromPool(*MI, MI->getOperand(4))) { + std::string Comment; + raw_string_ostream CS(Comment); + const MachineOperand &DstOp = MI->getOperand(0); + CS << X86ATTInstPrinter::getRegisterName(DstOp.getReg()) << " = "; + if (auto *CDS = dyn_cast(C)) { + CS << "["; + for (int i = 0, NumElements = CDS->getNumElements(); i < NumElements; ++i) { + if (i != 0) + CS << ","; + if (CDS->getElementType()->isIntegerTy()) + CS << CDS->getElementAsInteger(i); + else if (CDS->getElementType()->isFloatTy()) + CS << CDS->getElementAsFloat(i); + else if (CDS->getElementType()->isDoubleTy()) + CS << CDS->getElementAsDouble(i); + else + CS << "?"; + } + CS << "]"; + OutStreamer.AddComment(CS.str()); + } else if (auto *CV = dyn_cast(C)) { + CS << "<"; + for (int i = 0, NumOperands = CV->getNumOperands(); i < NumOperands; ++i) { + if (i != 0) + CS << ","; + Constant *COp = CV->getOperand(i); + if (isa(COp)) { + CS << "u"; + } else if (auto *CI = dyn_cast(COp)) { + CS << CI->getZExtValue(); + } else if (auto *CF = dyn_cast(COp)) { + SmallString<32> Str; + CF->getValueAPF().toString(Str); + CS << Str; + } else { + CS << "?"; + } + } + CS << ">"; + OutStreamer.AddComment(CS.str()); + } + } + break; } MCInst TmpInst; MCInstLowering.Lower(MI, TmpInst); + + // Stackmap shadows cannot include branch targets, so we can count the bytes + // in a call towards the shadow, but must ensure that the no thread returns + // in to the stackmap shadow. The only way to achieve this is if the call + // is at the end of the shadow. + if (MI->isCall()) { + // Count then size of the call towards the shadow + SMShadowTracker.count(TmpInst, getSubtargetInfo()); + // Then flush the shadow so that we fill with nops before the call, not + // after it. + SMShadowTracker.emitShadowPadding(OutStreamer, getSubtargetInfo()); + // Then emit the call + OutStreamer.EmitInstruction(TmpInst, getSubtargetInfo()); + return; + } + EmitAndCountInstruction(TmpInst); }