X-Git-Url: http://plrg.eecs.uci.edu/git/?p=oota-llvm.git;a=blobdiff_plain;f=lib%2FTarget%2FX86%2FX86CodeEmitter.cpp;h=0b8ac110149e7400cfdba261de949ac0fca249c6;hp=5f19edb4ab0b955af059084620ffaa280d18ea2c;hb=52b62de10063a15dfbcfb8b61504df826c76e03c;hpb=8844a0ba898a3a1db7f5fd91ecf6a5402e3d51a0 diff --git a/lib/Target/X86/X86CodeEmitter.cpp b/lib/Target/X86/X86CodeEmitter.cpp index 5f19edb4ab0..0b8ac110149 100644 --- a/lib/Target/X86/X86CodeEmitter.cpp +++ b/lib/Target/X86/X86CodeEmitter.cpp @@ -1,4 +1,11 @@ //===-- X86/X86CodeEmitter.cpp - Convert X86 code to machine code ---------===// +// +// The LLVM Compiler Infrastructure +// +// This file was developed by the LLVM research group and is distributed under +// the University of Illinois Open Source License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// // // This file contains the pass that transforms the X86 machine instructions into // actual executable machine code. @@ -12,10 +19,11 @@ #include "llvm/CodeGen/MachineCodeEmitter.h" #include "llvm/CodeGen/MachineFunctionPass.h" #include "llvm/CodeGen/MachineInstr.h" -#include "llvm/Value.h" +#include "llvm/Function.h" #include "Support/Debug.h" #include "Support/Statistic.h" #include "Config/alloca.h" +using namespace llvm; namespace { Statistic<> @@ -45,6 +53,12 @@ namespace { JITResolver *TheJITResolver; } +void *X86TargetMachine::getJITStubForFunction(Function *F, + MachineCodeEmitter &MCE) { + if (TheJITResolver == 0) + TheJITResolver = new JITResolver(MCE); + return (void*)((unsigned long)TheJITResolver->getLazyResolver(F)); +} /// addFunctionReference - This method is called when we need to emit the /// address of a function that has not yet been emitted, so we don't know the @@ -176,7 +190,7 @@ namespace { } /// addPassesToEmitMachineCode - Add passes to the specified pass manager to get -/// machine code emitted. This uses a MAchineCodeEmitter object to handle +/// machine code emitted. This uses a MachineCodeEmitter object to handle /// actually outputting the machine code and resolving things like the address /// of functions. This method should returns true if machine code emission is /// not supported. @@ -243,15 +257,12 @@ void Emitter::emitGlobalAddressForCall(GlobalValue *GV) { // Get the address from the backend... unsigned Address = MCE.getGlobalValueAddress(GV); - // If the machine code emitter doesn't know what the address IS yet, we have - // to take special measures. - // if (Address == 0) { // FIXME: this is JIT specific! if (TheJITResolver == 0) TheJITResolver = new JITResolver(MCE); Address = TheJITResolver->addFunctionReference(MCE.getCurrentPCValue(), - (Function*)GV); + cast(GV)); } emitMaybePCRelativeValue(Address, true); } @@ -449,7 +460,7 @@ void Emitter::emitInstruction(MachineInstr &MI) { unsigned Opcode = MI.getOpcode(); const TargetInstrDescriptor &Desc = II->get(Opcode); - // Emit instruction prefixes if neccesary + // Emit instruction prefixes if necessary if (Desc.TSFlags & X86II::OpSize) MCE.emitByte(0x66);// Operand size... switch (Desc.TSFlags & X86II::Op0Mask) { @@ -536,8 +547,19 @@ void Emitter::emitInstruction(MachineInstr &MI) { case X86II::MRMSrcReg: MCE.emitByte(BaseOpcode); - emitRegModRMByte(MI.getOperand(MI.getNumOperands()-1).getReg(), - getX86RegNum(MI.getOperand(0).getReg())); + + if (MI.getNumOperands() == 2) { + emitRegModRMByte(MI.getOperand(MI.getNumOperands()-1).getReg(), + getX86RegNum(MI.getOperand(0).getReg())); + } else if (MI.getOperand(2).isImmediate()) { + emitRegModRMByte(MI.getOperand(1).getReg(), + getX86RegNum(MI.getOperand(0).getReg())); + + emitConstant(MI.getOperand(2).getImmedValue(), sizeOfPtr(Desc)); + } else { + emitRegModRMByte(MI.getOperand(2).getReg(), + getX86RegNum(MI.getOperand(0).getReg())); + } break; case X86II::MRMSrcMem: