X-Git-Url: http://plrg.eecs.uci.edu/git/?p=oota-llvm.git;a=blobdiff_plain;f=lib%2FTarget%2FX86%2FX86.h;h=62c65bacef51793a174d27a1af5c69b827023d4a;hp=c753cf2a530f98c0c3e91fc01301b7986375777f;hb=c1896335867238b01457db7e5a2a1a66d81a39d9;hpb=6c27f5e5743481c6a519c60135cf85ac238c150a diff --git a/lib/Target/X86/X86.h b/lib/Target/X86/X86.h index c753cf2a530..62c65bacef5 100644 --- a/lib/Target/X86/X86.h +++ b/lib/Target/X86/X86.h @@ -12,52 +12,42 @@ // //===----------------------------------------------------------------------===// -#ifndef TARGET_X86_H -#define TARGET_X86_H +#ifndef LLVM_LIB_TARGET_X86_X86_H +#define LLVM_LIB_TARGET_X86_X86_H -#include "llvm/Target/TargetMachine.h" +#include "llvm/Support/CodeGen.h" namespace llvm { class FunctionPass; -class JITCodeEmitter; -class MCCodeEmitter; -class MCContext; -class MachineCodeEmitter; -class Target; -class TargetAsmBackend; +class ImmutablePass; class X86TargetMachine; -class formatted_raw_ostream; -/// createX86ISelDag - This pass converts a legalized DAG into a +/// createX86ISelDag - This pass converts a legalized DAG into a /// X86-specific DAG, ready for instruction scheduling. /// FunctionPass *createX86ISelDag(X86TargetMachine &TM, CodeGenOpt::Level OptLevel); +/// createX86GlobalBaseRegPass - This pass initializes a global base +/// register for PIC on x86-32. +FunctionPass* createX86GlobalBaseRegPass(); + +/// createCleanupLocalDynamicTLSPass() - This pass combines multiple accesses +/// to local-dynamic TLS variables so that the TLS base address for the module +/// is only fetched once per execution path through the function. +FunctionPass *createCleanupLocalDynamicTLSPass(); + /// createX86FloatingPointStackifierPass - This function returns a pass which /// converts floating point register references and pseudo instructions into /// floating point stack references and physical instructions. /// FunctionPass *createX86FloatingPointStackifierPass(); -/// createX87FPRegKillInserterPass - This function returns a pass which -/// inserts FP_REG_KILL instructions where needed. -/// -FunctionPass *createX87FPRegKillInserterPass(); - -/// createX86CodeEmitterPass - Return a pass that emits the collected X86 code -/// to the specified MCE object. -FunctionPass *createX86JITCodeEmitterPass(X86TargetMachine &TM, - JITCodeEmitter &JCE); - -MCCodeEmitter *createX86_32MCCodeEmitter(const Target &, TargetMachine &TM, - MCContext &Ctx); -MCCodeEmitter *createX86_64MCCodeEmitter(const Target &, TargetMachine &TM, - MCContext &Ctx); - -TargetAsmBackend *createX86_32AsmBackend(const Target &, const std::string &); -TargetAsmBackend *createX86_64AsmBackend(const Target &, const std::string &); +/// createX86IssueVZeroUpperPass - This pass inserts AVX vzeroupper instructions +/// before each call to avoid transition penalty between functions encoded with +/// AVX and SSE. +FunctionPass *createX86IssueVZeroUpperPass(); /// createX86EmitCodeToMemory - Returns a pass that converts a register /// allocated function into raw machine code in a dynamically @@ -65,17 +55,26 @@ TargetAsmBackend *createX86_64AsmBackend(const Target &, const std::string &); /// FunctionPass *createEmitX86CodeToMemory(); -extern Target TheX86_32Target, TheX86_64Target; +/// createX86PadShortFunctions - Return a pass that pads short functions +/// with NOOPs. This will prevent a stall when returning on the Atom. +FunctionPass *createX86PadShortFunctions(); +/// createX86FixupLEAs - Return a a pass that selectively replaces +/// certain instructions (like add, sub, inc, dec, some shifts, +/// and some multiplies) by equivalent LEA instructions, in order +/// to eliminate execution delays in some Atom processors. +FunctionPass *createX86FixupLEAs(); + +/// createX86CallFrameOptimization - Return a pass that optimizes +/// the code-size of x86 call sequences. This is done by replacing +/// esp-relative movs with pushes. +FunctionPass *createX86CallFrameOptimization(); + +/// createX86WinEHStatePass - Return an IR pass that inserts EH registration +/// stack objects and explicit EH state updates. This pass must run after EH +/// preparation, which does Windows-specific but architecture-neutral +/// preparation. +FunctionPass *createX86WinEHStatePass(); } // End llvm namespace -// Defines symbolic names for X86 registers. This defines a mapping from -// register name to register number. -// -#include "X86GenRegisterNames.inc" - -// Defines symbolic names for the X86 instructions. -// -#include "X86GenInstrNames.inc" - #endif