X-Git-Url: http://plrg.eecs.uci.edu/git/?p=oota-llvm.git;a=blobdiff_plain;f=lib%2FTarget%2FX86%2FDisassembler%2FX86Disassembler.cpp;h=99fb1aba8413b3832519377660384bb39b4da81c;hp=5ee2663aff586695f1cce5313690ed388bf83d54;hb=2b5910a7675ddb005e72b0536499a2b983813dff;hpb=05be69f1e396139127a31aa6586348cdc5691093

diff --git a/lib/Target/X86/Disassembler/X86Disassembler.cpp b/lib/Target/X86/Disassembler/X86Disassembler.cpp
index 5ee2663aff5..99fb1aba841 100644
--- a/lib/Target/X86/Disassembler/X86Disassembler.cpp
+++ b/lib/Target/X86/Disassembler/X86Disassembler.cpp
@@ -80,19 +80,20 @@ X86GenericDisassembler::X86GenericDisassembler(
                                          MCContext &Ctx,
                                          std::unique_ptr<const MCInstrInfo> MII)
   : MCDisassembler(STI, Ctx), MII(std::move(MII)) {
-  const FeatureBitset &FB = STI.getFeatureBits();
-  if (FB[X86::Mode16Bit]) {
+  switch (STI.getFeatureBits() &
+          (X86::Mode16Bit | X86::Mode32Bit | X86::Mode64Bit)) {
+  case X86::Mode16Bit:
     fMode = MODE_16BIT;
-    return;
-  } else if (FB[X86::Mode32Bit]) {
+    break;
+  case X86::Mode32Bit:
     fMode = MODE_32BIT;
-    return;
-  } else if (FB[X86::Mode64Bit]) {
+    break;
+  case X86::Mode64Bit:
     fMode = MODE_64BIT;
-    return;
+    break;
+  default:
+    llvm_unreachable("Invalid CPU mode");
   }
-
-  llvm_unreachable("Invalid CPU mode");
 }
 
 struct Region {