X-Git-Url: http://plrg.eecs.uci.edu/git/?p=oota-llvm.git;a=blobdiff_plain;f=lib%2FTarget%2FWebAssembly%2FWebAssemblyAsmPrinter.cpp;h=1b175a7f8d5b2e3fa6907d781126580ece4898bf;hp=27095ec51df4aad1ca00af3f280be86acc2d959d;hb=001f3417071d4d6b08cc0dcd1dc03f5f90fe7623;hpb=e8073938cf1b5b009a1bf45211ffec5b1b0e9461 diff --git a/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp b/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp index 27095ec51df..1b175a7f8d5 100644 --- a/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp +++ b/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp @@ -15,12 +15,12 @@ //===----------------------------------------------------------------------===// #include "WebAssembly.h" +#include "InstPrinter/WebAssemblyInstPrinter.h" +#include "MCTargetDesc/WebAssemblyMCTargetDesc.h" +#include "WebAssemblyMCInstLower.h" #include "WebAssemblyMachineFunctionInfo.h" #include "WebAssemblyRegisterInfo.h" #include "WebAssemblySubtarget.h" -#include "InstPrinter/WebAssemblyInstPrinter.h" -#include "MCTargetDesc/WebAssemblyMCTargetDesc.h" - #include "llvm/ADT/SmallString.h" #include "llvm/ADT/StringExtras.h" #include "llvm/CodeGen/Analysis.h" @@ -28,13 +28,12 @@ #include "llvm/CodeGen/MachineConstantPool.h" #include "llvm/CodeGen/MachineInstr.h" #include "llvm/IR/DataLayout.h" -#include "llvm/IR/DebugInfo.h" +#include "llvm/MC/MCContext.h" #include "llvm/MC/MCStreamer.h" #include "llvm/MC/MCSymbol.h" #include "llvm/Support/Debug.h" #include "llvm/Support/TargetRegistry.h" #include "llvm/Support/raw_ostream.h" - using namespace llvm; #define DEBUG_TYPE "asm-printer" @@ -42,13 +41,12 @@ using namespace llvm; namespace { class WebAssemblyAsmPrinter final : public AsmPrinter { - const WebAssemblyInstrInfo *TII; const MachineRegisterInfo *MRI; - unsigned NumArgs; + const WebAssemblyFunctionInfo *MFI; public: WebAssemblyAsmPrinter(TargetMachine &TM, std::unique_ptr Streamer) - : AsmPrinter(TM, std::move(Streamer)), TII(nullptr), MRI(nullptr) {} + : AsmPrinter(TM, std::move(Streamer)), MRI(nullptr), MFI(nullptr) {} private: const char *getPassName() const override { @@ -64,10 +62,8 @@ private: } bool runOnMachineFunction(MachineFunction &MF) override { - const auto &Subtarget = MF.getSubtarget(); - TII = Subtarget.getInstrInfo(); MRI = &MF.getRegInfo(); - NumArgs = MF.getInfo()->getParams().size(); + MFI = MF.getInfo(); return AsmPrinter::runOnMachineFunction(MF); } @@ -80,12 +76,16 @@ private: void EmitFunctionBodyStart() override; void EmitInstruction(const MachineInstr *MI) override; void EmitEndOfAsmFile(Module &M) override; - - std::string getRegTypeName(unsigned RegNo) const; - static std::string toString(const APFloat &APF); + bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo, + unsigned AsmVariant, const char *ExtraCode, + raw_ostream &OS) override; + bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo, + unsigned AsmVariant, const char *ExtraCode, + raw_ostream &OS) override; + + MVT getRegType(unsigned RegNo) const; const char *toString(MVT VT) const; std::string regToString(const MachineOperand &MO); - std::string argToString(const MachineOperand &MO); }; } // end anonymous namespace @@ -94,96 +94,28 @@ private: // Helpers. //===----------------------------------------------------------------------===// -// Operand type (if any), followed by the lower-case version of the opcode's -// name matching the names WebAssembly opcodes are expected to have. The -// tablegen names are uppercase and suffixed with their type (after an -// underscore). Conversions are additionally prefixed with their input type -// (before a double underscore). -static std::string OpcodeName(const WebAssemblyInstrInfo *TII, - const MachineInstr *MI) { - std::string N(StringRef(TII->getName(MI->getOpcode())).lower()); - std::string::size_type Len = N.length(); - std::string::size_type Under = N.rfind('_'); - bool HasType = std::string::npos != Under; - std::string::size_type NameEnd = HasType ? Under : Len; - std::string Name(&N[0], &N[NameEnd]); - if (!HasType) - return Name; - for (const char *typelessOpcode : { "return", "call", "br_if" }) - if (Name == typelessOpcode) - return Name; - std::string Type(&N[NameEnd + 1], &N[Len]); - std::string::size_type DoubleUnder = Name.find("__"); - bool IsConv = std::string::npos != DoubleUnder; - if (!IsConv) - return Type + '.' + Name; - std::string InType(&Name[0], &Name[DoubleUnder]); - return Type + '.' + std::string(&Name[DoubleUnder + 2], &Name[NameEnd]) + - '/' + InType; -} - -static std::string toSymbol(StringRef S) { return ("$" + S).str(); } - -std::string WebAssemblyAsmPrinter::getRegTypeName(unsigned RegNo) const { +MVT WebAssemblyAsmPrinter::getRegType(unsigned RegNo) const { const TargetRegisterClass *TRC = MRI->getRegClass(RegNo); for (MVT T : {MVT::i32, MVT::i64, MVT::f32, MVT::f64}) if (TRC->hasType(T)) - return EVT(T).getEVTString(); + return T; DEBUG(errs() << "Unknown type for register number: " << RegNo); llvm_unreachable("Unknown register type"); - return "?"; -} - -std::string WebAssemblyAsmPrinter::toString(const APFloat &FP) { - static const size_t BufBytes = 128; - char buf[BufBytes]; - if (FP.isNaN()) - assert((FP.bitwiseIsEqual(APFloat::getQNaN(FP.getSemantics())) || - FP.bitwiseIsEqual( - APFloat::getQNaN(FP.getSemantics(), /*Negative=*/true))) && - "convertToHexString handles neither SNaN nor NaN payloads"); - // Use C99's hexadecimal floating-point representation. - auto Written = FP.convertToHexString( - buf, /*hexDigits=*/0, /*upperCase=*/false, APFloat::rmNearestTiesToEven); - (void)Written; - assert(Written != 0); - assert(Written < BufBytes); - return buf; + return MVT::Other; } std::string WebAssemblyAsmPrinter::regToString(const MachineOperand &MO) { unsigned RegNo = MO.getReg(); - if (TargetRegisterInfo::isPhysicalRegister(RegNo)) - return WebAssemblyInstPrinter::getRegisterName(RegNo); - - // WebAssembly arguments and local variables are in the same index space, and - // there are no explicit varargs, so we just add the number of arguments to - // the virtual register number to get the local variable number. - return utostr(TargetRegisterInfo::virtReg2Index(RegNo) + NumArgs); -} - -std::string WebAssemblyAsmPrinter::argToString(const MachineOperand &MO) { - unsigned ArgNo = MO.getImm(); - // Same as above, but we don't need to add NumArgs here. - return utostr(ArgNo); + assert(TargetRegisterInfo::isVirtualRegister(RegNo) && + "Unlowered physical register encountered during assembly printing"); + assert(!MFI->isVRegStackified(RegNo)); + unsigned WAReg = MFI->getWAReg(RegNo); + assert(WAReg != WebAssemblyFunctionInfo::UnusedReg); + return '$' + utostr(WAReg); } const char *WebAssemblyAsmPrinter::toString(MVT VT) const { - switch (VT.SimpleTy) { - default: - break; - case MVT::f32: - return "f32"; - case MVT::f64: - return "f64"; - case MVT::i32: - return "i32"; - case MVT::i64: - return "i64"; - } - DEBUG(dbgs() << "Invalid type " << EVT(VT).getEVTString() << '\n'); - llvm_unreachable("invalid type"); - return ""; + return WebAssembly::TypeToString(VT); } //===----------------------------------------------------------------------===// @@ -199,132 +131,90 @@ void WebAssemblyAsmPrinter::EmitJumpTableInfo() { // Nothing to do; jump tables are incorporated into the instruction stream. } +static void ComputeLegalValueVTs(const Function &F, const TargetMachine &TM, + Type *Ty, SmallVectorImpl &ValueVTs) { + const DataLayout &DL(F.getParent()->getDataLayout()); + const WebAssemblyTargetLowering &TLI = + *TM.getSubtarget(F).getTargetLowering(); + SmallVector VTs; + ComputeValueVTs(TLI, DL, Ty, VTs); + + for (EVT VT : VTs) { + unsigned NumRegs = TLI.getNumRegisters(F.getContext(), VT); + MVT RegisterVT = TLI.getRegisterType(F.getContext(), VT); + for (unsigned i = 0; i != NumRegs; ++i) + ValueVTs.push_back(RegisterVT); + } +} + void WebAssemblyAsmPrinter::EmitFunctionBodyStart() { - SmallString<128> Str; - raw_svector_ostream OS(Str); + if (!MFI->getParams().empty()) { + MCInst Param; + Param.setOpcode(WebAssembly::PARAM); + for (MVT VT : MFI->getParams()) + Param.addOperand(MCOperand::createImm(VT.SimpleTy)); + EmitToStreamer(*OutStreamer, Param); + } - for (MVT VT : MF->getInfo()->getParams()) - OS << "\t" ".param " - << toString(VT) << '\n'; - for (MVT VT : MF->getInfo()->getResults()) - OS << "\t" ".result " - << toString(VT) << '\n'; + SmallVector ResultVTs; + const Function &F(*MF->getFunction()); + ComputeLegalValueVTs(F, TM, F.getReturnType(), ResultVTs); + // If the return type needs to be legalized it will get converted into + // passing a pointer. + if (ResultVTs.size() == 1) { + MCInst Result; + Result.setOpcode(WebAssembly::RESULT); + Result.addOperand(MCOperand::createImm(ResultVTs.front().SimpleTy)); + EmitToStreamer(*OutStreamer, Result); + } - bool FirstVReg = true; + bool AnyWARegs = false; + MCInst Local; + Local.setOpcode(WebAssembly::LOCAL); for (unsigned Idx = 0, IdxE = MRI->getNumVirtRegs(); Idx != IdxE; ++Idx) { unsigned VReg = TargetRegisterInfo::index2VirtReg(Idx); - // FIXME: Don't skip dead virtual registers for now: that would require - // remapping all locals' numbers. - // if (!MRI->use_empty(VReg)) { - if (FirstVReg) - OS << "\t" ".local "; - else - OS << ", "; - OS << getRegTypeName(VReg); - FirstVReg = false; - //} + unsigned WAReg = MFI->getWAReg(VReg); + // Don't declare unused registers. + if (WAReg == WebAssemblyFunctionInfo::UnusedReg) + continue; + // Don't redeclare parameters. + if (WAReg < MFI->getParams().size()) + continue; + // Don't declare stackified registers. + if (int(WAReg) < 0) + continue; + Local.addOperand(MCOperand::createImm(getRegType(VReg).SimpleTy)); + AnyWARegs = true; } - if (!FirstVReg) - OS << '\n'; + if (AnyWARegs) + EmitToStreamer(*OutStreamer, Local); - // EmitRawText appends a newline, so strip off the last newline. - StringRef Text = OS.str(); - if (!Text.empty()) - OutStreamer->EmitRawText(Text.substr(0, Text.size() - 1)); AsmPrinter::EmitFunctionBodyStart(); } void WebAssemblyAsmPrinter::EmitInstruction(const MachineInstr *MI) { DEBUG(dbgs() << "EmitInstruction: " << *MI << '\n'); - SmallString<128> Str; - raw_svector_ostream OS(Str); - - unsigned NumDefs = MI->getDesc().getNumDefs(); - assert(NumDefs <= 1 && - "Instructions with multiple result values not implemented"); - - OS << '\t'; switch (MI->getOpcode()) { - case TargetOpcode::COPY: - OS << "get_local push, " << regToString(MI->getOperand(1)); - break; case WebAssembly::ARGUMENT_I32: case WebAssembly::ARGUMENT_I64: case WebAssembly::ARGUMENT_F32: case WebAssembly::ARGUMENT_F64: - OS << "get_local push, " << argToString(MI->getOperand(1)); + // These represent values which are live into the function entry, so there's + // no instruction to emit. + break; + case WebAssembly::LOOP_END: + // This is a no-op which just exists to tell AsmPrinter.cpp that there's a + // fallthrough which nevertheless requires a label for the destination here. break; default: { - OS << OpcodeName(TII, MI); - bool NeedComma = false; - bool DefsPushed = false; - if (NumDefs != 0 && !MI->isCall()) { - OS << " push"; - NeedComma = true; - DefsPushed = true; - } - for (const MachineOperand &MO : MI->uses()) { - if (MO.isReg() && MO.isImplicit()) - continue; - if (NeedComma) - OS << ','; - NeedComma = true; - OS << ' '; - switch (MO.getType()) { - default: - llvm_unreachable("unexpected machine operand type"); - case MachineOperand::MO_Register: - OS << "(get_local " << regToString(MO) << ')'; - break; - case MachineOperand::MO_Immediate: - OS << MO.getImm(); - break; - case MachineOperand::MO_FPImmediate: - OS << toString(MO.getFPImm()->getValueAPF()); - break; - case MachineOperand::MO_GlobalAddress: - OS << toSymbol(MO.getGlobal()->getName()); - break; - case MachineOperand::MO_MachineBasicBlock: - OS << toSymbol(MO.getMBB()->getSymbol()->getName()); - break; - } - if (NumDefs != 0 && !DefsPushed) { - // Special-case for calls; print the push after the callee. - assert(MI->isCall()); - OS << ", push"; - DefsPushed = true; - } - } + WebAssemblyMCInstLower MCInstLowering(OutContext, *this); + MCInst TmpInst; + MCInstLowering.Lower(MI, TmpInst); + EmitToStreamer(*OutStreamer, TmpInst); break; } } - - OutStreamer->EmitRawText(OS.str()); - - if (NumDefs != 0) { - SmallString<128> Str; - raw_svector_ostream OS(Str); - const MachineOperand &Operand = MI->getOperand(0); - OS << "\tset_local " << regToString(Operand) << ", pop"; - OutStreamer->EmitRawText(OS.str()); - } -} - -static void ComputeLegalValueVTs(LLVMContext &Context, - const WebAssemblyTargetLowering &TLI, - const DataLayout &DL, Type *Ty, - SmallVectorImpl &ValueVTs) { - SmallVector VTs; - ComputeValueVTs(TLI, DL, Ty, VTs); - - for (EVT VT : VTs) { - unsigned NumRegs = TLI.getNumRegisters(Context, VT); - MVT RegisterVT = TLI.getRegisterType(Context, VT); - for (unsigned i = 0; i != NumRegs; ++i) - ValueVTs.push_back(RegisterVT); - } } void WebAssemblyAsmPrinter::EmitEndOfAsmFile(Module &M) { @@ -340,8 +230,8 @@ void WebAssemblyAsmPrinter::EmitEndOfAsmFile(Module &M) { if (Str.empty()) OS << "\t.imports\n"; - OS << "\t.import " << toSymbol(F.getName()) << " \"\" \"" << F.getName() - << "\""; + MCSymbol *Sym = OutStreamer->getContext().getOrCreateSymbol(F.getName()); + OS << "\t.import " << *Sym << " \"\" " << *Sym; const WebAssemblyTargetLowering &TLI = *TM.getSubtarget(F).getTargetLowering(); @@ -350,8 +240,7 @@ void WebAssemblyAsmPrinter::EmitEndOfAsmFile(Module &M) { // passing a pointer. bool SawParam = false; SmallVector ResultVTs; - ComputeLegalValueVTs(M.getContext(), TLI, DL, F.getReturnType(), - ResultVTs); + ComputeLegalValueVTs(F, TM, F.getReturnType(), ResultVTs); if (ResultVTs.size() > 1) { ResultVTs.clear(); OS << " (param " << toString(TLI.getPointerTy(DL)); @@ -360,20 +249,20 @@ void WebAssemblyAsmPrinter::EmitEndOfAsmFile(Module &M) { for (const Argument &A : F.args()) { SmallVector ParamVTs; - ComputeLegalValueVTs(M.getContext(), TLI, DL, A.getType(), ParamVTs); - for (EVT VT : ParamVTs) { + ComputeLegalValueVTs(F, TM, A.getType(), ParamVTs); + for (MVT VT : ParamVTs) { if (!SawParam) { OS << " (param"; SawParam = true; } - OS << ' ' << toString(VT.getSimpleVT()); + OS << ' ' << toString(VT); } } if (SawParam) OS << ')'; - for (EVT VT : ResultVTs) - OS << " (result " << toString(VT.getSimpleVT()) << ')'; + for (MVT VT : ResultVTs) + OS << " (result " << toString(VT) << ')'; OS << '\n'; } @@ -381,6 +270,43 @@ void WebAssemblyAsmPrinter::EmitEndOfAsmFile(Module &M) { StringRef Text = OS.str(); if (!Text.empty()) OutStreamer->EmitRawText(Text.substr(0, Text.size() - 1)); + + AsmPrinter::EmitEndOfAsmFile(M); +} + +bool WebAssemblyAsmPrinter::PrintAsmOperand(const MachineInstr *MI, + unsigned OpNo, unsigned AsmVariant, + const char *ExtraCode, + raw_ostream &OS) { + if (AsmVariant != 0) + report_fatal_error("There are no defined alternate asm variants"); + + if (!ExtraCode) { + const MachineOperand &MO = MI->getOperand(OpNo); + if (MO.isImm()) + OS << MO.getImm(); + else + OS << regToString(MO); + return false; + } + + return AsmPrinter::PrintAsmOperand(MI, OpNo, AsmVariant, ExtraCode, OS); +} + +bool WebAssemblyAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI, + unsigned OpNo, + unsigned AsmVariant, + const char *ExtraCode, + raw_ostream &OS) { + if (AsmVariant != 0) + report_fatal_error("There are no defined alternate asm variants"); + + if (!ExtraCode) { + OS << regToString(MI->getOperand(OpNo)); + return false; + } + + return AsmPrinter::PrintAsmMemoryOperand(MI, OpNo, AsmVariant, ExtraCode, OS); } // Force static initialization.