X-Git-Url: http://plrg.eecs.uci.edu/git/?p=oota-llvm.git;a=blobdiff_plain;f=lib%2FTarget%2FTargetInstrInfo.cpp;h=17e9ac8e3f9924e6f879fdf387bd666bfb2b092c;hp=c29b1c54b4f0f954d957bd2a243eaab563590974;hb=4ee451de366474b9c228b4e5fa573795a715216d;hpb=ba59a1e453e110f7b84233f07613f9c5d9a39b87

diff --git a/lib/Target/TargetInstrInfo.cpp b/lib/Target/TargetInstrInfo.cpp
index c29b1c54b4f..17e9ac8e3f9 100644
--- a/lib/Target/TargetInstrInfo.cpp
+++ b/lib/Target/TargetInstrInfo.cpp
@@ -2,8 +2,8 @@
 //
 //                     The LLVM Compiler Infrastructure
 //
-// This file was developed by the LLVM research group and is distributed under
-// the University of Illinois Open Source License. See LICENSE.TXT for details.
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 //
@@ -17,29 +17,27 @@
 #include "llvm/DerivedTypes.h"
 using namespace llvm;
 
-TargetInstrInfo::TargetInstrInfo(const TargetInstrDescriptor* Desc,
-                                 unsigned numOpcodes)
-  : desc(Desc), NumOpcodes(numOpcodes) {
-}
-
-TargetInstrInfo::~TargetInstrInfo() {
-}
-
 /// findTiedToSrcOperand - Returns the operand that is tied to the specified
 /// dest operand. Returns -1 if there isn't one.
-int
-TargetInstrInfo::findTiedToSrcOperand(MachineOpCode Opc, unsigned OpNum) const {
-  for (unsigned i = 0, e = getNumOperands(Opc); i != e; ++i) {
+int TargetInstrDescriptor::findTiedToSrcOperand(unsigned OpNum) const {
+  for (unsigned i = 0, e = numOperands; i != e; ++i) {
     if (i == OpNum)
       continue;
-    int ti = getOperandConstraint(Opc, i, TOI::TIED_TO);
-    if (ti == (int)OpNum)
+    if (getOperandConstraint(i, TOI::TIED_TO) == (int)OpNum)
       return i;
   }
   return -1;
 }
 
 
+TargetInstrInfo::TargetInstrInfo(const TargetInstrDescriptor* Desc,
+                                 unsigned numOpcodes)
+  : desc(Desc), NumOpcodes(numOpcodes) {
+}
+
+TargetInstrInfo::~TargetInstrInfo() {
+}
+
 // commuteInstruction - The default implementation of this method just exchanges
 // operand 1 and 2.
 MachineInstr *TargetInstrInfo::commuteInstruction(MachineInstr *MI) const {
@@ -61,3 +59,41 @@ MachineInstr *TargetInstrInfo::commuteInstruction(MachineInstr *MI) const {
     MI->getOperand(1).unsetIsKill();
   return MI;
 }
+
+bool TargetInstrInfo::PredicateInstruction(MachineInstr *MI,
+                                const std::vector<MachineOperand> &Pred) const {
+  bool MadeChange = false;
+  const TargetInstrDescriptor *TID = MI->getInstrDescriptor();
+  if (TID->Flags & M_PREDICABLE) {
+    for (unsigned j = 0, i = 0, e = MI->getNumOperands(); i != e; ++i) {
+      if ((TID->OpInfo[i].Flags & M_PREDICATE_OPERAND)) {
+        MachineOperand &MO = MI->getOperand(i);
+        if (MO.isRegister()) {
+          MO.setReg(Pred[j].getReg());
+          MadeChange = true;
+        } else if (MO.isImmediate()) {
+          MO.setImm(Pred[j].getImmedValue());
+          MadeChange = true;
+        } else if (MO.isMachineBasicBlock()) {
+          MO.setMachineBasicBlock(Pred[j].getMachineBasicBlock());
+          MadeChange = true;
+        }
+        ++j;
+      }
+    }
+  }
+  return MadeChange;
+}
+
+bool TargetInstrInfo::isUnpredicatedTerminator(const MachineInstr *MI) const {
+  const TargetInstrDescriptor *TID = MI->getInstrDescriptor();
+  if (TID->Flags & M_TERMINATOR_FLAG) {
+    // Conditional branch is a special case.
+    if ((TID->Flags & M_BRANCH_FLAG) != 0 && (TID->Flags & M_BARRIER_FLAG) == 0)
+      return true;
+    if ((TID->Flags & M_PREDICABLE) == 0)
+      return true;
+    return !isPredicated(MI);
+  }
+  return false;
+}