X-Git-Url: http://plrg.eecs.uci.edu/git/?p=oota-llvm.git;a=blobdiff_plain;f=lib%2FCodeGen%2FScheduleDAG.cpp;h=6f8b337c6512c1121eecf7d54db1d5e22f1fafbf;hp=1363a92fed67803ace75f5521be91185232e9e7f;hb=9f85dccfc64b5f0b0c63ddfa0a42d8615aa1fcb3;hpb=4de099d8ca651e00fa5fac22bace4f4dba2d0292 diff --git a/lib/CodeGen/ScheduleDAG.cpp b/lib/CodeGen/ScheduleDAG.cpp index 1363a92fed6..6f8b337c651 100644 --- a/lib/CodeGen/ScheduleDAG.cpp +++ b/lib/CodeGen/ScheduleDAG.cpp @@ -12,70 +12,83 @@ // //===----------------------------------------------------------------------===// -#define DEBUG_TYPE "pre-RA-sched" #include "llvm/CodeGen/ScheduleDAG.h" #include "llvm/CodeGen/ScheduleHazardRecognizer.h" -#include "llvm/Target/TargetMachine.h" -#include "llvm/Target/TargetInstrInfo.h" -#include "llvm/Target/TargetRegisterInfo.h" +#include "llvm/CodeGen/SelectionDAGNodes.h" +#include "llvm/Support/CommandLine.h" #include "llvm/Support/Debug.h" #include "llvm/Support/raw_ostream.h" +#include "llvm/Target/TargetInstrInfo.h" +#include "llvm/Target/TargetMachine.h" +#include "llvm/Target/TargetRegisterInfo.h" +#include "llvm/Target/TargetSubtargetInfo.h" #include using namespace llvm; -ScheduleDAG::ScheduleDAG(MachineFunction &mf) - : TM(mf.getTarget()), - TII(TM.getInstrInfo()), - TRI(TM.getRegisterInfo()), - TLI(TM.getTargetLowering()), - MF(mf), MRI(mf.getRegInfo()), - ConstPool(MF.getConstantPool()), - EntrySU(), ExitSU() { -} +#define DEBUG_TYPE "pre-RA-sched" -ScheduleDAG::~ScheduleDAG() {} +#ifndef NDEBUG +static cl::opt StressSchedOpt( + "stress-sched", cl::Hidden, cl::init(false), + cl::desc("Stress test instruction scheduling")); +#endif -/// dump - dump the schedule. -void ScheduleDAG::dumpSchedule() const { - for (unsigned i = 0, e = Sequence.size(); i != e; i++) { - if (SUnit *SU = Sequence[i]) - SU->dump(this); - else - errs() << "**** NOOP ****\n"; - } -} +void SchedulingPriorityQueue::anchor() { } +ScheduleDAG::ScheduleDAG(MachineFunction &mf) + : TM(mf.getTarget()), TII(TM.getSubtargetImpl()->getInstrInfo()), + TRI(TM.getSubtargetImpl()->getRegisterInfo()), MF(mf), + MRI(mf.getRegInfo()), EntrySU(), ExitSU() { +#ifndef NDEBUG + StressSched = StressSchedOpt; +#endif +} -/// Run - perform scheduling. -/// -void ScheduleDAG::Run(MachineBasicBlock *bb, - MachineBasicBlock::iterator insertPos) { - BB = bb; - InsertPos = insertPos; +ScheduleDAG::~ScheduleDAG() {} +/// Clear the DAG state (e.g. between scheduling regions). +void ScheduleDAG::clearDAG() { SUnits.clear(); - Sequence.clear(); EntrySU = SUnit(); ExitSU = SUnit(); +} - Schedule(); - - DEBUG({ - errs() << "*** Final schedule ***\n"; - dumpSchedule(); - errs() << '\n'; - }); +/// getInstrDesc helper to handle SDNodes. +const MCInstrDesc *ScheduleDAG::getNodeDesc(const SDNode *Node) const { + if (!Node || !Node->isMachineOpcode()) return nullptr; + return &TII->get(Node->getMachineOpcode()); } /// addPred - This adds the specified edge as a pred of the current node if /// not already. It also adds the current node as a successor of the /// specified node. -void SUnit::addPred(const SDep &D) { - // If this node already has this depenence, don't add a redundant one. - for (SmallVector::const_iterator I = Preds.begin(), E = Preds.end(); - I != E; ++I) - if (*I == D) - return; +bool SUnit::addPred(const SDep &D, bool Required) { + // If this node already has this dependence, don't add a redundant one. + for (SmallVectorImpl::iterator I = Preds.begin(), E = Preds.end(); + I != E; ++I) { + // Zero-latency weak edges may be added purely for heuristic ordering. Don't + // add them if another kind of edge already exists. + if (!Required && I->getSUnit() == D.getSUnit()) + return false; + if (I->overlaps(D)) { + // Extend the latency if needed. Equivalent to removePred(I) + addPred(D). + if (I->getLatency() < D.getLatency()) { + SUnit *PredSU = I->getSUnit(); + // Find the corresponding successor in N. + SDep ForwardD = *I; + ForwardD.setSUnit(this); + for (SmallVectorImpl::iterator II = PredSU->Succs.begin(), + EE = PredSU->Succs.end(); II != EE; ++II) { + if (*II == ForwardD) { + II->setLatency(D.getLatency()); + break; + } + } + I->setLatency(D.getLatency()); + } + return false; + } + } // Now add a corresponding succ to N. SDep P = D; P.setSUnit(this); @@ -88,12 +101,22 @@ void SUnit::addPred(const SDep &D) { ++N->NumSuccs; } if (!N->isScheduled) { - assert(NumPredsLeft < UINT_MAX && "NumPredsLeft will overflow!"); - ++NumPredsLeft; + if (D.isWeak()) { + ++WeakPredsLeft; + } + else { + assert(NumPredsLeft < UINT_MAX && "NumPredsLeft will overflow!"); + ++NumPredsLeft; + } } if (!isScheduled) { - assert(N->NumSuccsLeft < UINT_MAX && "NumSuccsLeft will overflow!"); - ++N->NumSuccsLeft; + if (D.isWeak()) { + ++N->WeakSuccsLeft; + } + else { + assert(N->NumSuccsLeft < UINT_MAX && "NumSuccsLeft will overflow!"); + ++N->NumSuccsLeft; + } } Preds.push_back(D); N->Succs.push_back(P); @@ -101,6 +124,7 @@ void SUnit::addPred(const SDep &D) { this->setDepthDirty(); N->setHeightDirty(); } + return true; } /// removePred - This removes the specified edge as a pred of the current @@ -108,22 +132,17 @@ void SUnit::addPred(const SDep &D) { /// the specified node. void SUnit::removePred(const SDep &D) { // Find the matching predecessor. - for (SmallVector::iterator I = Preds.begin(), E = Preds.end(); - I != E; ++I) + for (SmallVectorImpl::iterator I = Preds.begin(), E = Preds.end(); + I != E; ++I) if (*I == D) { - bool FoundSucc = false; // Find the corresponding successor in N. SDep P = D; P.setSUnit(this); SUnit *N = D.getSUnit(); - for (SmallVector::iterator II = N->Succs.begin(), - EE = N->Succs.end(); II != EE; ++II) - if (*II == P) { - FoundSucc = true; - N->Succs.erase(II); - break; - } - assert(FoundSucc && "Mismatching preds / succs lists!"); + SmallVectorImpl::iterator Succ = std::find(N->Succs.begin(), + N->Succs.end(), P); + assert(Succ != N->Succs.end() && "Mismatching preds / succs lists!"); + N->Succs.erase(Succ); Preds.erase(I); // Update the bookkeeping. if (P.getKind() == SDep::Data) { @@ -133,12 +152,20 @@ void SUnit::removePred(const SDep &D) { --N->NumSuccs; } if (!N->isScheduled) { - assert(NumPredsLeft > 0 && "NumPredsLeft will underflow!"); - --NumPredsLeft; + if (D.isWeak()) + --WeakPredsLeft; + else { + assert(NumPredsLeft > 0 && "NumPredsLeft will underflow!"); + --NumPredsLeft; + } } if (!isScheduled) { - assert(N->NumSuccsLeft > 0 && "NumSuccsLeft will underflow!"); - --N->NumSuccsLeft; + if (D.isWeak()) + --N->WeakSuccsLeft; + else { + assert(N->NumSuccsLeft > 0 && "NumSuccsLeft will underflow!"); + --N->NumSuccsLeft; + } } if (P.getLatency() != 0) { this->setDepthDirty(); @@ -183,8 +210,8 @@ void SUnit::setHeightDirty() { /// setDepthToAtLeast - Update this node's successors to reflect the /// fact that this node's depth just increased. /// -void SUnit::setDepthToAtLeast(unsigned NewDepth, bool IgnoreAntiDep) { - if (NewDepth <= getDepth(IgnoreAntiDep)) +void SUnit::setDepthToAtLeast(unsigned NewDepth) { + if (NewDepth <= getDepth()) return; setDepthDirty(); Depth = NewDepth; @@ -194,8 +221,8 @@ void SUnit::setDepthToAtLeast(unsigned NewDepth, bool IgnoreAntiDep) { /// setHeightToAtLeast - Update this node's predecessors to reflect the /// fact that this node's height just increased. /// -void SUnit::setHeightToAtLeast(unsigned NewHeight, bool IgnoreAntiDep) { - if (NewHeight <= getHeight(IgnoreAntiDep)) +void SUnit::setHeightToAtLeast(unsigned NewHeight) { + if (NewHeight <= getHeight()) return; setHeightDirty(); Height = NewHeight; @@ -204,7 +231,7 @@ void SUnit::setHeightToAtLeast(unsigned NewHeight, bool IgnoreAntiDep) { /// ComputeDepth - Calculate the maximal path from the node to the exit. /// -void SUnit::ComputeDepth(bool IgnoreAntiDep) { +void SUnit::ComputeDepth() { SmallVector WorkList; WorkList.push_back(this); do { @@ -214,7 +241,6 @@ void SUnit::ComputeDepth(bool IgnoreAntiDep) { unsigned MaxPredDepth = 0; for (SUnit::const_pred_iterator I = Cur->Preds.begin(), E = Cur->Preds.end(); I != E; ++I) { - if (IgnoreAntiDep && (I->getKind() == SDep::Anti)) continue; SUnit *PredSU = I->getSUnit(); if (PredSU->isDepthCurrent) MaxPredDepth = std::max(MaxPredDepth, @@ -238,7 +264,7 @@ void SUnit::ComputeDepth(bool IgnoreAntiDep) { /// ComputeHeight - Calculate the maximal path from the node to the entry. /// -void SUnit::ComputeHeight(bool IgnoreAntiDep) { +void SUnit::ComputeHeight() { SmallVector WorkList; WorkList.push_back(this); do { @@ -248,7 +274,6 @@ void SUnit::ComputeHeight(bool IgnoreAntiDep) { unsigned MaxSuccHeight = 0; for (SUnit::const_succ_iterator I = Cur->Succs.begin(), E = Cur->Succs.end(); I != E; ++I) { - if (IgnoreAntiDep && (I->getKind() == SDep::Anti)) continue; SUnit *SuccSU = I->getSUnit(); if (SuccSU->isHeightCurrent) MaxSuccHeight = std::max(MaxSuccHeight, @@ -270,71 +295,94 @@ void SUnit::ComputeHeight(bool IgnoreAntiDep) { } while (!WorkList.empty()); } +void SUnit::biasCriticalPath() { + if (NumPreds < 2) + return; + + SUnit::pred_iterator BestI = Preds.begin(); + unsigned MaxDepth = BestI->getSUnit()->getDepth(); + for (SUnit::pred_iterator I = std::next(BestI), E = Preds.end(); I != E; + ++I) { + if (I->getKind() == SDep::Data && I->getSUnit()->getDepth() > MaxDepth) + BestI = I; + } + if (BestI != Preds.begin()) + std::swap(*Preds.begin(), *BestI); +} + +#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) /// SUnit - Scheduling unit. It's an wrapper around either a single SDNode or /// a group of nodes flagged together. void SUnit::dump(const ScheduleDAG *G) const { - errs() << "SU(" << NodeNum << "): "; + dbgs() << "SU(" << NodeNum << "): "; G->dumpNode(this); } void SUnit::dumpAll(const ScheduleDAG *G) const { dump(G); - errs() << " # preds left : " << NumPredsLeft << "\n"; - errs() << " # succs left : " << NumSuccsLeft << "\n"; - errs() << " Latency : " << Latency << "\n"; - errs() << " Depth : " << Depth << "\n"; - errs() << " Height : " << Height << "\n"; + dbgs() << " # preds left : " << NumPredsLeft << "\n"; + dbgs() << " # succs left : " << NumSuccsLeft << "\n"; + if (WeakPredsLeft) + dbgs() << " # weak preds left : " << WeakPredsLeft << "\n"; + if (WeakSuccsLeft) + dbgs() << " # weak succs left : " << WeakSuccsLeft << "\n"; + dbgs() << " # rdefs left : " << NumRegDefsLeft << "\n"; + dbgs() << " Latency : " << Latency << "\n"; + dbgs() << " Depth : " << getDepth() << "\n"; + dbgs() << " Height : " << getHeight() << "\n"; if (Preds.size() != 0) { - errs() << " Predecessors:\n"; + dbgs() << " Predecessors:\n"; for (SUnit::const_succ_iterator I = Preds.begin(), E = Preds.end(); I != E; ++I) { - errs() << " "; + dbgs() << " "; switch (I->getKind()) { - case SDep::Data: errs() << "val "; break; - case SDep::Anti: errs() << "anti"; break; - case SDep::Output: errs() << "out "; break; - case SDep::Order: errs() << "ch "; break; + case SDep::Data: dbgs() << "val "; break; + case SDep::Anti: dbgs() << "anti"; break; + case SDep::Output: dbgs() << "out "; break; + case SDep::Order: dbgs() << "ch "; break; } - errs() << "#"; - errs() << I->getSUnit() << " - SU(" << I->getSUnit()->NodeNum << ")"; + dbgs() << "SU(" << I->getSUnit()->NodeNum << ")"; if (I->isArtificial()) - errs() << " *"; - errs() << ": Latency=" << I->getLatency(); - errs() << "\n"; + dbgs() << " *"; + dbgs() << ": Latency=" << I->getLatency(); + if (I->isAssignedRegDep()) + dbgs() << " Reg=" << PrintReg(I->getReg(), G->TRI); + dbgs() << "\n"; } } if (Succs.size() != 0) { - errs() << " Successors:\n"; + dbgs() << " Successors:\n"; for (SUnit::const_succ_iterator I = Succs.begin(), E = Succs.end(); I != E; ++I) { - errs() << " "; + dbgs() << " "; switch (I->getKind()) { - case SDep::Data: errs() << "val "; break; - case SDep::Anti: errs() << "anti"; break; - case SDep::Output: errs() << "out "; break; - case SDep::Order: errs() << "ch "; break; + case SDep::Data: dbgs() << "val "; break; + case SDep::Anti: dbgs() << "anti"; break; + case SDep::Output: dbgs() << "out "; break; + case SDep::Order: dbgs() << "ch "; break; } - errs() << "#"; - errs() << I->getSUnit() << " - SU(" << I->getSUnit()->NodeNum << ")"; + dbgs() << "SU(" << I->getSUnit()->NodeNum << ")"; if (I->isArtificial()) - errs() << " *"; - errs() << ": Latency=" << I->getLatency(); - errs() << "\n"; + dbgs() << " *"; + dbgs() << ": Latency=" << I->getLatency(); + if (I->isAssignedRegDep()) + dbgs() << " Reg=" << PrintReg(I->getReg(), G->TRI); + dbgs() << "\n"; } } - errs() << "\n"; + dbgs() << "\n"; } +#endif #ifndef NDEBUG -/// VerifySchedule - Verify that all SUnits were scheduled and that -/// their state is consistent. +/// VerifyScheduledDAG - Verify that all SUnits were scheduled and that +/// their state is consistent. Return the number of scheduled nodes. /// -void ScheduleDAG::VerifySchedule(bool isBottomUp) { +unsigned ScheduleDAG::VerifyScheduledDAG(bool isBottomUp) { bool AnyNotSched = false; unsigned DeadNodes = 0; - unsigned Noops = 0; for (unsigned i = 0, e = SUnits.size(); i != e; ++i) { if (!SUnits[i].isScheduled) { if (SUnits[i].NumPreds == 0 && SUnits[i].NumSuccs == 0) { @@ -342,68 +390,64 @@ void ScheduleDAG::VerifySchedule(bool isBottomUp) { continue; } if (!AnyNotSched) - errs() << "*** Scheduling failed! ***\n"; + dbgs() << "*** Scheduling failed! ***\n"; SUnits[i].dump(this); - errs() << "has not been scheduled!\n"; + dbgs() << "has not been scheduled!\n"; AnyNotSched = true; } if (SUnits[i].isScheduled && (isBottomUp ? SUnits[i].getHeight() : SUnits[i].getDepth()) > unsigned(INT_MAX)) { if (!AnyNotSched) - errs() << "*** Scheduling failed! ***\n"; + dbgs() << "*** Scheduling failed! ***\n"; SUnits[i].dump(this); - errs() << "has an unexpected " + dbgs() << "has an unexpected " << (isBottomUp ? "Height" : "Depth") << " value!\n"; AnyNotSched = true; } if (isBottomUp) { if (SUnits[i].NumSuccsLeft != 0) { if (!AnyNotSched) - errs() << "*** Scheduling failed! ***\n"; + dbgs() << "*** Scheduling failed! ***\n"; SUnits[i].dump(this); - errs() << "has successors left!\n"; + dbgs() << "has successors left!\n"; AnyNotSched = true; } } else { if (SUnits[i].NumPredsLeft != 0) { if (!AnyNotSched) - errs() << "*** Scheduling failed! ***\n"; + dbgs() << "*** Scheduling failed! ***\n"; SUnits[i].dump(this); - errs() << "has predecessors left!\n"; + dbgs() << "has predecessors left!\n"; AnyNotSched = true; } } } - for (unsigned i = 0, e = Sequence.size(); i != e; ++i) - if (!Sequence[i]) - ++Noops; assert(!AnyNotSched); - assert(Sequence.size() + DeadNodes - Noops == SUnits.size() && - "The number of nodes scheduled doesn't match the expected number!"); + return SUnits.size() - DeadNodes; } #endif -/// InitDAGTopologicalSorting - create the initial topological +/// InitDAGTopologicalSorting - create the initial topological /// ordering from the DAG to be scheduled. /// -/// The idea of the algorithm is taken from +/// The idea of the algorithm is taken from /// "Online algorithms for managing the topological order of /// a directed acyclic graph" by David J. Pearce and Paul H.J. Kelly -/// This is the MNR algorithm, which was first introduced by -/// A. Marchetti-Spaccamela, U. Nanni and H. Rohnert in +/// This is the MNR algorithm, which was first introduced by +/// A. Marchetti-Spaccamela, U. Nanni and H. Rohnert in /// "Maintaining a topological order under edge insertions". /// -/// Short description of the algorithm: +/// Short description of the algorithm: /// /// Topological ordering, ord, of a DAG maps each node to a topological /// index so that for all edges X->Y it is the case that ord(X) < ord(Y). /// -/// This means that if there is a path from the node X to the node Z, +/// This means that if there is a path from the node X to the node Z, /// then ord(X) < ord(Z). /// /// This property can be used to check for reachability of nodes: -/// if Z is reachable from X, then an insertion of the edge Z->X would +/// if Z is reachable from X, then an insertion of the edge Z->X would /// create a cycle. /// /// The algorithm first computes a topological ordering for the DAG by @@ -422,6 +466,8 @@ void ScheduleDAGTopologicalSort::InitDAGTopologicalSorting() { Node2Index.resize(DAGSize); // Initialize the data structures. + if (ExitSU) + WorkList.push_back(ExitSU); for (unsigned i = 0, e = DAGSize; i != e; ++i) { SUnit *SU = &SUnits[i]; int NodeNum = SU->NodeNum; @@ -435,17 +481,18 @@ void ScheduleDAGTopologicalSort::InitDAGTopologicalSorting() { // Collect leaf nodes. WorkList.push_back(SU); } - } + } int Id = DAGSize; while (!WorkList.empty()) { SUnit *SU = WorkList.back(); WorkList.pop_back(); - Allocate(SU->NodeNum, --Id); + if (SU->NodeNum < DAGSize) + Allocate(SU->NodeNum, --Id); for (SUnit::const_pred_iterator I = SU->Preds.begin(), E = SU->Preds.end(); I != E; ++I) { SUnit *SU = I->getSUnit(); - if (!--Node2Index[SU->NodeNum]) + if (SU->NodeNum < DAGSize && !--Node2Index[SU->NodeNum]) // If all dependencies of the node are processed already, // then the node can be computed now. WorkList.push_back(SU); @@ -460,14 +507,14 @@ void ScheduleDAGTopologicalSort::InitDAGTopologicalSorting() { SUnit *SU = &SUnits[i]; for (SUnit::const_pred_iterator I = SU->Preds.begin(), E = SU->Preds.end(); I != E; ++I) { - assert(Node2Index[SU->NodeNum] > Node2Index[I->getSUnit()->NodeNum] && + assert(Node2Index[SU->NodeNum] > Node2Index[I->getSUnit()->NodeNum] && "Wrong topological sorting"); } } #endif } -/// AddPred - Updates the topological ordering to accomodate an edge +/// AddPred - Updates the topological ordering to accommodate an edge /// to be added from SUnit X to SUnit Y. void ScheduleDAGTopologicalSort::AddPred(SUnit *Y, SUnit *X) { int UpperBound, LowerBound; @@ -485,7 +532,7 @@ void ScheduleDAGTopologicalSort::AddPred(SUnit *Y, SUnit *X) { } } -/// RemovePred - Updates the topological ordering to accomodate an +/// RemovePred - Updates the topological ordering to accommodate an /// an edge to be removed from the specified node N from the predecessors /// of the current node M. void ScheduleDAGTopologicalSort::RemovePred(SUnit *M, SUnit *N) { @@ -496,9 +543,9 @@ void ScheduleDAGTopologicalSort::RemovePred(SUnit *M, SUnit *N) { /// all nodes affected by the edge insertion. These nodes will later get new /// topological indexes by means of the Shift method. void ScheduleDAGTopologicalSort::DFS(const SUnit *SU, int UpperBound, - bool& HasLoop) { + bool &HasLoop) { std::vector WorkList; - WorkList.reserve(SUnits.size()); + WorkList.reserve(SUnits.size()); WorkList.push_back(SU); do { @@ -506,22 +553,25 @@ void ScheduleDAGTopologicalSort::DFS(const SUnit *SU, int UpperBound, WorkList.pop_back(); Visited.set(SU->NodeNum); for (int I = SU->Succs.size()-1; I >= 0; --I) { - int s = SU->Succs[I].getSUnit()->NodeNum; + unsigned s = SU->Succs[I].getSUnit()->NodeNum; + // Edges to non-SUnits are allowed but ignored (e.g. ExitSU). + if (s >= Node2Index.size()) + continue; if (Node2Index[s] == UpperBound) { - HasLoop = true; + HasLoop = true; return; } // Visit successors if not already and in affected region. if (!Visited.test(s) && Node2Index[s] < UpperBound) { WorkList.push_back(SU->Succs[I].getSUnit()); - } - } + } + } } while (!WorkList.empty()); } -/// Shift - Renumber the nodes so that the topological ordering is +/// Shift - Renumber the nodes so that the topological ordering is /// preserved. -void ScheduleDAGTopologicalSort::Shift(BitVector& Visited, int LowerBound, +void ScheduleDAGTopologicalSort::Shift(BitVector& Visited, int LowerBound, int UpperBound) { std::vector L; int shift = 0; @@ -547,15 +597,16 @@ void ScheduleDAGTopologicalSort::Shift(BitVector& Visited, int LowerBound, } -/// WillCreateCycle - Returns true if adding an edge from SU to TargetSU will -/// create a cycle. -bool ScheduleDAGTopologicalSort::WillCreateCycle(SUnit *SU, SUnit *TargetSU) { - if (IsReachable(TargetSU, SU)) +/// WillCreateCycle - Returns true if adding an edge to TargetSU from SU will +/// create a cycle. If so, it is not safe to call AddPred(TargetSU, SU). +bool ScheduleDAGTopologicalSort::WillCreateCycle(SUnit *TargetSU, SUnit *SU) { + // Is SU reachable from TargetSU via successor edges? + if (IsReachable(SU, TargetSU)) return true; - for (SUnit::pred_iterator I = SU->Preds.begin(), E = SU->Preds.end(); - I != E; ++I) + for (SUnit::pred_iterator + I = TargetSU->Preds.begin(), E = TargetSU->Preds.end(); I != E; ++I) if (I->isAssignedRegDep() && - IsReachable(TargetSU, I->getSUnit())) + IsReachable(SU, I->getSUnit())) return true; return false; } @@ -572,7 +623,7 @@ bool ScheduleDAGTopologicalSort::IsReachable(const SUnit *SU, // Is Ord(TargetSU) < Ord(SU) ? if (LowerBound < UpperBound) { Visited.reset(); - // There may be a path from TargetSU to SU. Check for it. + // There may be a path from TargetSU to SU. Check for it. DFS(TargetSU, UpperBound, HasLoop); } return HasLoop; @@ -584,8 +635,8 @@ void ScheduleDAGTopologicalSort::Allocate(int n, int index) { Index2Node[index] = n; } -ScheduleDAGTopologicalSort::ScheduleDAGTopologicalSort( - std::vector &sunits) - : SUnits(sunits) {} +ScheduleDAGTopologicalSort:: +ScheduleDAGTopologicalSort(std::vector &sunits, SUnit *exitsu) + : SUnits(sunits), ExitSU(exitsu) {} ScheduleHazardRecognizer::~ScheduleHazardRecognizer() {}