X-Git-Url: http://plrg.eecs.uci.edu/git/?p=oota-llvm.git;a=blobdiff_plain;f=lib%2FCodeGen%2FAggressiveAntiDepBreaker.h;h=f94ce9af4daf8ba315f963e3fdcef68ce4b18115;hp=720f39080f2f9a5af4f01f2dfbea4186143e558b;hb=00e08fcaa02286dd7da9cf9a8d158545532ab832;hpb=67a8a7b3bd5afefc8057e365bd5f5c7330b3dd1a diff --git a/lib/CodeGen/AggressiveAntiDepBreaker.h b/lib/CodeGen/AggressiveAntiDepBreaker.h index 720f39080f2..f94ce9af4da 100644 --- a/lib/CodeGen/AggressiveAntiDepBreaker.h +++ b/lib/CodeGen/AggressiveAntiDepBreaker.h @@ -14,24 +14,26 @@ // //===----------------------------------------------------------------------===// -#ifndef LLVM_CODEGEN_AGGRESSIVEANTIDEPBREAKER_H -#define LLVM_CODEGEN_AGGRESSIVEANTIDEPBREAKER_H +#ifndef LLVM_LIB_CODEGEN_AGGRESSIVEANTIDEPBREAKER_H +#define LLVM_LIB_CODEGEN_AGGRESSIVEANTIDEPBREAKER_H #include "AntiDepBreaker.h" +#include "llvm/ADT/BitVector.h" +#include "llvm/ADT/SmallSet.h" #include "llvm/CodeGen/MachineBasicBlock.h" #include "llvm/CodeGen/MachineFrameInfo.h" #include "llvm/CodeGen/MachineFunction.h" #include "llvm/CodeGen/MachineRegisterInfo.h" #include "llvm/CodeGen/ScheduleDAG.h" #include "llvm/Target/TargetRegisterInfo.h" -#include "llvm/ADT/BitVector.h" -#include "llvm/ADT/SmallSet.h" +#include "llvm/Target/TargetSubtargetInfo.h" +#include namespace llvm { - /// Class AggressiveAntiDepState - /// Contains all the state necessary for anti-dep breaking. We place - /// into a separate class so be can conveniently save/restore it to - /// enable multi-pass anti-dep breaking. +class RegisterClassInfo; + + /// Class AggressiveAntiDepState + /// Contains all the state necessary for anti-dep breaking. class AggressiveAntiDepState { public: /// RegisterReference - Information about a register reference @@ -44,38 +46,42 @@ namespace llvm { } RegisterReference; private: + /// NumTargetRegs - Number of non-virtual target registers + /// (i.e. TRI->getNumRegs()). + const unsigned NumTargetRegs; + /// GroupNodes - Implements a disjoint-union data structure to /// form register groups. A node is represented by an index into /// the vector. A node can "point to" itself to indicate that it /// is the parent of a group, or point to another node to indicate /// that it is a member of the same group as that node. std::vector GroupNodes; - + /// GroupNodeIndices - For each register, the index of the GroupNode /// currently representing the group that the register belongs to. /// Register 0 is always represented by the 0 group, a group /// composed of registers that are not eligible for anti-aliasing. - unsigned GroupNodeIndices[TargetRegisterInfo::FirstVirtualRegister]; - + std::vector GroupNodeIndices; + /// RegRefs - Map registers to all their references within a live range. std::multimap RegRefs; - + /// KillIndices - The index of the most recent kill (proceding bottom-up), /// or ~0u if the register is not live. - unsigned KillIndices[TargetRegisterInfo::FirstVirtualRegister]; - + std::vector KillIndices; + /// DefIndices - The index of the most recent complete def (proceding bottom /// up), or ~0u if the register is live. - unsigned DefIndices[TargetRegisterInfo::FirstVirtualRegister]; + std::vector DefIndices; public: - AggressiveAntiDepState(MachineBasicBlock *BB); - + AggressiveAntiDepState(const unsigned TargetRegs, MachineBasicBlock *BB); + /// GetKillIndices - Return the kill indices. - unsigned *GetKillIndices() { return KillIndices; } + std::vector &GetKillIndices() { return KillIndices; } /// GetDefIndices - Return the define indices. - unsigned *GetDefIndices() { return DefIndices; } + std::vector &GetDefIndices() { return DefIndices; } /// GetRegRefs - Return the RegRefs map. std::multimap& GetRegRefs() { return RegRefs; } @@ -83,10 +89,14 @@ namespace llvm { // GetGroup - Get the group for a register. The returned value is // the index of the GroupNode representing the group. unsigned GetGroup(unsigned Reg); - + // GetGroupRegs - Return a vector of the registers belonging to a - // group. - void GetGroupRegs(unsigned Group, std::vector &Regs); + // group. If RegRefs is non-NULL then only included referenced registers. + void GetGroupRegs( + unsigned Group, + std::vector &Regs, + std::multimap *RegRefs); // UnionGroups - Union Reg1's and Reg2's groups to form a new // group. Return the index of the GroupNode representing the @@ -103,68 +113,72 @@ namespace llvm { }; - /// Class AggressiveAntiDepBreaker + /// Class AggressiveAntiDepBreaker class AggressiveAntiDepBreaker : public AntiDepBreaker { MachineFunction& MF; MachineRegisterInfo &MRI; + const TargetInstrInfo *TII; const TargetRegisterInfo *TRI; + const RegisterClassInfo &RegClassInfo; - /// AllocatableSet - The set of allocatable registers. - /// We'll be ignoring anti-dependencies on non-allocatable registers, - /// because they may not be safe to break. - const BitVector AllocatableSet; + /// CriticalPathSet - The set of registers that should only be + /// renamed if they are on the critical path. + BitVector CriticalPathSet; /// State - The state used to identify and rename anti-dependence /// registers. AggressiveAntiDepState *State; - /// SavedState - The state for the start of an anti-dep - /// region. Used to restore the state at the beginning of each - /// pass - AggressiveAntiDepState *SavedState; - public: - AggressiveAntiDepBreaker(MachineFunction& MFi); + AggressiveAntiDepBreaker(MachineFunction& MFi, + const RegisterClassInfo &RCI, + TargetSubtargetInfo::RegClassVector& CriticalPathRCs); ~AggressiveAntiDepBreaker(); - - /// GetMaxTrials - As anti-dependencies are broken, additional - /// dependencies may be exposed, so multiple passes are required. - unsigned GetMaxTrials(); /// Start - Initialize anti-dep breaking for a new basic block. - void StartBlock(MachineBasicBlock *BB); + void StartBlock(MachineBasicBlock *BB) override; - /// BreakAntiDependencies - Identifiy anti-dependencies along the critical path + /// BreakAntiDependencies - Identifiy anti-dependencies along the critical + /// path /// of the ScheduleDAG and break them by renaming registers. /// - unsigned BreakAntiDependencies(std::vector& SUnits, - MachineBasicBlock::iterator& Begin, - MachineBasicBlock::iterator& End, - unsigned InsertPosIndex); + unsigned BreakAntiDependencies(const std::vector& SUnits, + MachineBasicBlock::iterator Begin, + MachineBasicBlock::iterator End, + unsigned InsertPosIndex, + DbgValueVector &DbgValues) override; /// Observe - Update liveness information to account for the current /// instruction, which will not be scheduled. /// - void Observe(MachineInstr *MI, unsigned Count, unsigned InsertPosIndex); + void Observe(MachineInstr *MI, unsigned Count, + unsigned InsertPosIndex) override; /// Finish - Finish anti-dep breaking for a basic block. - void FinishBlock(); + void FinishBlock() override; private: + /// Keep track of a position in the allocation order for each regclass. + typedef std::map RenameOrderType; + /// IsImplicitDefUse - Return true if MO represents a register /// that is both implicitly used and defined in MI bool IsImplicitDefUse(MachineInstr *MI, MachineOperand& MO); - + /// GetPassthruRegs - If MI implicitly def/uses a register, then /// return that register and all subregisters. void GetPassthruRegs(MachineInstr *MI, std::set& PassthruRegs); - void HandleLastUse(unsigned Reg, unsigned KillIdx, const char *tag); + void HandleLastUse(unsigned Reg, unsigned KillIdx, const char *tag, + const char *header = nullptr, + const char *footer = nullptr); + void PrescanInstruction(MachineInstr *MI, unsigned Count, std::set& PassthruRegs); void ScanInstruction(MachineInstr *MI, unsigned Count); BitVector GetRenameRegisters(unsigned Reg); bool FindSuitableFreeRegisters(unsigned AntiDepGroupIndex, + RenameOrderType& RenameOrder, std::map &RenameMap); }; }