X-Git-Url: http://plrg.eecs.uci.edu/git/?p=oota-llvm.git;a=blobdiff_plain;f=lib%2FCodeGen%2FAggressiveAntiDepBreaker.h;h=eba7383966069c673f9ddff6473121ab5eaeadd4;hp=d9365a5120b0701aaf49b6c6c44b889c30e16e51;hb=da921ff605b31a92014857dc0f7c37edca5b8913;hpb=75a5b712086802daacf8bb646ffe9f8f72602670 diff --git a/lib/CodeGen/AggressiveAntiDepBreaker.h b/lib/CodeGen/AggressiveAntiDepBreaker.h index d9365a5120b..eba73839660 100644 --- a/lib/CodeGen/AggressiveAntiDepBreaker.h +++ b/lib/CodeGen/AggressiveAntiDepBreaker.h @@ -14,163 +14,157 @@ // //===----------------------------------------------------------------------===// -#ifndef LLVM_CODEGEN_AGGRESSIVEANTIDEPBREAKER_H -#define LLVM_CODEGEN_AGGRESSIVEANTIDEPBREAKER_H +#ifndef LLVM_LIB_CODEGEN_AGGRESSIVEANTIDEPBREAKER_H +#define LLVM_LIB_CODEGEN_AGGRESSIVEANTIDEPBREAKER_H #include "AntiDepBreaker.h" +#include "llvm/ADT/BitVector.h" +#include "llvm/ADT/SmallSet.h" #include "llvm/CodeGen/MachineBasicBlock.h" #include "llvm/CodeGen/MachineFrameInfo.h" #include "llvm/CodeGen/MachineFunction.h" #include "llvm/CodeGen/MachineRegisterInfo.h" #include "llvm/CodeGen/ScheduleDAG.h" -#include "llvm/Target/TargetSubtarget.h" -#include "llvm/ADT/BitVector.h" -#include "llvm/ADT/SmallSet.h" +#include "llvm/Target/TargetRegisterInfo.h" +#include "llvm/Target/TargetSubtargetInfo.h" #include -#include namespace llvm { - class TargetRegisterInfo; - /// Class AggressiveAntiDepState +class RegisterClassInfo; + /// Contains all the state necessary for anti-dep breaking. - class AggressiveAntiDepState { +class LLVM_LIBRARY_VISIBILITY AggressiveAntiDepState { public: - /// RegisterReference - Information about a register reference - /// within a liverange + /// Information about a register reference within a liverange typedef struct { - /// Operand - The registers operand + /// The registers operand MachineOperand *Operand; - /// RC - The register class + /// The register class const TargetRegisterClass *RC; } RegisterReference; private: - /// NumTargetRegs - Number of non-virtual target registers - /// (i.e. TRI->getNumRegs()). + /// Number of non-virtual target registers (i.e. TRI->getNumRegs()). const unsigned NumTargetRegs; - /// GroupNodes - Implements a disjoint-union data structure to + /// Implements a disjoint-union data structure to /// form register groups. A node is represented by an index into /// the vector. A node can "point to" itself to indicate that it /// is the parent of a group, or point to another node to indicate /// that it is a member of the same group as that node. std::vector GroupNodes; - /// GroupNodeIndices - For each register, the index of the GroupNode + /// For each register, the index of the GroupNode /// currently representing the group that the register belongs to. /// Register 0 is always represented by the 0 group, a group /// composed of registers that are not eligible for anti-aliasing. std::vector GroupNodeIndices; - /// RegRefs - Map registers to all their references within a live range. + /// Map registers to all their references within a live range. std::multimap RegRefs; - /// KillIndices - The index of the most recent kill (proceding bottom-up), + /// The index of the most recent kill (proceeding bottom-up), /// or ~0u if the register is not live. std::vector KillIndices; - /// DefIndices - The index of the most recent complete def (proceding bottom + /// The index of the most recent complete def (proceeding bottom /// up), or ~0u if the register is live. std::vector DefIndices; public: AggressiveAntiDepState(const unsigned TargetRegs, MachineBasicBlock *BB); - /// GetKillIndices - Return the kill indices. + /// Return the kill indices. std::vector &GetKillIndices() { return KillIndices; } - /// GetDefIndices - Return the define indices. + /// Return the define indices. std::vector &GetDefIndices() { return DefIndices; } - /// GetRegRefs - Return the RegRefs map. + /// Return the RegRefs map. std::multimap& GetRegRefs() { return RegRefs; } - // GetGroup - Get the group for a register. The returned value is + // Get the group for a register. The returned value is // the index of the GroupNode representing the group. unsigned GetGroup(unsigned Reg); - // GetGroupRegs - Return a vector of the registers belonging to a - // group. If RegRefs is non-NULL then only included referenced registers. + // Return a vector of the registers belonging to a group. + // If RegRefs is non-NULL then only included referenced registers. void GetGroupRegs( unsigned Group, std::vector &Regs, std::multimap *RegRefs); - // UnionGroups - Union Reg1's and Reg2's groups to form a new - // group. Return the index of the GroupNode representing the - // group. + // Union Reg1's and Reg2's groups to form a new group. + // Return the index of the GroupNode representing the group. unsigned UnionGroups(unsigned Reg1, unsigned Reg2); - // LeaveGroup - Remove a register from its current group and place + // Remove a register from its current group and place // it alone in its own group. Return the index of the GroupNode // representing the registers new group. unsigned LeaveGroup(unsigned Reg); - /// IsLive - Return true if Reg is live + /// Return true if Reg is live. bool IsLive(unsigned Reg); }; - - /// Class AggressiveAntiDepBreaker - class AggressiveAntiDepBreaker : public AntiDepBreaker { + class LLVM_LIBRARY_VISIBILITY AggressiveAntiDepBreaker + : public AntiDepBreaker { MachineFunction& MF; MachineRegisterInfo &MRI; const TargetInstrInfo *TII; const TargetRegisterInfo *TRI; + const RegisterClassInfo &RegClassInfo; - /// AllocatableSet - The set of allocatable registers. - /// We'll be ignoring anti-dependencies on non-allocatable registers, - /// because they may not be safe to break. - const BitVector AllocatableSet; - - /// CriticalPathSet - The set of registers that should only be + /// The set of registers that should only be /// renamed if they are on the critical path. BitVector CriticalPathSet; - /// State - The state used to identify and rename anti-dependence - /// registers. + /// The state used to identify and rename anti-dependence registers. AggressiveAntiDepState *State; public: AggressiveAntiDepBreaker(MachineFunction& MFi, - TargetSubtarget::RegClassVector& CriticalPathRCs); - ~AggressiveAntiDepBreaker(); + const RegisterClassInfo &RCI, + TargetSubtargetInfo::RegClassVector& CriticalPathRCs); + ~AggressiveAntiDepBreaker() override; - /// Start - Initialize anti-dep breaking for a new basic block. - void StartBlock(MachineBasicBlock *BB); + /// Initialize anti-dep breaking for a new basic block. + void StartBlock(MachineBasicBlock *BB) override; - /// BreakAntiDependencies - Identifiy anti-dependencies along the critical - /// path + /// Identifiy anti-dependencies along the critical path /// of the ScheduleDAG and break them by renaming registers. /// unsigned BreakAntiDependencies(const std::vector& SUnits, MachineBasicBlock::iterator Begin, MachineBasicBlock::iterator End, - unsigned InsertPosIndex); + unsigned InsertPosIndex, + DbgValueVector &DbgValues) override; - /// Observe - Update liveness information to account for the current + /// Update liveness information to account for the current /// instruction, which will not be scheduled. /// - void Observe(MachineInstr *MI, unsigned Count, unsigned InsertPosIndex); + void Observe(MachineInstr *MI, unsigned Count, + unsigned InsertPosIndex) override; - /// Finish - Finish anti-dep breaking for a basic block. - void FinishBlock(); + /// Finish anti-dep breaking for a basic block. + void FinishBlock() override; private: - typedef std::map RenameOrderType; + /// Keep track of a position in the allocation order for each regclass. + typedef std::map RenameOrderType; - /// IsImplicitDefUse - Return true if MO represents a register + /// Return true if MO represents a register /// that is both implicitly used and defined in MI bool IsImplicitDefUse(MachineInstr *MI, MachineOperand& MO); - /// GetPassthruRegs - If MI implicitly def/uses a register, then + /// If MI implicitly def/uses a register, then /// return that register and all subregisters. void GetPassthruRegs(MachineInstr *MI, std::set& PassthruRegs); void HandleLastUse(unsigned Reg, unsigned KillIdx, const char *tag, - const char *header =NULL, const char *footer =NULL); + const char *header = nullptr, + const char *footer = nullptr); void PrescanInstruction(MachineInstr *MI, unsigned Count, std::set& PassthruRegs);