This document contains the release notes for the LLVM compiler
-infrastructure, release 1.5. Here we describe the status of LLVM, including any
+infrastructure, release 1.6. Here we describe the status of LLVM, including any
known problems and major improvements from the previous release. The most
up-to-date version of this document can be found on the LLVM 1.5 web site. If you are
+href="http://llvm.org/releases/1.6/">LLVM 1.6 web site. If you are
not reading this on the LLVM web pages, you should probably go there because
this document may be updated after the release.
@@ -48,7 +48,7 @@ list is a good place to send them.
Note that if you are reading this file from CVS or the main LLVM web page,
this document applies to the next release, not the current one. To see
the release notes for the current or previous releases, see the releases page.
This is the sixth public release of the LLVM Compiler Infrastructure.
-
-
At this time, LLVM is known to correctly compile a wide range of C and C++
-programs, including the SPEC CPU95 & 2000 suite. It includes bug fixes for
-those problems found since the 1.4 release and a large number of new features
-and enhancements, described below.
+
This is the seventh public release of the LLVM Compiler Infrastructure. This
+release incorporates a large number of enhancements and additions (primarily in
+the code generator), which combine to improve the quality of the code generated
+by LLVM by up to 30% in some cases. This release is also the first release to
+have first-class support for Mac OS X: all of the major bugs have been shaken
+out and it is now as well supported as Linux on X86.
-This release includes new native code generators for Alpha, IA-64, and SPARC-V8 (32-bit SPARC). These code generators are still
-beta quality, but are progressing rapidly.
-
-
+
LLVM now includes support for auto-generating large portions of the
+instruction selectors from target descriptions. This allows us to
+write patterns in the target .td file, instead of writing lots of
+nasty C++ code. Most of the PowerPC instruction selector is now
+generated from the PowerPC target description files and other targets
+are adding support that will be live for LLVM 1.7.
For example, here are some patterns used by the PowerPC backend. A
+floating-point multiply then subtract instruction (FMSUBS):
-
-
This release includes a new framework
-for building instruction selectors, which has long been the hardest part of
-building a new LLVM target. This framework handles a lot of the mundane (but
-easy to get wrong) details of writing the instruction selector, such as
-generating efficient code for getelementptr instructions, promoting
-small integer types to larger types (e.g. for RISC targets with one size of
-integer registers), expanding 64-bit integer operations for 32-bit hosts, etc.
-Currently, the X86, PowerPC, Alpha, and IA-64 backends use this framework. The
-SPARC backends will be migrated when time permits.
-
With these definitions, we teach the code generator how to combine these two
+instructions to xor an abitrary 32-bit immediate with the following
+definition. The first line specifies what to match (a xor with an arbitrary
+immediate) the second line specifies what to produce:
LLVM 1.5 adds supports for custom and
-target-specific calling conventions. Traditionally, the LLVM code
-generators match the native C calling conventions for a target. This is
-important for compatibility, but is not very flexible. This release allows
-custom calling conventions to be established for functions, and defines three
-target-independent conventions (C call, fast call, and cold call) which may be
-supported by code generators. When possible, the LLVM optimizer promotes C
-functions to use the "fastcc" convention, allowing the use of more efficient
-calling sequences (e.g., parameters are passed in registers in the X86 target).
-
-
-
Targets may now also define target-specific calling conventions, allowing
-LLVM to fully support calling convention altering options (e.g. GCC's
--mregparm flag) and well-defined target conventions (e.g. stdcall and
-fastcall on X86).
The release now includes support for proper tail calls, as
-required to implement languages like Scheme. Tail calls make use of two
-features: custom calling conventions (described above), which allow the code
-generator to emit code for the caller to deallocate its own stack when it
-returns. The second feature is a flag on the call
-instruction, which indicates that the callee does not access the caller's
-stack frame (indicating that it is acceptable to deallocate the caller stack
-before invoking the callee). LLVM proper tail calls run on the system stack (as
-do normal calls), supports indirect tail calls, tail calls with arbitrary
-numbers of arguments, tail calls where the callee requires more argument space
-than the caller, etc. The only case not supported are varargs calls, but that
-could be added if desired.
-
-
-
In order for a front-end to get guaranteed tail call, it must mark functions
-as "fastcc", mark calls with the 'tail' marker, and follow the call with a
-return of the called value (or void). The optimizer and code generator attempt
-to handle more general cases, but the simple case will always work if the code
-generator supports tail calls. Here is a simple example:
-
- fastcc int %bar(int %X, int(double, int)* %FP) { ; fastcc
- %Y = tail call fastcc int %FP(double 0.0, int %X) ; tail, fastcc
- ret int %Y
- }
-
+
Instruction selectors using the refined instruction selection framework can now
+use a simple pre-pass scheduler included with LLVM 1.6. This scheduler is
+currently simple (cannot be configured much by the targets), but will be
+extended in the future.
+
-
In LLVM 1.5, the X86 code generator is the only target that has been enhanced
-to support proper tail calls (other targets will be enhanced in future).
-Further, because this support was added very close to the release, it is
-disabled by default. Pass -enable-x86-fastcc to llc to enable it (this
-will be enabled by default in the next release). The example above compiles to:
-
- bar:
- sub ESP, 8 # Callee uses more space than the caller
- mov ECX, DWORD PTR [ESP + 8] # Get the old return address
- mov DWORD PTR [ESP + 4], 0 # First half of 0.0
- mov DWORD PTR [ESP + 8], 0 # Second half of 0.0
- mov DWORD PTR [ESP], ECX # Put the return address where it belongs
- jmp EDX # Tail call "FP"
-
+
+
It is now straight-forward to parameterize a target implementation, and
+provide a mapping from CPU names to sets of target parameters. LLC now supports
+a -mcpu=cpu option that lets you choose a subtarget by CPU name: use
+"llvm-as < /dev/null | llc -march=XXX -mcpu=help" to get a list of
+supported CPUs for target "XXX". It also provides a
+-mattr=+attr1,-attr2 option that can be used to control individual
+features of a target (the previous command will list available features as
+well).
-
-With fastcc on X86, the first two integer arguments are passed in EAX/EDX, the
-callee pops its arguments off the stack, and the argument area is always a
-multiple of 8 bytes in size.
-
+
This functionality is nice when you want tell LLC something like "compile to
+code that is specialized for the PowerPC G5, but doesn't use altivec code. In
+this case, using "llc -march=ppc32 -mcpu=g5 -mattr=-altivec".
The PowerPC backend generates far better code than in LLVM 1.4.
+
The JIT now uses mutexes to protect its internal data structures. This
+ allows multi-threaded programs to be run from the JIT or interpreter without
+ corruption of the internal data structures. See
+ PR418 and
+ PR540 for the details.
+
The llvm-test suite can now use the NAG Fortran to C compiler to compile
+ SPEC FP programs if available (allowing us to test all of SPEC'95 &
+ 2000).
+
When bugpoint is grinding away and the user hits ctrl-C, it now
+ gracefully stops and gives what it has reduced so far, instead of
+ giving up completely. In addition, the JIT
+ debugging mode of bugpoint is much faster.
+
LLVM now includes Xcode project files in the llvm/Xcode directory.
The -globalopt pass now promotes non-address-taken static globals that are
-only accessed in main to SSA registers.
-
-
The new -simplify-libcalls pass improves code generated for well-known
-library calls. The pass optimizes calls to many of the string, memory, and
-standard I/O functions (e.g. replace the calls with simpler/faster calls) when
-possible, given information known statically about the arguments to the call.
-
-
-
Loops with trip counts based on array pointer comparisons (e.g. "for (i
-= 0; &A[i] != &A[100]; ++i) ...") are optimized better than before,
-which primarily helps iterator-intensive C++ codes.
-
-
The code generator now uses information about takes advantage of commutative
-two-address instructions when performing register allocation.
-
-
+
The -globalopt pass can now statically evaluate C++ static
+ constructors when they are simple enough. For example, it can
+ now statically initialize "struct X { int a; X() : a(4) {} } g;".
+
+
The Loop Strength Reduction pass has been completely rewritten, is far
+ more aggressive, and is turned on by default in the RISC targets. On PPC,
+ we find that it often speeds up programs from 10-40% depending on the
+ program.
+
The code produced when exception handling is enabled is far more
+ efficient in some cases, particularly on Mac OS X.
Transition code for LLVM 1.0 style varargs was removed from the .ll file
- parser. LLVM 1.0 bytecode files are still supported.
+
The Alpha backend is substantially more stable and robust than in LLVM 1.5.
+ For example, it now fully supports varargs functions. The Alpha backend
+ also now features beta JIT support.
+
The code generator contains a new component, the DAG Combiner. This allows
+ us to optimize lowered code (e.g. after 64-bit operations have been lowered
+ to use 32-bit registers on 32-bit targets) and do fine-grained bit-twiddling
+ optimizations for the backend.
+
The SelectionDAG infrastructure is far more capable and mature, able to
+ handle many new target peculiarities in a target-independent way.
A vast number of bugs have been fixed in the PowerPC backend and in
+ llvm-gcc when configured for Mac OS X (particularly relating to ABI
+ issues). For example:
+ PR449,
+ PR594,
+ PR603,
+ PR609,
+ PR630,
+ PR643,
+ and several others without bugzilla bugs.
+
Several bugs in tail call support have been fixed.
Many many other random bugs have been fixed. Query our bugzilla with a target of 1.6 for more
+ information.
-
@@ -306,12 +258,12 @@ two-address instructions when performing register allocation.
LLVM is known to work on the following platforms:
-
Intel and AMD machines running Red Hat Linux and FreeBSD (and probably
- other unix-like systems).
+
Intel and AMD machines running Red Hat Linux, Fedora Core and FreeBSD
+ (and probably other unix-like systems).
Sun UltraSPARC workstations running Solaris 8.
Intel and AMD machines running on Win32 with the Cygwin libraries (limited
support is available for native builds with Visual C++).
-
PowerPC-based Mac OS X systems, running 10.2 and above.
+
PowerPC and X86-based Mac OS X systems, running 10.2 and above.
Alpha-based machines running Debian GNU/Linux.
Itanium-based machines running Linux and HP-UX.
@@ -335,7 +287,7 @@ portability patches and reports of successful builds or error messages.
This section contains all known problems with the LLVM system, listed by
component. As new problems are discovered, they will be added to these
sections. If you run into a problem, please check the LLVM bug database and submit a bug if
+href="http://llvm.org/bugs/">LLVM bug database and submit a bug if
there isn't already one.
@@ -355,16 +307,28 @@ components, please contact us on the llvmdev list.
The following passes are incomplete or buggy, and may be removed in future
- releases: -cee, -branch-combine, -instloops, -paths, -pre
+ releases: -cee, -pre
The llvm-db tool is in a very early stage of development, but can
be used to step through programs and inspect the stack.
-
The "iterative scan" register allocator (enabled with
- -regalloc=iterativescan) is not stable.
-
The SparcV8, Alpha, and IA64 code generators are experimental.
+
The SparcV8 and IA64 code generators are experimental.
In the JIT, dlsym() on a symbol compiled by the JIT will not
work.
-
The JIT does not use mutexes to protect its internal data structures. As
- such, execution of a threaded program could cause these data structures to be
- corrupted.
-
+href="http://llvm.org/PR162">with the largest union member.
@@ -578,12 +534,6 @@ itself.
The C++ front-end inherits all problems afflicting the C
front-end.
-
IA-64 specific: The C++ front-end does not use IA64 ABI compliant layout of v-tables.
-In particular, it just stores function pointers instead of function
-descriptors in the vtable. This bug prevents mixing C++ code compiled with
-LLVM with C++ objects compiled by other C++ compilers.
The C back-end produces code that violates the ANSI C Type-Based Alias
+Analysis rules. As such, special options may be necessary to compile the code
+(for example, GCC requires the -fno-strict-aliasing option). This
+problem probably cannot be fixed.
The C back-end produces code that violates the ANSI C Type-Based Alias
-Analysis rules. As such, special options may be necessary to compile the code
-(for example, GCC requires the -fno-strict-aliasing option). This
-problem probably cannot be fixed.
On 21164s, some rare FP arithmatic sequences which may trap do not have the appropriate nops inserted to ensure restartability.
-
-
Vararg functions are not supported.
-
-
Due to the vararg problems, C++ exceptions do not work. Small changes are required to the CFE (which break correctness in the exception handler) to compile the exception handling library (and thus the C++ standard library).
+
On 21164s, some rare FP arithmetic sequences which may trap do not have the
+appropriate nops inserted to ensure restartability.
@@ -718,11 +666,17 @@ made where the argument is not 16-byte aligned, as required on IA64. (Strictly
speaking this is not a bug in the IA64 back-end; it will also be encountered
when building C++ programs using the C back-end.)
-
There are a few ABI violations which will lead to problems
-when mixing LLVM output with code built with other compilers,
-particularly for C++ and floating-point programs.
+
The C++ front-end does not use IA64
+ABI compliant layout of v-tables. In particular, it just stores function
+pointers instead of function descriptors in the vtable. This bug prevents
+mixing C++ code compiled with LLVM with C++ objects compiled by other C++
+compilers.
+
+
There are a few ABI violations which will lead to problems when mixing LLVM
+output with code built with other compilers, particularly for floating-point
+programs.
-
Vararg functions are not supported.
+
Defining vararg functions is not supported (but calling them is ok).
@@ -737,12 +691,8 @@ particularly for C++ and floating-point programs.
Many features are still missing (e.g. support for 64-bit integer
-arithmetic).
-
-
This backend needs to be updated to use the SelectionDAG instruction
-selection framework.