X-Git-Url: http://plrg.eecs.uci.edu/git/?p=oota-llvm.git;a=blobdiff_plain;f=CREDITS.TXT;h=84f7e5ad1648af923fce8c10cd5c7c2844957a49;hp=55ce558238b2c19023103257a6656039492e807f;hb=ba1d13b734957c948153b038b43fcca4aef9f1fe;hpb=bb7a62435264f8f00ae502fcf985a3956d914cd4 diff --git a/CREDITS.TXT b/CREDITS.TXT index 55ce558238b..84f7e5ad164 100644 --- a/CREDITS.TXT +++ b/CREDITS.TXT @@ -15,7 +15,8 @@ D: The Sparc64 backend, provider of much wisdom, and motivator for LLVM N: Owen Anderson E: resistor@mac.com -D: LCSSA pass and related LoopUnswitch work, TargetData refactoring, random improvements +D: LCSSA pass and related LoopUnswitch work +D: GVNPRE pass, TargetData refactoring, random improvements N: Henrik Bach D: MingW Win32 API portability layer @@ -28,6 +29,11 @@ D: Target-independent code generator and analysis improvements N: Daniel Berlin E: dberlin@dberlin.org D: ET-Forest implementation. +D: Sparse bitmap + +N: Neil Booth +E: neil@daikokuya.co.uk +D: APFloat implementation. N: Misha Brukman E: brukman+llvm@uiuc.edu @@ -49,8 +55,9 @@ D: Fixes to the Reassociation pass, various improvement patches N: Evan Cheng E: evan.cheng@apple.com -D: X86 backend developer +D: ARM and X86 backends D: Instruction scheduler improvements +D: Register allocator improvements D: Loop optimizer improvements D: Target-independent code generator improvements @@ -61,7 +68,7 @@ D: Native Win32 API portability layer N: John T. Criswell E: criswell@uiuc.edu -D: Autoconf support, QMTest database, documentation improvements +D: Original Autoconf support, documentation improvements, bug fixes N: Rafael Avila de Espindola E: rafael.espindola@gmail.com @@ -78,6 +85,11 @@ D: Portions of X86 static and JIT compilers; initial SparcV8 backend D: Dynamic trace optimizer D: FreeBSD/X86 compatibility fixes, the llvm-nm tool +N: Nicolas Geoffray +E: nicolas.geoffray@lip6.fr +W: http://www-src.lip6.fr/homepages/Nicolas.Geoffray/ +D: PPC backend fixes for Linux + N: Louis Gerbarg D: Portions of the PowerPC backend @@ -85,6 +97,29 @@ N: Saem Ghani E: saemghani@gmail.com D: Callgraph class cleanups +N: Mikhail Glushenkov +E: foldr@codedgers.com +D: Author of llvmc2 + +N: Dan Gohman +E: djg@cray.com +D: Miscellaneous bug fixes + +N: David Greene +E: greened@obbligato.org +D: Miscellaneous bug fixes +D: Register allocation refactoring + +N: Gordon Henriksen +E: gordonhenriksen@mac.com +D: Pluggable GC support +D: C interface +D: Ocaml bindings + +N: Raul Fernandes Herbster +E: raul@dsc.ufcg.edu.br +D: JIT support for ARM + N: Paolo Invernizzi E: arathorn@fastwebnet.it D: Visual C++ compatibility fixes @@ -97,18 +132,34 @@ N: Brad Jones E: kungfoomaster@nondot.org D: Support for packed types +N: Dale Johannesen +E: dalej@apple.com +D: ARM constant islands improvements +D: Tail merging improvements +D: Rewrite X87 back end +D: Use APFloat for floating point constants widely throughout compiler +D: Implement X87 long double + N: Eric Kidd W: http://randomhacks.net/ D: llvm-config script N: Anton Korobeynikov E: asl@math.spbu.ru -D: Mingw32 fixes, cross-compiling support, minor changes here and there +D: Mingw32 fixes, cross-compiling support, stdcall/fastcall calling conv. +D: x86/linux PIC codegen, aliases, regparm/visibility attributes +D: Switch lowering refactoring N: Sumant Kowshik E: kowshik@uiuc.edu D: Author of the original C backend +N: Christopher Lamb +E: christopher.lamb@gmail.com +D: aligned load/store support, parts of noalias and restrict support +D: vreg subreg infrastructure, X86 codegen improvements based on subregs +D: address spaces + N: Jim Laskey E: jlaskey@apple.com D: Improvements to the PPC backend, instruction scheduling @@ -121,7 +172,7 @@ E: sabre@nondot.org W: http://nondot.org/~sabre/ D: Primary architect of LLVM -N: Tanya Lattner (formerly Tanya Brethour) +N: Tanya Lattner (Tanya Brethour) E: tonic@nondot.org W: http://nondot.org/~tonic/ D: The initial llvm-ar tool, converted regression testsuite to dejagnu @@ -138,10 +189,15 @@ N: Nick Lewycky E: nicholas@mxc.ca D: PredicateSimplifier pass +N: Bruno Cardoso Lopes +E: bruno.cardoso@gmail.com +W: http://www.brunocardoso.org +D: The Mips backend + N: Duraid Madina E: duraid@octopus.com.au W: http://kinoko.c.u-tokyo.ac.jp/~duraid/ -D: IA64 backend +D: IA64 backend, BigBlock register allocator N: Michael McCracken E: michael.mccracken@gmail.com @@ -151,19 +207,41 @@ N: Vladimir Merzliakov E: wanderer@rsu.ru D: Test suite fixes for FreeBSD +N: Scott Michel +E: scottm@aero.org +D: Added STI Cell SPU backend. + N: Morten Ofstad E: morten@hue.no D: Visual C++ compatibility fixes +N: Devang Patel +E: dpatel@apple.com +D: LTO tool, PassManager rewrite, Loop Pass Manager, Loop Rotate +D: GCC PCH Integration (llvm-gcc), llvm-gcc improvements +D: Optimizer improvements, Loop Index Split + N: Vladimir Prus W: http://vladimir_prus.blogspot.com E: ghost@cs.msu.su D: Made inst_iterator behave like a proper iterator, LowerConstantExprs pass +N: Roman Samoilov +E: roman@codedgers.com +D: MSIL backend + +N: Duncan Sands +E: baldrick@free.fr +D: Ada front-end, exception handling improvements + N: Ruchira Sasanka E: sasanka@uiuc.edu D: Graph coloring register allocator for the Sparc64 backend +N: Arnold Schwaighofer +E: arnold.schwaighofer@gmail.com +D: Tail call optimization for the x86 backend + N: Anand Shukla E: ashukla@cs.uiuc.edu D: The `paths' pass @@ -171,16 +249,20 @@ D: The `paths' pass N: Reid Spencer E: rspencer@reidspencer.com W: http://reidspencer.com/ -D: Stacker, llvmc, llvm-ld, llvm-ar, llvm2cpp, lib/Archive, lib/Linker, -D: lib/System, bytecode enhancements, symtab hacking, unoverloading of -D: intrinsics, makefile and configuration system, documentation, various bug -D: fixing. +D: Lots of stuff, see: http://wiki.llvm.org/index.php/User:Reid N: Adam Treat E: manyoso@yahoo.com D: C++ bugs filed, and C++ front-end bug fixes. +N: Lauro Ramos Venancio +E: lauro.venancio@indt.org.br +D: ARM backend improvements +D: Thread Local Storage implementation + N: Bill Wendling E: isanbard@gmail.com W: http://web.mac.com/bwendling/ -D: The `Lower Setjmp/Longjmp' pass, improvements to the -lowerswitch pass. +D: Darwin exception handling +D: MMX & SSSE3 instructions +D: SPEC2006 support