X-Git-Url: http://plrg.eecs.uci.edu/git/?p=oota-llvm.git;a=blobdiff_plain;f=CODE_OWNERS.TXT;h=071f6c85e5bcadbce24be9ce5683b6d9918245e7;hp=5e54cfae7238ab79b71cf5521280a460af092dca;hb=44efa200e23c54ece92cdff8f505d7014c5178b9;hpb=0180ad6dae64146787999efa4b1e225f3b59dfc9 diff --git a/CODE_OWNERS.TXT b/CODE_OWNERS.TXT index 5e54cfae723..071f6c85e5b 100644 --- a/CODE_OWNERS.TXT +++ b/CODE_OWNERS.TXT @@ -6,7 +6,7 @@ what goes in or not. The list is sorted by surname and formatted to allow easy grepping and beautification by scripts. The fields are: name (N), email (E), web-address (W), PGP key ID and fingerprint (P), description (D), and snail-mail address -(S). +(S). Each entry should contain at least the (N), (E) and (D) fields. N: Joe Abbey E: jabbey@arxan.com @@ -16,48 +16,65 @@ N: Owen Anderson E: resistor@mac.com D: SelectionDAG (lib/CodeGen/SelectionDAG/*) +N: Rafael Avila de Espindola +E: rafael.espindola@gmail.com +D: Gold plugin (tools/gold/*) + N: Chandler Carruth E: chandlerc@gmail.com E: chandlerc@google.com -D: Config, ADT, Support, inlining & related passse, SROA/mem2reg & related passes, CMake, library layering +D: Config, ADT, Support, inlining & related passes, SROA/mem2reg & related passes, CMake, library layering N: Evan Cheng E: evan.cheng@apple.com D: ARM target, parts of code generator not covered by someone else +N: Renato Golin +E: renato.golin@linaro.org +D: ARM Linux support + N: Eric Christopher E: echristo@gmail.com D: Debug Information, autotools/configure/make build, inline assembly N: Greg Clayton +E: gclayton@apple.com D: LLDB N: Peter Collingbourne +E: peter@pcc.me.uk D: libclc +N: Anshuman Dasgupta +E: adasgupt@codeaurora.org +D: Hexagon Backend + N: Hal Finkel E: hfinkel@anl.gov -D: BBVectorize and the PowerPC target +D: BBVectorize, the loop reroller, alias analysis and the PowerPC target -N: Doug Gregor -D: Clang Frontend Libraries +N: Venkatraman Govindaraju +E: venkatra@cs.wisc.edu +D: Sparc Backend (lib/Target/Sparc/*) N: Tobias Grosser +E: tobias@grosser.es D: Polly N: James Grosbach E: grosbach@apple.com D: MC layer -N: Howard Hinnant +N: Marshall Clow +E: mclow.lists@gmail.com D: libc++ N: Justin Holewinski E: jholewinski@nvidia.com D: NVPTX Target (lib/Target/NVPTX/*) -N: Andy Kaylor -E: andrew.kaylor@intel.com +N: Lang Hames +E: lhames@gmail.com D: MCJIT, RuntimeDyld and JIT event listeners N: Galina Kistanova @@ -72,9 +89,6 @@ N: Benjamin Kramer E: benny.kra@gmail.com D: DWARF Parser -N: Ted Kremenek -D: Clang Static Analyzer - N: Sergei Larin E: slarin@codeaurora.org D: VLIW Instruction Scheduling, Packetization @@ -84,11 +98,12 @@ E: sabre@nondot.org W: http://nondot.org/~sabre/ D: Everything not covered by someone else -N: John McCall -E: rjmccall@apple.com -D: Clang LLVM IR generation +N: Tim Northover +E: t.p.northover@gmail.com +D: AArch64 backend N: Jakob Olesen +E: stoklund@2pi.dk D: Register allocators and TableGen N: Richard Osborne @@ -96,17 +111,50 @@ E: richard@xmos.com D: XCore Backend N: Chad Rosier -E: mcrosier@apple.com -D: MS-inline asm, Fast-Isel, and the compiler driver +E: mcrosier@codeaurora.org +D: Fast-Isel N: Nadav Rotem E: nrotem@apple.com D: X86 Backend, Loop Vectorizer +N: Daniel Sanders +E: daniel.sanders@imgtec.com +D: MIPS Backend (lib/Target/Mips/*) + +N: Richard Sandiford +E: rsandifo@linux.vnet.ibm.com +D: SystemZ Backend + N: Duncan Sands E: baldrick@free.fr D: DragonEgg +N: Kostya Serebryany +E: kcc@google.com +D: AddressSanitizer, ThreadSanitizer (LLVM parts) + +N: Michael Spencer +E: bigcheesegs@gmail.com +D: Windows parts of Support, Object, ar, nm, objdump, ranlib, size + +N: Tom Stellard +E: thomas.stellard@amd.com +E: mesa-dev@lists.freedesktop.org +D: Release manager for the 3.5 branch, R600 Backend + +N: Evgeniy Stepanov +E: eugenis@google.com +D: MemorySanitizer (LLVM part) + N: Andrew Trick E: atrick@apple.com -D: Instruction Scheduling +D: IndVar Simplify, Loop Strength Reduction, Instruction Scheduling + +N: Bill Wendling +E: isanbard@gmail.com +D: libLTO, IR Linker + +N: Peter Zotov +E: whitequark@whitequark.org +D: OCaml bindings