Fix memory leaks by avoiding extra manual dynamic allocation

[oota-llvm.git] / utils / TableGen / AsmWriterEmitter.cpp

diff --git a/utils/TableGen/AsmWriterEmitter.cpp b/utils/TableGen/AsmWriterEmitter.cpp
index 7e52e978fb53b3cb0d7a9c6d29e6b6662e1f0a3e..bc7cdc7570f93e05be4160c1ba6fa0f5e150a013 100644 (file)
--- a/utils/TableGen/AsmWriterEmitter.cpp
+++ b/utils/TableGen/AsmWriterEmitter.cpp
@@ -736,14 +736,13 @@ public:
     O.indent(4) << '}';
   }
 
     O.indent(4) << '}';
   }
 

-  bool operator==(const IAPrinter &RHS) {
+  bool operator==(const IAPrinter &RHS) const {

     if (Conds.size() != RHS.Conds.size())
       return false;
 
     unsigned Idx = 0;
     if (Conds.size() != RHS.Conds.size())
       return false;
 
     unsigned Idx = 0;

-    for (std::vector<std::string>::iterator
-           I = Conds.begin(), E = Conds.end(); I != E; ++I)
-      if (*I != RHS.Conds[Idx++])
+    for (const auto &str : Conds)
+      if (str != RHS.Conds[Idx++])

         return false;
 
     return true;
         return false;
 
     return true;


@@ -762,12 +761,12 @@ static unsigned CountNumOperands(StringRef AsmString, unsigned Variant) {
 
 namespace {
 struct AliasPriorityComparator {
 
 namespace {
 struct AliasPriorityComparator {

-  typedef std::pair<CodeGenInstAlias *, int> ValueType;
+  typedef std::pair<CodeGenInstAlias, int> ValueType;

   bool operator()(const ValueType &LHS, const ValueType &RHS) {
     if (LHS.second ==  RHS.second) {
       // We don't actually care about the order, but for consistency it
       // shouldn't depend on pointer comparisons.
   bool operator()(const ValueType &LHS, const ValueType &RHS) {
     if (LHS.second ==  RHS.second) {
       // We don't actually care about the order, but for consistency it
       // shouldn't depend on pointer comparisons.

-      return LHS.first->TheDef->getName() < RHS.first->TheDef->getName();
+      return LHS.first.TheDef->getName() < RHS.first.TheDef->getName();

     }
 
     // Aliases with larger priorities should be considered first.
     }
 
     // Aliases with larger priorities should be considered first.


@@ -796,12 +795,11 @@ void AsmWriterEmitter::EmitPrintAliasInstruction(raw_ostream &O) {
     Records.getAllDerivedDefinitions("InstAlias");
 
   // Create a map from the qualified name to a list of potential matches.
     Records.getAllDerivedDefinitions("InstAlias");
 
   // Create a map from the qualified name to a list of potential matches.

-  typedef std::set<std::pair<CodeGenInstAlias*, int>, AliasPriorityComparator>
+  typedef std::set<std::pair<CodeGenInstAlias, int>, AliasPriorityComparator>

       AliasWithPriority;
   std::map<std::string, AliasWithPriority> AliasMap;
   for (std::vector<Record*>::iterator
          I = AllInstAliases.begin(), E = AllInstAliases.end(); I != E; ++I) {
       AliasWithPriority;
   std::map<std::string, AliasWithPriority> AliasMap;
   for (std::vector<Record*>::iterator
          I = AllInstAliases.begin(), E = AllInstAliases.end(); I != E; ++I) {

-    CodeGenInstAlias *Alias = new CodeGenInstAlias(*I, Variant, Target);

     const Record *R = *I;
     int Priority = R->getValueAsInt("EmitPriority");
     if (Priority < 1)
     const Record *R = *I;
     int Priority = R->getValueAsInt("EmitPriority");
     if (Priority < 1)


@@ -809,13 +807,13 @@ void AsmWriterEmitter::EmitPrintAliasInstruction(raw_ostream &O) {
 
     const DagInit *DI = R->getValueAsDag("ResultInst");
     const DefInit *Op = cast<DefInit>(DI->getOperator());
 
     const DagInit *DI = R->getValueAsDag("ResultInst");
     const DefInit *Op = cast<DefInit>(DI->getOperator());

-    AliasMap[getQualifiedName(Op->getDef())].insert(std::make_pair(Alias,
-                                                                   Priority));
+    AliasMap[getQualifiedName(Op->getDef())].insert(
+        std::make_pair(CodeGenInstAlias(*I, Variant, Target), Priority));

   }
 
   // A map of which conditions need to be met for each instruction operand
   // before it can be matched to the mnemonic.
   }
 
   // A map of which conditions need to be met for each instruction operand
   // before it can be matched to the mnemonic.

-  std::map<std::string, std::vector<IAPrinter*> > IAPrinterMap;
+  std::map<std::string, std::vector<IAPrinter>> IAPrinterMap;

 
   // A list of MCOperandPredicates for all operands in use, and the reverse map
   std::vector<const Record*> MCOpPredicates;
 
   // A list of MCOperandPredicates for all operands in use, and the reverse map
   std::vector<const Record*> MCOpPredicates;


@@ -823,25 +821,24 @@ void AsmWriterEmitter::EmitPrintAliasInstruction(raw_ostream &O) {
 
   for (auto &Aliases : AliasMap) {
     for (auto &Alias : Aliases.second) {
 
   for (auto &Aliases : AliasMap) {
     for (auto &Alias : Aliases.second) {

-      const CodeGenInstAlias *CGA = Alias.first;
-      unsigned LastOpNo = CGA->ResultInstOperandIndex.size();
+      const CodeGenInstAlias &CGA = Alias.first;
+      unsigned LastOpNo = CGA.ResultInstOperandIndex.size();

       unsigned NumResultOps =
       unsigned NumResultOps =

-        CountNumOperands(CGA->ResultInst->AsmString, Variant);
+          CountNumOperands(CGA.ResultInst->AsmString, Variant);

 
       // Don't emit the alias if it has more operands than what it's aliasing.
 
       // Don't emit the alias if it has more operands than what it's aliasing.

-      if (NumResultOps < CountNumOperands(CGA->AsmString, Variant))
+      if (NumResultOps < CountNumOperands(CGA.AsmString, Variant))

         continue;
 
         continue;
 

-      IAPrinter *IAP = new IAPrinter(CGA->Result->getAsString(),
-                                     CGA->AsmString);
+      IAPrinter IAP(CGA.Result->getAsString(), CGA.AsmString);

 
       unsigned NumMIOps = 0;
 
       unsigned NumMIOps = 0;

-      for (auto &Operand : CGA->ResultOperands)
+      for (auto &Operand : CGA.ResultOperands)

         NumMIOps += Operand.getMINumOperands();
 
       std::string Cond;
       Cond = std::string("MI->getNumOperands() == ") + llvm::utostr(NumMIOps);
         NumMIOps += Operand.getMINumOperands();
 
       std::string Cond;
       Cond = std::string("MI->getNumOperands() == ") + llvm::utostr(NumMIOps);

-      IAP->addCond(Cond);
+      IAP.addCond(Cond);

 
       bool CantHandle = false;
 
 
       bool CantHandle = false;
 


@@ -849,7 +846,7 @@ void AsmWriterEmitter::EmitPrintAliasInstruction(raw_ostream &O) {
       for (unsigned i = 0, e = LastOpNo; i != e; ++i) {
         std::string Op = "MI->getOperand(" + llvm::utostr(MIOpNum) + ")";
 
       for (unsigned i = 0, e = LastOpNo; i != e; ++i) {
         std::string Op = "MI->getOperand(" + llvm::utostr(MIOpNum) + ")";
 

-        const CodeGenInstAlias::ResultOperand &RO = CGA->ResultOperands[i];
+        const CodeGenInstAlias::ResultOperand &RO = CGA.ResultOperands[i];

 
         switch (RO.Kind) {
         case CodeGenInstAlias::ResultOperand::K_Record: {
 
         switch (RO.Kind) {
         case CodeGenInstAlias::ResultOperand::K_Record: {


@@ -875,11 +872,11 @@ void AsmWriterEmitter::EmitPrintAliasInstruction(raw_ostream &O) {
           if (Rec->isSubClassOf("RegisterOperand"))
             Rec = Rec->getValueAsDef("RegClass");
           if (Rec->isSubClassOf("RegisterClass")) {
           if (Rec->isSubClassOf("RegisterOperand"))
             Rec = Rec->getValueAsDef("RegClass");
           if (Rec->isSubClassOf("RegisterClass")) {

-            IAP->addCond(Op + ".isReg()");
+            IAP.addCond(Op + ".isReg()");

 
 

-            if (!IAP->isOpMapped(ROName)) {
-              IAP->addOperand(ROName, MIOpNum, PrintMethodIdx);
-              Record *R = CGA->ResultOperands[i].getRecord();
+            if (!IAP.isOpMapped(ROName)) {
+              IAP.addOperand(ROName, MIOpNum, PrintMethodIdx);
+              Record *R = CGA.ResultOperands[i].getRecord();

               if (R->isSubClassOf("RegisterOperand"))
                 R = R->getValueAsDef("RegClass");
               Cond = std::string("MRI.getRegClass(") + Target.getName() + "::" +
               if (R->isSubClassOf("RegisterOperand"))
                 R = R->getValueAsDef("RegClass");
               Cond = std::string("MRI.getRegClass(") + Target.getName() + "::" +


@@ -887,12 +884,12 @@ void AsmWriterEmitter::EmitPrintAliasInstruction(raw_ostream &O) {
                                     ".contains(" + Op + ".getReg())";
             } else {
               Cond = Op + ".getReg() == MI->getOperand(" +
                                     ".contains(" + Op + ".getReg())";
             } else {
               Cond = Op + ".getReg() == MI->getOperand(" +

-                llvm::utostr(IAP->getOpIndex(ROName)) + ").getReg()";
+                     llvm::utostr(IAP.getOpIndex(ROName)) + ").getReg()";

             }
           } else {
             // Assume all printable operands are desired for now. This can be
             // overridden in the InstAlias instantiation if necessary.
             }
           } else {
             // Assume all printable operands are desired for now. This can be
             // overridden in the InstAlias instantiation if necessary.

-            IAP->addOperand(ROName, MIOpNum, PrintMethodIdx);
+            IAP.addOperand(ROName, MIOpNum, PrintMethodIdx);

 
             // There might be an additional predicate on the MCOperand
             unsigned Entry = MCOpPredicateMap[Rec];
 
             // There might be an additional predicate on the MCOperand
             unsigned Entry = MCOpPredicateMap[Rec];


@@ -908,39 +905,38 @@ void AsmWriterEmitter::EmitPrintAliasInstruction(raw_ostream &O) {
                    Op + ", " + llvm::utostr(Entry) + ")";
           }
           // for all subcases of ResultOperand::K_Record:
                    Op + ", " + llvm::utostr(Entry) + ")";
           }
           // for all subcases of ResultOperand::K_Record:

-          IAP->addCond(Cond);
+          IAP.addCond(Cond);

           break;
         }
         case CodeGenInstAlias::ResultOperand::K_Imm: {
           // Just because the alias has an immediate result, doesn't mean the
           // MCInst will. An MCExpr could be present, for example.
           break;
         }
         case CodeGenInstAlias::ResultOperand::K_Imm: {
           // Just because the alias has an immediate result, doesn't mean the
           // MCInst will. An MCExpr could be present, for example.

-          IAP->addCond(Op + ".isImm()");
+          IAP.addCond(Op + ".isImm()");

 
 

-          Cond = Op + ".getImm() == "
-            + llvm::utostr(CGA->ResultOperands[i].getImm());
-          IAP->addCond(Cond);
+          Cond = Op + ".getImm() == " +
+                 llvm::utostr(CGA.ResultOperands[i].getImm());
+          IAP.addCond(Cond);

           break;
         }
         case CodeGenInstAlias::ResultOperand::K_Reg:
           // If this is zero_reg, something's playing tricks we're not
           // equipped to handle.
           break;
         }
         case CodeGenInstAlias::ResultOperand::K_Reg:
           // If this is zero_reg, something's playing tricks we're not
           // equipped to handle.

-          if (!CGA->ResultOperands[i].getRegister()) {
+          if (!CGA.ResultOperands[i].getRegister()) {

             CantHandle = true;
             break;
           }
 
             CantHandle = true;
             break;
           }
 

-          Cond = Op + ".getReg() == " + Target.getName() +
-            "::" + CGA->ResultOperands[i].getRegister()->getName();
-          IAP->addCond(Cond);
+          Cond = Op + ".getReg() == " + Target.getName() + "::" +
+                 CGA.ResultOperands[i].getRegister()->getName();
+          IAP.addCond(Cond);

           break;
         }
 
           break;
         }
 

-        if (!IAP) break;

         MIOpNum += RO.getMINumOperands();
       }
 
       if (CantHandle) continue;
         MIOpNum += RO.getMINumOperands();
       }
 
       if (CantHandle) continue;

-      IAPrinterMap[Aliases.first].push_back(IAP);
+      IAPrinterMap[Aliases.first].push_back(std::move(IAP));

     }
   }
 
     }
   }
 


@@ -959,30 +955,26 @@ void AsmWriterEmitter::EmitPrintAliasInstruction(raw_ostream &O) {
   std::string Cases;
   raw_string_ostream CasesO(Cases);
 
   std::string Cases;
   raw_string_ostream CasesO(Cases);
 

-  for (std::map<std::string, std::vector<IAPrinter*> >::iterator
-         I = IAPrinterMap.begin(), E = IAPrinterMap.end(); I != E; ++I) {
-    std::vector<IAPrinter*> &IAPs = I->second;
+  for (auto &Entry : IAPrinterMap) {
+    std::vector<IAPrinter> &IAPs = Entry.second;

     std::vector<IAPrinter*> UniqueIAPs;
 
     std::vector<IAPrinter*> UniqueIAPs;
 

-    for (std::vector<IAPrinter*>::iterator
-           II = IAPs.begin(), IE = IAPs.end(); II != IE; ++II) {
-      IAPrinter *LHS = *II;
+    for (auto &LHS : IAPs) {

       bool IsDup = false;
       bool IsDup = false;

-      for (std::vector<IAPrinter*>::iterator
-             III = IAPs.begin(), IIE = IAPs.end(); III != IIE; ++III) {
-        IAPrinter *RHS = *III;
-        if (LHS != RHS && *LHS == *RHS) {
+      for (const auto &RHS : IAPs) {
+        if (&LHS != &RHS && LHS == RHS) {

           IsDup = true;
           break;
         }
       }
 
           IsDup = true;
           break;
         }
       }
 

-      if (!IsDup) UniqueIAPs.push_back(LHS);
+      if (!IsDup)
+        UniqueIAPs.push_back(&LHS);

     }
 
     if (UniqueIAPs.empty()) continue;
 
     }
 
     if (UniqueIAPs.empty()) continue;
 

-    CasesO.indent(2) << "case " << I->first << ":\n";
+    CasesO.indent(2) << "case " << Entry.first << ":\n";

 
     for (std::vector<IAPrinter*>::iterator
            II = UniqueIAPs.begin(), IE = UniqueIAPs.end(); II != IE; ++II) {
 
     for (std::vector<IAPrinter*>::iterator
            II = UniqueIAPs.begin(), IE = UniqueIAPs.end(); II != IE; ++II) {


@@ -1099,14 +1091,6 @@ void AsmWriterEmitter::EmitPrintAliasInstruction(raw_ostream &O) {
   }
 
   O << "#endif // PRINT_ALIAS_INSTR\n";
   }
 
   O << "#endif // PRINT_ALIAS_INSTR\n";

-
-  // Free allocated memory.
-  for (auto &Aliases : AliasMap)
-    for (auto &Alias : Aliases.second)
-      delete Alias.first;
-  for (auto &P : IAPrinterMap)
-    for (IAPrinter* IAP : P.second)
-      delete IAP;  

 }
 
 AsmWriterEmitter::AsmWriterEmitter(RecordKeeper &R) : Records(R), Target(R) {
 }
 
 AsmWriterEmitter::AsmWriterEmitter(RecordKeeper &R) : Records(R), Target(R) {