Simplify ownership of RegClasses by using list<CodeGenRegisterClass> instead of vecto...
[oota-llvm.git] / utils / TableGen / AsmMatcherEmitter.cpp
index b777d66997e5bd80a93a8af3c46a6e797e6a15b3..5b2ff6792d4e1f8a4a8cb80c9cb017f912e5857a 100644 (file)
@@ -1089,9 +1089,9 @@ buildRegisterClasses(SmallPtrSetImpl<Record*> &SingletonRegisters) {
   RegisterSetSet RegisterSets;
 
   // Gather the defined sets.
-  for (const CodeGenRegisterClass *RC : RegClassList)
-    RegisterSets.insert(RegisterSet(RC->getOrder().begin(),
-                                    RC->getOrder().end()));
+  for (const CodeGenRegisterClass &RC : RegClassList)
+    RegisterSets.insert(
+        RegisterSet(RC.getOrder().begin(), RC.getOrder().end()));
 
   // Add any required singleton sets.
   for (Record *Rec : SingletonRegisters) {
@@ -1160,19 +1160,19 @@ buildRegisterClasses(SmallPtrSetImpl<Record*> &SingletonRegisters) {
   }
 
   // Name the register classes which correspond to a user defined RegisterClass.
-  for (const CodeGenRegisterClass *RC : RegClassList) {
+  for (const CodeGenRegisterClass &RC : RegClassList) {
     // Def will be NULL for non-user defined register classes.
-    Record *Def = RC->getDef();
+    Record *Def = RC.getDef();
     if (!Def)
       continue;
-    ClassInfo *CI = RegisterSetClasses[RegisterSet(RC->getOrder().begin(),
-                                                   RC->getOrder().end())];
+    ClassInfo *CI = RegisterSetClasses[RegisterSet(RC.getOrder().begin(),
+                                                   RC.getOrder().end())];
     if (CI->ValueName.empty()) {
-      CI->ClassName = RC->getName();
-      CI->Name = "MCK_" + RC->getName();
-      CI->ValueName = RC->getName();
+      CI->ClassName = RC.getName();
+      CI->Name = "MCK_" + RC.getName();
+      CI->ValueName = RC.getName();
     } else
-      CI->ValueName = CI->ValueName + "," + RC->getName();
+      CI->ValueName = CI->ValueName + "," + RC.getName();
 
     RegisterClassClasses.insert(std::make_pair(Def, CI));
   }