/// AsmVariantID - Target's assembly syntax variant no.
int AsmVariantID;
+ /// AsmString - The assembly string for this instruction (with variants
+ /// removed), e.g. "movsx $src, $dst".
+ std::string AsmString;
+
/// TheDef - This is the definition of the instruction or InstAlias that this
/// matchable came from.
Record *const TheDef;
/// MCInst.
SmallVector<ResOperand, 8> ResOperands;
- /// AsmString - The assembly string for this instruction (with variants
- /// removed), e.g. "movsx $src, $dst".
- std::string AsmString;
-
/// Mnemonic - This is the first token of the matched instruction, its
/// mnemonic.
StringRef Mnemonic;
SmallVector<AsmOperand, 8> AsmOperands;
/// Predicates - The required subtarget features to match this instruction.
- SmallVector<SubtargetFeatureInfo*, 4> RequiredFeatures;
+ SmallVector<const SubtargetFeatureInfo *, 4> RequiredFeatures;
/// ConversionFnKind - The enum value which is passed to the generated
/// convertToMCInst to convert parsed operands into an MCInst for this
bool HasDeprecation;
MatchableInfo(const CodeGenInstruction &CGI)
- : AsmVariantID(0), TheDef(CGI.TheDef), DefRec(&CGI),
- AsmString(CGI.AsmString) {
+ : AsmVariantID(0), AsmString(CGI.AsmString), TheDef(CGI.TheDef), DefRec(&CGI) {
}
- MatchableInfo(const CodeGenInstAlias *Alias)
- : AsmVariantID(0), TheDef(Alias->TheDef), DefRec(Alias),
- AsmString(Alias->AsmString) {
+ MatchableInfo(std::unique_ptr<const CodeGenInstAlias> Alias)
+ : AsmVariantID(0), AsmString(Alias->AsmString), TheDef(Alias->TheDef), DefRec(Alias.release()) {
}
~MatchableInfo() {
- if (DefRec.is<const CodeGenInstAlias*>())
- delete DefRec.get<const CodeGenInstAlias*>();
+ delete DefRec.dyn_cast<const CodeGenInstAlias*>();
}
// Two-operand aliases clone from the main matchable, but mark the second
std::forward_list<ClassInfo> Classes;
/// The information on the matchables to match.
- std::forward_list<MatchableInfo> Matchables;
+ std::vector<std::unique_ptr<MatchableInfo>> Matchables;
/// Info for custom matching operands by user defined methods.
std::vector<OperandMatchEntry> OperandMatchInfo;
RegisterClassesTy RegisterClasses;
/// Map of Predicate records to their subtarget information.
- std::map<Record*, std::unique_ptr<SubtargetFeatureInfo>,
- LessRecordByID> SubtargetFeatures;
+ std::map<Record *, SubtargetFeatureInfo, LessRecordByID> SubtargetFeatures;
/// Map of AsmOperandClass records to their class information.
std::map<Record*, ClassInfo*> AsmOperandClasses;
/// getSubtargetFeature - Lookup or create the subtarget feature info for the
/// given operand.
- SubtargetFeatureInfo *getSubtargetFeature(Record *Def) const {
+ const SubtargetFeatureInfo *getSubtargetFeature(Record *Def) const {
assert(Def->isSubClassOf("Predicate") && "Invalid predicate type!");
const auto &I = SubtargetFeatures.find(Def);
- return I == SubtargetFeatures.end() ? nullptr : I->second.get();
+ return I == SubtargetFeatures.end() ? nullptr : &I->second;
}
RecordKeeper &getRecords() const {
// Compute the require features.
std::vector<Record*> Predicates =TheDef->getValueAsListOfDefs("Predicates");
for (unsigned i = 0, e = Predicates.size(); i != e; ++i)
- if (SubtargetFeatureInfo *Feature =
- Info.getSubtargetFeature(Predicates[i]))
+ if (const SubtargetFeatureInfo *Feature =
+ Info.getSubtargetFeature(Predicates[i]))
RequiredFeatures.push_back(Feature);
// Collect singleton registers, if used.
void AsmMatcherInfo::
buildRegisterClasses(SmallPtrSetImpl<Record*> &SingletonRegisters) {
- const std::vector<CodeGenRegister*> &Registers =
- Target.getRegBank().getRegisters();
- ArrayRef<CodeGenRegisterClass*> RegClassList =
- Target.getRegBank().getRegClasses();
+ const auto &Registers = Target.getRegBank().getRegisters();
+ auto &RegClassList = Target.getRegBank().getRegClasses();
typedef std::set<RegisterSet, LessRegisterSet> RegisterSetSet;
RegisterSetSet RegisterSets;
// Gather the defined sets.
- for (const CodeGenRegisterClass *RC : RegClassList)
- RegisterSets.insert(RegisterSet(RC->getOrder().begin(),
- RC->getOrder().end()));
+ for (const CodeGenRegisterClass &RC : RegClassList)
+ RegisterSets.insert(
+ RegisterSet(RC.getOrder().begin(), RC.getOrder().end()));
// Add any required singleton sets.
for (Record *Rec : SingletonRegisters) {
// a unique register set class), and build the mapping of registers to the set
// they should classify to.
std::map<Record*, RegisterSet> RegisterMap;
- for (const CodeGenRegister *CGR : Registers) {
+ for (const CodeGenRegister &CGR : Registers) {
// Compute the intersection of all sets containing this register.
RegisterSet ContainingSet;
for (const RegisterSet &RS : RegisterSets) {
- if (!RS.count(CGR->TheDef))
+ if (!RS.count(CGR.TheDef))
continue;
if (ContainingSet.empty()) {
if (!ContainingSet.empty()) {
RegisterSets.insert(ContainingSet);
- RegisterMap.insert(std::make_pair(CGR->TheDef, ContainingSet));
+ RegisterMap.insert(std::make_pair(CGR.TheDef, ContainingSet));
}
}
}
// Name the register classes which correspond to a user defined RegisterClass.
- for (const CodeGenRegisterClass *RC : RegClassList) {
+ for (const CodeGenRegisterClass &RC : RegClassList) {
// Def will be NULL for non-user defined register classes.
- Record *Def = RC->getDef();
+ Record *Def = RC.getDef();
if (!Def)
continue;
- ClassInfo *CI = RegisterSetClasses[RegisterSet(RC->getOrder().begin(),
- RC->getOrder().end())];
+ ClassInfo *CI = RegisterSetClasses[RegisterSet(RC.getOrder().begin(),
+ RC.getOrder().end())];
if (CI->ValueName.empty()) {
- CI->ClassName = RC->getName();
- CI->Name = "MCK_" + RC->getName();
- CI->ValueName = RC->getName();
+ CI->ClassName = RC.getName();
+ CI->Name = "MCK_" + RC.getName();
+ CI->ValueName = RC.getName();
} else
- CI->ValueName = CI->ValueName + "," + RC->getName();
+ CI->ValueName = CI->ValueName + "," + RC.getName();
RegisterClassClasses.insert(std::make_pair(Def, CI));
}
// Keep track of all operands of this instructions which belong to the
// same class.
- for (unsigned i = 0, e = MI.AsmOperands.size(); i != e; ++i) {
- const MatchableInfo::AsmOperand &Op = MI.AsmOperands[i];
+ for (unsigned i = 0, e = MI->AsmOperands.size(); i != e; ++i) {
+ const MatchableInfo::AsmOperand &Op = MI->AsmOperands[i];
if (Op.Class->ParserMethod.empty())
continue;
unsigned &OperandMask = OpClassMask[Op.Class];
for (const auto &OCM : OpClassMask) {
unsigned OpMask = OCM.second;
ClassInfo *CI = OCM.first;
- OperandMatchInfo.push_back(OperandMatchEntry::create(&MI, CI, OpMask));
+ OperandMatchInfo.push_back(OperandMatchEntry::create(MI.get(), CI,
+ OpMask));
}
}
}
if (Pred->getName().empty())
PrintFatalError(Pred->getLoc(), "Predicate has no name!");
- uint64_t FeatureNo = SubtargetFeatures.size();
- SubtargetFeatures[Pred] =
- llvm::make_unique<SubtargetFeatureInfo>(Pred, FeatureNo);
- DEBUG(SubtargetFeatures[Pred]->dump());
- assert(FeatureNo < 64 && "Too many subtarget features!");
+ SubtargetFeatures.insert(std::make_pair(
+ Pred, SubtargetFeatureInfo(Pred, SubtargetFeatures.size())));
+ DEBUG(SubtargetFeatures.find(Pred)->second.dump());
+ assert(SubtargetFeatures.size() <= 64 && "Too many subtarget features!");
}
// Parse the instructions; we need to do this first so that we can gather the
if (CGI->TheDef->getValueAsBit("isCodeGenOnly"))
continue;
- Matchables.emplace_front(*CGI);
- MatchableInfo *II = &Matchables.front();
+ std::unique_ptr<MatchableInfo> II(new MatchableInfo(*CGI));
II->initialize(*this, SingletonRegisters, AsmVariantNo, RegisterPrefix);
// Ignore instructions which shouldn't be matched and diagnose invalid
// instruction definitions with an error.
if (!II->validate(CommentDelimiter, true))
- Matchables.pop_front();
+ continue;
+
+ Matchables.push_back(std::move(II));
}
// Parse all of the InstAlias definitions and stick them in the list of
std::vector<Record*> AllInstAliases =
Records.getAllDerivedDefinitions("InstAlias");
for (unsigned i = 0, e = AllInstAliases.size(); i != e; ++i) {
- CodeGenInstAlias *Alias =
- new CodeGenInstAlias(AllInstAliases[i], AsmVariantNo, Target);
+ auto Alias = llvm::make_unique<CodeGenInstAlias>(AllInstAliases[i],
+ AsmVariantNo, Target);
// If the tblgen -match-prefix option is specified (for tblgen hackers),
// filter the set of instruction aliases we consider, based on the target
.startswith( MatchPrefix))
continue;
- Matchables.emplace_front(Alias);
- MatchableInfo *II = &Matchables.front();
+ std::unique_ptr<MatchableInfo> II(new MatchableInfo(std::move(Alias)));
II->initialize(*this, SingletonRegisters, AsmVariantNo, RegisterPrefix);
// Validate the alias definitions.
II->validate(CommentDelimiter, false);
+
+ Matchables.push_back(std::move(II));
}
}
// Build the information about matchables, now that we have fully formed
// classes.
- std::forward_list<MatchableInfo> NewMatchables;
+ std::vector<std::unique_ptr<MatchableInfo>> NewMatchables;
for (auto &II : Matchables) {
// Parse the tokens after the mnemonic.
// Note: buildInstructionOperandReference may insert new AsmOperands, so
// don't precompute the loop bound.
- for (unsigned i = 0; i != II.AsmOperands.size(); ++i) {
- MatchableInfo::AsmOperand &Op = II.AsmOperands[i];
+ for (unsigned i = 0; i != II->AsmOperands.size(); ++i) {
+ MatchableInfo::AsmOperand &Op = II->AsmOperands[i];
StringRef Token = Op.Token;
// Check for singleton registers.
- if (Record *RegRecord = II.AsmOperands[i].SingletonReg) {
+ if (Record *RegRecord = II->AsmOperands[i].SingletonReg) {
Op.Class = RegisterClasses[RegRecord];
assert(Op.Class && Op.Class->Registers.size() == 1 &&
"Unexpected class for singleton register");
else
OperandName = Token.substr(1);
- if (II.DefRec.is<const CodeGenInstruction *>())
- buildInstructionOperandReference(&II, OperandName, i);
+ if (II->DefRec.is<const CodeGenInstruction*>())
+ buildInstructionOperandReference(II.get(), OperandName, i);
else
- buildAliasOperandReference(&II, OperandName, Op);
+ buildAliasOperandReference(II.get(), OperandName, Op);
}
- if (II.DefRec.is<const CodeGenInstruction *>()) {
- II.buildInstructionResultOperands();
+ if (II->DefRec.is<const CodeGenInstruction*>()) {
+ II->buildInstructionResultOperands();
// If the instruction has a two-operand alias, build up the
// matchable here. We'll add them in bulk at the end to avoid
// confusing this loop.
std::string Constraint =
- II.TheDef->getValueAsString("TwoOperandAliasConstraint");
+ II->TheDef->getValueAsString("TwoOperandAliasConstraint");
if (Constraint != "") {
// Start by making a copy of the original matchable.
- NewMatchables.emplace_front(II);
+ std::unique_ptr<MatchableInfo> AliasII(new MatchableInfo(*II));
// Adjust it to be a two-operand alias.
- NewMatchables.front().formTwoOperandAlias(Constraint);
+ AliasII->formTwoOperandAlias(Constraint);
+
+ // Add the alias to the matchables list.
+ NewMatchables.push_back(std::move(AliasII));
}
} else
- II.buildAliasResultOperands();
+ II->buildAliasResultOperands();
}
- Matchables.splice_after(Matchables.before_begin(), NewMatchables);
+ if (!NewMatchables.empty())
+ std::move(NewMatchables.begin(), NewMatchables.end(),
+ std::back_inserter(Matchables));
// Process token alias definitions and set up the associated superclass
// information.
return ID;
}
+
static void emitConvertFuncs(CodeGenTarget &Target, StringRef ClassName,
- std::forward_list<MatchableInfo> &Infos,
+ std::vector<std::unique_ptr<MatchableInfo>> &Infos,
raw_ostream &OS) {
SetVector<std::string> OperandConversionKinds;
SetVector<std::string> InstructionConversionKinds;
for (auto &II : Infos) {
// Check if we have a custom match function.
std::string AsmMatchConverter =
- II.getResultInst()->TheDef->getValueAsString("AsmMatchConverter");
+ II->getResultInst()->TheDef->getValueAsString("AsmMatchConverter");
if (!AsmMatchConverter.empty()) {
std::string Signature = "ConvertCustom_" + AsmMatchConverter;
- II.ConversionFnKind = Signature;
+ II->ConversionFnKind = Signature;
// Check if we have already generated this signature.
if (!InstructionConversionKinds.insert(Signature))
std::vector<uint8_t> ConversionRow;
// Compute the convert enum and the case body.
- MaxRowLength = std::max(MaxRowLength, II.ResOperands.size() * 2 + 1);
+ MaxRowLength = std::max(MaxRowLength, II->ResOperands.size()*2 + 1 );
- for (unsigned i = 0, e = II.ResOperands.size(); i != e; ++i) {
- const MatchableInfo::ResOperand &OpInfo = II.ResOperands[i];
+ for (unsigned i = 0, e = II->ResOperands.size(); i != e; ++i) {
+ const MatchableInfo::ResOperand &OpInfo = II->ResOperands[i];
// Generate code to populate each result operand.
switch (OpInfo.Kind) {
case MatchableInfo::ResOperand::RenderAsmOperand: {
// This comes from something we parsed.
const MatchableInfo::AsmOperand &Op =
- II.AsmOperands[OpInfo.AsmOperandNum];
+ II->AsmOperands[OpInfo.AsmOperandNum];
// Registers are always converted the same, don't duplicate the
// conversion function based on them.
if (Signature == "Convert")
Signature += "_NoOperands";
- II.ConversionFnKind = Signature;
+ II->ConversionFnKind = Signature;
// Save the signature. If we already have it, don't add a new row
// to the table.
raw_ostream &OS) {
// Construct the match list.
std::vector<StringMatcher::StringPair> Matches;
- const std::vector<CodeGenRegister*> &Regs =
- Target.getRegBank().getRegisters();
- for (unsigned i = 0, e = Regs.size(); i != e; ++i) {
- const CodeGenRegister *Reg = Regs[i];
- if (Reg->TheDef->getValueAsString("AsmName").empty())
+ const auto &Regs = Target.getRegBank().getRegisters();
+ for (const CodeGenRegister &Reg : Regs) {
+ if (Reg.TheDef->getValueAsString("AsmName").empty())
continue;
- Matches.push_back(StringMatcher::StringPair(
- Reg->TheDef->getValueAsString("AsmName"),
- "return " + utostr(Reg->EnumValue) + ";"));
+ Matches.push_back(
+ StringMatcher::StringPair(Reg.TheDef->getValueAsString("AsmName"),
+ "return " + utostr(Reg.EnumValue) + ";"));
}
OS << "static unsigned MatchRegisterName(StringRef Name) {\n";
OS << "enum SubtargetFeatureFlag : " << getMinimalRequiredFeaturesType(Info)
<< " {\n";
for (const auto &SF : Info.SubtargetFeatures) {
- SubtargetFeatureInfo &SFI = *SF.second;
+ const SubtargetFeatureInfo &SFI = SF.second;
OS << " " << SFI.getEnumName() << " = (1ULL << " << SFI.Index << "),\n";
}
OS << " Feature_None = 0\n";
if (!Info.SubtargetFeatures.empty()) {
OS << " switch(Val) {\n";
for (const auto &SF : Info.SubtargetFeatures) {
- SubtargetFeatureInfo &SFI = *SF.second;
+ const SubtargetFeatureInfo &SFI = SF.second;
// FIXME: Totally just a placeholder name to get the algorithm working.
OS << " case " << SFI.getEnumName() << ": return \""
<< SFI.TheDef->getValueAsString("PredicateName") << "\";\n";
<< "ComputeAvailableFeatures(uint64_t FB) const {\n";
OS << " uint64_t Features = 0;\n";
for (const auto &SF : Info.SubtargetFeatures) {
- SubtargetFeatureInfo &SFI = *SF.second;
+ const SubtargetFeatureInfo &SFI = SF.second;
OS << " if (";
std::string CondStorage =
std::string Result;
unsigned NumFeatures = 0;
for (unsigned i = 0, e = ReqFeatures.size(); i != e; ++i) {
- SubtargetFeatureInfo *F = Info.getSubtargetFeature(ReqFeatures[i]);
+ const SubtargetFeatureInfo *F = Info.getSubtargetFeature(ReqFeatures[i]);
if (!F)
PrintFatalError(R->getLoc(), "Predicate '" + ReqFeatures[i]->getName() +
// Sort the instruction table using the partial order on classes. We use
// stable_sort to ensure that ambiguous instructions are still
// deterministically ordered.
- Info.Matchables.sort();
+ std::stable_sort(Info.Matchables.begin(), Info.Matchables.end(),
+ [](const std::unique_ptr<MatchableInfo> &a,
+ const std::unique_ptr<MatchableInfo> &b){
+ return *a < *b;});
DEBUG_WITH_TYPE("instruction_info", {
for (const auto &MI : Info.Matchables)
- MI.dump();
+ MI->dump();
});
// Check for ambiguous matchables.
for (auto I = Info.Matchables.begin(), E = Info.Matchables.end(); I != E;
++I) {
for (auto J = std::next(I); J != E; ++J) {
- const MatchableInfo &A = *I;
- const MatchableInfo &B = *J;
+ const MatchableInfo &A = **I;
+ const MatchableInfo &B = **J;
if (A.couldMatchAmbiguouslyWith(B)) {
errs() << "warning: ambiguous matchables:\n";
unsigned MaxMnemonicIndex = 0;
bool HasDeprecation = false;
for (const auto &MI : Info.Matchables) {
- MaxNumOperands = std::max(MaxNumOperands, MI.AsmOperands.size());
- HasDeprecation |= MI.HasDeprecation;
+ MaxNumOperands = std::max(MaxNumOperands, MI->AsmOperands.size());
+ HasDeprecation |= MI->HasDeprecation;
// Store a pascal-style length byte in the mnemonic.
- std::string LenMnemonic = char(MI.Mnemonic.size()) + MI.Mnemonic.str();
+ std::string LenMnemonic = char(MI->Mnemonic.size()) + MI->Mnemonic.str();
MaxMnemonicIndex = std::max(MaxMnemonicIndex,
StringTable.GetOrAddStringOffset(LenMnemonic, false));
}
OS << " " << getMinimalTypeForRange(MaxMnemonicIndex)
<< " Mnemonic;\n";
OS << " uint16_t Opcode;\n";
- OS << " " << getMinimalTypeForRange(std::distance(Info.Matchables.begin(),
- Info.Matchables.end()))
- << " ConvertFn;\n";
+ OS << " " << getMinimalTypeForRange(Info.Matchables.size())
+ << " ConvertFn;\n";
OS << " " << getMinimalRequiredFeaturesType(Info)
<< " RequiredFeatures;\n";
OS << " " << getMinimalTypeForRange(
OS << "static const MatchEntry MatchTable" << VC << "[] = {\n";
for (const auto &MI : Info.Matchables) {
- if (MI.AsmVariantID != AsmVariantNo)
+ if (MI->AsmVariantID != AsmVariantNo)
continue;
// Store a pascal-style length byte in the mnemonic.
- std::string LenMnemonic = char(MI.Mnemonic.size()) + MI.Mnemonic.str();
+ std::string LenMnemonic = char(MI->Mnemonic.size()) + MI->Mnemonic.str();
OS << " { " << StringTable.GetOrAddStringOffset(LenMnemonic, false)
- << " /* " << MI.Mnemonic << " */, " << Target.getName()
- << "::" << MI.getResultInst()->TheDef->getName() << ", "
- << MI.ConversionFnKind << ", ";
+ << " /* " << MI->Mnemonic << " */, "
+ << Target.getName() << "::"
+ << MI->getResultInst()->TheDef->getName() << ", "
+ << MI->ConversionFnKind << ", ";
// Write the required features mask.
- if (!MI.RequiredFeatures.empty()) {
- for (unsigned i = 0, e = MI.RequiredFeatures.size(); i != e; ++i) {
+ if (!MI->RequiredFeatures.empty()) {
+ for (unsigned i = 0, e = MI->RequiredFeatures.size(); i != e; ++i) {
if (i) OS << "|";
- OS << MI.RequiredFeatures[i]->getEnumName();
+ OS << MI->RequiredFeatures[i]->getEnumName();
}
} else
OS << "0";
OS << ", { ";
- for (unsigned i = 0, e = MI.AsmOperands.size(); i != e; ++i) {
- const MatchableInfo::AsmOperand &Op = MI.AsmOperands[i];
+ for (unsigned i = 0, e = MI->AsmOperands.size(); i != e; ++i) {
+ const MatchableInfo::AsmOperand &Op = MI->AsmOperands[i];
if (i) OS << ", ";
OS << Op.Class->Name;
OS << " continue;\n";
OS << " }\n";
OS << "\n";
+ OS << " Inst.clear();\n\n";
OS << " if (matchingInlineAsm) {\n";
OS << " Inst.setOpcode(it->Opcode);\n";
OS << " convertToMapAndConstraints(it->ConvertFn, Operands);\n";
projects / oota-llvm.git / blobdiff