icmp slt i32 %X, 0 ; <i1>:0 [#uses=1]
zext i1 %0 to i32 ; <i32>:1 [#uses=1]
ret i32 %1
-; CHECK: @test1
+; CHECK-LABEL: @test1(
; CHECK: lshr i32 %X, 31
; CHECK-NEXT: ret i32
}
icmp ult i32 %X, -2147483648 ; <i1>:0 [#uses=1]
zext i1 %0 to i32 ; <i32>:1 [#uses=1]
ret i32 %1
-; CHECK: @test2
+; CHECK-LABEL: @test2(
; CHECK: lshr i32 %X, 31
; CHECK-NEXT: xor i32
; CHECK-NEXT: ret i32
icmp slt i32 %X, 0 ; <i1>:0 [#uses=1]
sext i1 %0 to i32 ; <i32>:1 [#uses=1]
ret i32 %1
-; CHECK: @test3
+; CHECK-LABEL: @test3(
; CHECK: ashr i32 %X, 31
; CHECK-NEXT: ret i32
}
icmp ult i32 %X, -2147483648 ; <i1>:0 [#uses=1]
sext i1 %0 to i32 ; <i32>:1 [#uses=1]
ret i32 %1
-; CHECK: @test4
+; CHECK-LABEL: @test4(
; CHECK: ashr i32 %X, 31
; CHECK-NEXT: xor i32
; CHECK-NEXT: ret i32
entry:
%V = icmp eq <2 x i64> %x, undef
ret <2 x i1> %V
-; CHECK: @test5
+; CHECK-LABEL: @test5(
; CHECK: ret <2 x i1> <i1 true, i1 true>
}
%e = sub i32 0, %d
%f = and i32 %e, %b
ret i32 %f
-; CHECK: @test6
+; CHECK-LABEL: @test6(
; CHECK-NEXT: ashr i32 %a, 31
; CHECK-NEXT: %f = and i32 %e, %b
; CHECK-NEXT: ret i32 %f
%a = add i32 %x, -1
%b = icmp ult i32 %a, %x
ret i1 %b
-; CHECK: @test7
+; CHECK-LABEL: @test7(
; CHECK: %b = icmp ne i32 %x, 0
; CHECK: ret i1 %b
}
%a = add i32 %x, -1
%b = icmp eq i32 %a, %x
ret i1 %b
-; CHECK: @test8
+; CHECK-LABEL: @test8(
; CHECK: ret i1 false
}
%a = add i32 %x, -2
%b = icmp ugt i32 %x, %a
ret i1 %b
-; CHECK: @test9
+; CHECK-LABEL: @test9(
; CHECK: icmp ugt i32 %x, 1
; CHECK: ret i1 %b
}
%b = icmp slt i32 %a, %x
ret i1 %b
-; CHECK: @test10
+; CHECK-LABEL: @test10(
; CHECK: %b = icmp ne i32 %x, -2147483648
; CHECK: ret i1 %b
}
%a = add nsw i32 %x, 8
%b = icmp slt i32 %x, %a
ret i1 %b
-; CHECK: @test11
+; CHECK-LABEL: @test11(
; CHECK: ret i1 true
}
%S = select i1 %A, i64 -4294967295, i64 8589934591
%B = icmp ne i64 bitcast (<2 x i32> <i32 1, i32 -1> to i64), %S
ret i1 %B
-; CHECK: @test12
+; CHECK-LABEL: @test12(
; CHECK-NEXT: = xor i1 %A, true
; CHECK-NEXT: ret i1
}
entry:
%cmp = icmp slt i8 undef, %X
ret i1 %cmp
-; CHECK: @test13
+; CHECK-LABEL: @test13(
; CHECK: ret i1 false
}
entry:
%cmp = icmp slt i8 undef, -128
ret i1 %cmp
-; CHECK: @test14
+; CHECK-LABEL: @test14(
; CHECK: ret i1 false
}
entry:
%cmp = icmp eq i8 undef, -128
ret i1 %cmp
-; CHECK: @test15
+; CHECK-LABEL: @test15(
; CHECK: ret i1 undef
}
entry:
%cmp = icmp ne i8 undef, -128
ret i1 %cmp
-; CHECK: @test16
+; CHECK-LABEL: @test16(
; CHECK: ret i1 undef
}
%and = and i32 %shl, 8
%cmp = icmp eq i32 %and, 0
ret i1 %cmp
-; CHECK: @test17
+; CHECK-LABEL: @test17(
; CHECK-NEXT: %cmp = icmp ne i32 %x, 3
}
%and = and i32 %sh, 1
%cmp = icmp eq i32 %and, 0
ret i1 %cmp
-; CHECK: @test18
+; CHECK-LABEL: @test18(
; CHECK-NEXT: %cmp = icmp ne i32 %x, 3
}
%and = and i32 %shl, 8
%cmp = icmp eq i32 %and, 8
ret i1 %cmp
-; CHECK: @test19
+; CHECK-LABEL: @test19(
; CHECK-NEXT: %cmp = icmp eq i32 %x, 3
}
%and = and i32 %shl, 8
%cmp = icmp ne i32 %and, 0
ret i1 %cmp
-; CHECK: @test20
+; CHECK-LABEL: @test20(
; CHECK-NEXT: %cmp = icmp eq i32 %x, 3
}
define i1 @test21(i8 %x, i8 %y) {
-; CHECK: @test21
+; CHECK-LABEL: @test21(
; CHECK-NOT: or i8
; CHECK: icmp ugt
%A = or i8 %x, 1
}
define i1 @test22(i8 %x, i8 %y) {
-; CHECK: @test22
+; CHECK-LABEL: @test22(
; CHECK-NOT: or i8
; CHECK: icmp ult
%A = or i8 %x, 1
}
; PR2740
-; CHECK: @test23
+; CHECK-LABEL: @test23(
; CHECK: icmp sgt i32 %x, 1328634634
define i1 @test23(i32 %x) nounwind {
%i3 = sdiv i32 %x, -1328634635
@X = global [1000 x i32] zeroinitializer
; PR8882
-; CHECK: @test24
+; CHECK-LABEL: @test24(
; CHECK: %cmp = icmp eq i64 %i, 1000
; CHECK: ret i1 %cmp
define i1 @test24(i64 %i) {
ret i1 %cmp
}
-; CHECK: @test25
+; CHECK-LABEL: @test25(
; X + Z > Y + Z -> X > Y if there is no overflow.
; CHECK: %c = icmp sgt i32 %x, %y
; CHECK: ret i1 %c
ret i1 %c
}
-; CHECK: @test26
+; CHECK-LABEL: @test26(
; X + Z > Y + Z -> X > Y if there is no overflow.
; CHECK: %c = icmp ugt i32 %x, %y
; CHECK: ret i1 %c
ret i1 %c
}
-; CHECK: @test27
+; CHECK-LABEL: @test27(
; X - Z > Y - Z -> X > Y if there is no overflow.
; CHECK: %c = icmp sgt i32 %x, %y
; CHECK: ret i1 %c
ret i1 %c
}
-; CHECK: @test28
+; CHECK-LABEL: @test28(
; X - Z > Y - Z -> X > Y if there is no overflow.
; CHECK: %c = icmp ugt i32 %x, %y
; CHECK: ret i1 %c
ret i1 %c
}
-; CHECK: @test29
+; CHECK-LABEL: @test29(
; X + Y > X -> Y > 0 if there is no overflow.
; CHECK: %c = icmp sgt i32 %y, 0
; CHECK: ret i1 %c
ret i1 %c
}
-; CHECK: @test30
+; CHECK-LABEL: @test30(
; X + Y > X -> Y > 0 if there is no overflow.
; CHECK: %c = icmp ne i32 %y, 0
; CHECK: ret i1 %c
ret i1 %c
}
-; CHECK: @test31
+; CHECK-LABEL: @test31(
; X > X + Y -> 0 > Y if there is no overflow.
; CHECK: %c = icmp slt i32 %y, 0
; CHECK: ret i1 %c
ret i1 %c
}
-; CHECK: @test32
+; CHECK-LABEL: @test32(
; X > X + Y -> 0 > Y if there is no overflow.
; CHECK: ret i1 false
define i1 @test32(i32 %x, i32 %y) {
ret i1 %c
}
-; CHECK: @test33
+; CHECK-LABEL: @test33(
; X - Y > X -> 0 > Y if there is no overflow.
; CHECK: %c = icmp slt i32 %y, 0
; CHECK: ret i1 %c
ret i1 %c
}
-; CHECK: @test34
+; CHECK-LABEL: @test34(
; X - Y > X -> 0 > Y if there is no overflow.
; CHECK: ret i1 false
define i1 @test34(i32 %x, i32 %y) {
ret i1 %c
}
-; CHECK: @test35
+; CHECK-LABEL: @test35(
; X > X - Y -> Y > 0 if there is no overflow.
; CHECK: %c = icmp sgt i32 %y, 0
; CHECK: ret i1 %c
ret i1 %c
}
-; CHECK: @test36
+; CHECK-LABEL: @test36(
; X > X - Y -> Y > 0 if there is no overflow.
; CHECK: %c = icmp ne i32 %y, 0
; CHECK: ret i1 %c
ret i1 %c
}
-; CHECK: @test37
+; CHECK-LABEL: @test37(
; X - Y > X - Z -> Z > Y if there is no overflow.
; CHECK: %c = icmp sgt i32 %z, %y
; CHECK: ret i1 %c
ret i1 %c
}
-; CHECK: @test38
+; CHECK-LABEL: @test38(
; X - Y > X - Z -> Z > Y if there is no overflow.
; CHECK: %c = icmp ugt i32 %z, %y
; CHECK: ret i1 %c
}
; PR9343 #1
-; CHECK: @test39
+; CHECK-LABEL: @test39(
; CHECK: %B = icmp eq i32 %X, 0
define i1 @test39(i32 %X, i32 %Y) {
%A = ashr exact i32 %X, %Y
ret i1 %B
}
-; CHECK: @test40
+; CHECK-LABEL: @test40(
; CHECK: %B = icmp ne i32 %X, 0
define i1 @test40(i32 %X, i32 %Y) {
%A = lshr exact i32 %X, %Y
}
; PR9343 #3
-; CHECK: @test41
+; CHECK-LABEL: @test41(
; CHECK: ret i1 true
define i1 @test41(i32 %X, i32 %Y) {
%A = urem i32 %X, %Y
ret i1 %B
}
-; CHECK: @test42
+; CHECK-LABEL: @test42(
; CHECK: %B = icmp sgt i32 %Y, -1
define i1 @test42(i32 %X, i32 %Y) {
%A = srem i32 %X, %Y
ret i1 %B
}
-; CHECK: @test43
+; CHECK-LABEL: @test43(
; CHECK: %B = icmp slt i32 %Y, 0
define i1 @test43(i32 %X, i32 %Y) {
%A = srem i32 %X, %Y
ret i1 %B
}
-; CHECK: @test44
+; CHECK-LABEL: @test44(
; CHECK: %B = icmp sgt i32 %Y, -1
define i1 @test44(i32 %X, i32 %Y) {
%A = srem i32 %X, %Y
ret i1 %B
}
-; CHECK: @test45
+; CHECK-LABEL: @test45(
; CHECK: %B = icmp slt i32 %Y, 0
define i1 @test45(i32 %X, i32 %Y) {
%A = srem i32 %X, %Y
}
; PR9343 #4
-; CHECK: @test46
+; CHECK-LABEL: @test46(
; CHECK: %C = icmp ult i32 %X, %Y
define i1 @test46(i32 %X, i32 %Y, i32 %Z) {
%A = ashr exact i32 %X, %Z
}
; PR9343 #5
-; CHECK: @test47
+; CHECK-LABEL: @test47(
; CHECK: %C = icmp ugt i32 %X, %Y
define i1 @test47(i32 %X, i32 %Y, i32 %Z) {
%A = ashr exact i32 %X, %Z
}
; PR9343 #8
-; CHECK: @test48
+; CHECK-LABEL: @test48(
; CHECK: %C = icmp eq i32 %X, %Y
define i1 @test48(i32 %X, i32 %Y, i32 %Z) {
%A = sdiv exact i32 %X, %Z
}
; PR8469
-; CHECK: @test49
+; CHECK-LABEL: @test49(
; CHECK: ret <2 x i1> <i1 true, i1 true>
define <2 x i1> @test49(<2 x i32> %tmp3) {
entry:
}
; PR9343 #7
-; CHECK: @test50
+; CHECK-LABEL: @test50(
; CHECK: ret i1 true
define i1 @test50(i16 %X, i32 %Y) {
%A = zext i16 %X to i32
ret i1 %C
}
-; CHECK: @test51
+; CHECK-LABEL: @test51(
; CHECK: ret i1 %C
define i1 @test51(i32 %X, i32 %Y) {
%A = and i32 %X, 2147483648
ret i1 %C
}
-; CHECK: @test52
+; CHECK-LABEL: @test52(
; CHECK-NEXT: and i32 %x1, 16711935
; CHECK-NEXT: icmp eq i32 {{.*}}, 4980863
; CHECK-NEXT: ret i1
}
; PR9838
-; CHECK: @test53
+; CHECK-LABEL: @test53(
; CHECK-NEXT: ashr exact
; CHECK-NEXT: ashr
; CHECK-NEXT: icmp
ret i1 %z
}
-; CHECK: @test54
+; CHECK-LABEL: @test54(
; CHECK-NEXT: %and = and i8 %a, -64
; CHECK-NEXT: icmp eq i8 %and, -128
define i1 @test54(i8 %a) nounwind {
ret i1 %ret
}
-; CHECK: @test55
+; CHECK-LABEL: @test55(
; CHECK-NEXT: icmp eq i32 %a, -123
define i1 @test55(i32 %a) {
%sub = sub i32 0, %a
ret i1 %cmp
}
-; CHECK: @test56
+; CHECK-LABEL: @test56(
; CHECK-NEXT: icmp eq i32 %a, -113
define i1 @test56(i32 %a) {
%sub = sub i32 10, %a
; PR10267 Don't make icmps more expensive when no other inst is subsumed.
declare void @foo(i32)
-; CHECK: @test57
+; CHECK-LABEL: @test57(
; CHECK: %and = and i32 %a, -2
; CHECK: %cmp = icmp ne i32 %and, 0
define i1 @test57(i32 %a) {
}
; rdar://problem/10482509
-; CHECK: @cmpabs1
+; CHECK-LABEL: @cmpabs1(
; CHECK-NEXT: icmp ne
define zeroext i1 @cmpabs1(i64 %val) {
%sub = sub nsw i64 0, %val
ret i1 %tobool
}
-; CHECK: @cmpabs2
+; CHECK-LABEL: @cmpabs2(
; CHECK-NEXT: icmp ne
define zeroext i1 @cmpabs2(i64 %val) {
%sub = sub nsw i64 0, %val
ret i1 %tobool
}
-; CHECK: @test58
+; CHECK-LABEL: @test58(
; CHECK-NEXT: call i32 @test58_d(i64 36029346783166592)
define void @test58() nounwind {
%cast = bitcast <1 x i64> <i64 36029346783166592> to i64
%use = ptrtoint i8* %cast1 to i64
%call = call i32 @test58_d(i64 %use) nounwind
ret i1 %cmp
-; CHECK: @test59
+; CHECK-LABEL: @test59(
; CHECK: ret i1 true
}
%cast1 = bitcast i32* %gep1 to i8*
%cmp = icmp ult i8* %cast1, %gep2
ret i1 %cmp
-; CHECK: @test60
+; CHECK-LABEL: @test60(
; CHECK-NEXT: %gep1.idx = shl nuw i64 %i, 2
; CHECK-NEXT: icmp slt i64 %gep1.idx, %j
; CHECK-NEXT: ret i1
%cmp = icmp ult i8* %cast1, %gep2
ret i1 %cmp
; Don't transform non-inbounds GEPs.
-; CHECK: @test61
+; CHECK-LABEL: @test61(
; CHECK: icmp ult i8* %cast1, %gep2
; CHECK-NEXT: ret i1
}
%arrayidx2 = getelementptr inbounds i8* %a, i64 10
%cmp = icmp slt i8* %arrayidx1, %arrayidx2
ret i1 %cmp
-; CHECK: @test62
+; CHECK-LABEL: @test62(
; CHECK-NEXT: ret i1 true
}
%t = and i32 %b, 255
%c = icmp eq i32 %z, %t
ret i1 %c
-; CHECK: @test63
+; CHECK-LABEL: @test63(
; CHECK-NEXT: %1 = trunc i32 %b to i8
; CHECK-NEXT: %c = icmp eq i8 %1, %a
; CHECK-NEXT: ret i1 %c
%z = zext i8 %a to i32
%c = icmp eq i32 %t, %z
ret i1 %c
-; CHECK: @test64
+; CHECK-LABEL: @test64(
; CHECK-NEXT: %1 = trunc i32 %b to i8
; CHECK-NEXT: %c = icmp eq i8 %1, %a
; CHECK-NEXT: ret i1 %c
%s1 = add i64 %A, %B
%s2 = add i64 %A, %B
%cmp = icmp eq i64 %s1, %s2
-; CHECK: @test65
+; CHECK-LABEL: @test65(
; CHECK-NEXT: ret i1 true
ret i1 %cmp
}
%s1 = add i64 %A, %B
%s2 = add i64 %B, %A
%cmp = icmp eq i64 %s1, %s2
-; CHECK: @test66
+; CHECK-LABEL: @test66(
; CHECK-NEXT: ret i1 true
ret i1 %cmp
}
-; CHECK: @test67
+; CHECK-LABEL: @test67(
; CHECK: %and = and i32 %x, 96
; CHECK: %cmp = icmp ne i32 %and, 0
define i1 @test67(i32 %x) nounwind uwtable {
ret i1 %cmp
}
-; CHECK: @test68
+; CHECK-LABEL: @test68(
; CHECK: %cmp = icmp ugt i32 %and, 30
define i1 @test68(i32 %x) nounwind uwtable {
%and = and i32 %x, 127
}
; PR14708
-; CHECK: @test69
+; CHECK-LABEL: @test69(
; CHECK: %1 = and i32 %c, -33
; CHECK: %2 = icmp eq i32 %1, 65
; CHECK: ret i1 %2
}
; PR15940
-; CHECK: @test70
+; CHECK-LABEL: @test70(
; CHECK-NEXT: %A = srem i32 5, %X
; CHECK-NEXT: %C = icmp ne i32 %A, 2
; CHECK-NEXT: ret i1 %C
ret i1 %C
}
-; CHECK: @icmp_sext16trunc
+; CHECK-LABEL: @icmp_sext16trunc(
; CHECK-NEXT: %1 = trunc i32 %x to i16
; CHECK-NEXT: %cmp = icmp slt i16 %1, 36
define i1 @icmp_sext16trunc(i32 %x) {
ret i1 %cmp
}
-; CHECK: @icmp_sext8trunc
+; CHECK-LABEL: @icmp_sext8trunc(
; CHECK-NEXT: %1 = trunc i32 %x to i8
; CHECK-NEXT: %cmp = icmp slt i8 %1, 36
define i1 @icmp_sext8trunc(i32 %x) {
ret i1 %cmp
}
-; CHECK: @icmp_shl16
+; CHECK-LABEL: @icmp_shl16(
; CHECK-NEXT: %1 = trunc i32 %x to i16
; CHECK-NEXT: %cmp = icmp slt i16 %1, 36
define i1 @icmp_shl16(i32 %x) {
ret i1 %cmp
}
-; CHECK: @icmp_shl24
+; CHECK-LABEL: @icmp_shl24(
; CHECK-NEXT: %1 = trunc i32 %x to i8
; CHECK-NEXT: %cmp = icmp slt i8 %1, 36
define i1 @icmp_shl24(i32 %x) {
; If the (shl x, C) preserved the sign and this is a sign test,
; compare the LHS operand instead
-; CHECK: @icmp_shl_nsw_sgt
+; CHECK-LABEL: @icmp_shl_nsw_sgt(
; CHECK-NEXT: icmp sgt i32 %x, 0
define i1 @icmp_shl_nsw_sgt(i32 %x) {
%shl = shl nsw i32 %x, 21
ret i1 %cmp
}
-; CHECK: @icmp_shl_nsw_sge0
+; CHECK-LABEL: @icmp_shl_nsw_sge0(
; CHECK-NEXT: icmp sgt i32 %x, -1
define i1 @icmp_shl_nsw_sge0(i32 %x) {
%shl = shl nsw i32 %x, 21
ret i1 %cmp
}
-; CHECK: @icmp_shl_nsw_sge1
+; CHECK-LABEL: @icmp_shl_nsw_sge1(
; CHECK-NEXT: icmp sgt i32 %x, 0
define i1 @icmp_shl_nsw_sge1(i32 %x) {
%shl = shl nsw i32 %x, 21
}
; Checks for icmp (eq|ne) (shl x, C), 0
-; CHECK: @icmp_shl_nsw_eq
+; CHECK-LABEL: @icmp_shl_nsw_eq(
; CHECK-NEXT: icmp eq i32 %x, 0
define i1 @icmp_shl_nsw_eq(i32 %x) {
%mul = shl nsw i32 %x, 5
ret i1 %cmp
}
-; CHECK: @icmp_shl_eq
+; CHECK-LABEL: @icmp_shl_eq(
; CHECK-NOT: icmp eq i32 %mul, 0
define i1 @icmp_shl_eq(i32 %x) {
%mul = shl i32 %x, 5
ret i1 %cmp
}
-; CHECK: @icmp_shl_nsw_ne
+; CHECK-LABEL: @icmp_shl_nsw_ne(
; CHECK-NEXT: icmp ne i32 %x, 0
define i1 @icmp_shl_nsw_ne(i32 %x) {
%mul = shl nsw i32 %x, 7
ret i1 %cmp
}
-; CHECK: @icmp_shl_ne
+; CHECK-LABEL: @icmp_shl_ne(
; CHECK-NOT: icmp ne i32 %x, 0
define i1 @icmp_shl_ne(i32 %x) {
%mul = shl i32 %x, 7
; If the (mul x, C) preserved the sign and this is sign test,
; compare the LHS operand instead
-; CHECK: @icmp_mul_nsw
+; CHECK-LABEL: @icmp_mul_nsw(
; CHECK-NEXT: icmp sgt i32 %x, 0
define i1 @icmp_mul_nsw(i32 %x) {
%mul = mul nsw i32 %x, 12
ret i1 %cmp
}
-; CHECK: @icmp_mul_nsw1
+; CHECK-LABEL: @icmp_mul_nsw1(
; CHECK-NEXT: icmp slt i32 %x, 0
define i1 @icmp_mul_nsw1(i32 %x) {
%mul = mul nsw i32 %x, 12
ret i1 %cmp
}
-; CHECK: @icmp_mul_nsw_neg
+; CHECK-LABEL: @icmp_mul_nsw_neg(
; CHECK-NEXT: icmp slt i32 %x, 1
define i1 @icmp_mul_nsw_neg(i32 %x) {
%mul = mul nsw i32 %x, -12
ret i1 %cmp
}
-; CHECK: @icmp_mul_nsw_neg1
+; CHECK-LABEL: @icmp_mul_nsw_neg1(
; CHECK-NEXT: icmp slt i32 %x, 0
define i1 @icmp_mul_nsw_neg1(i32 %x) {
%mul = mul nsw i32 %x, -12
ret i1 %cmp
}
-; CHECK: @icmp_mul_nsw_0
+; CHECK-LABEL: @icmp_mul_nsw_0(
; CHECK-NOT: icmp sgt i32 %x, 0
define i1 @icmp_mul_nsw_0(i32 %x) {
%mul = mul nsw i32 %x, 0
ret i1 %cmp
}
-; CHECK: @icmp_mul
+; CHECK-LABEL: @icmp_mul(
; CHECK-NEXT: %mul = mul i32 %x, -12
define i1 @icmp_mul(i32 %x) {
%mul = mul i32 %x, -12
}
; Checks for icmp (eq|ne) (mul x, C), 0
-; CHECK: @icmp_mul_neq0
+; CHECK-LABEL: @icmp_mul_neq0(
; CHECK-NEXT: icmp ne i32 %x, 0
define i1 @icmp_mul_neq0(i32 %x) {
%mul = mul nsw i32 %x, -12
ret i1 %cmp
}
-; CHECK: @icmp_mul_eq0
+; CHECK-LABEL: @icmp_mul_eq0(
; CHECK-NEXT: icmp eq i32 %x, 0
define i1 @icmp_mul_eq0(i32 %x) {
%mul = mul nsw i32 %x, 12
ret i1 %cmp
}
-; CHECK: @icmp_mul0_eq0
+; CHECK-LABEL: @icmp_mul0_eq0(
; CHECK-NEXT: ret i1 true
define i1 @icmp_mul0_eq0(i32 %x) {
%mul = mul i32 %x, 0
ret i1 %cmp
}
-; CHECK: @icmp_mul0_ne0
+; CHECK-LABEL: @icmp_mul0_ne0(
; CHECK-NEXT: ret i1 false
define i1 @icmp_mul0_ne0(i32 %x) {
%mul = mul i32 %x, 0
ret i1 %cmp
}
-; CHECK: @icmp_sub1_sge
+; CHECK-LABEL: @icmp_sub1_sge(
; CHECK-NEXT: icmp sgt i32 %x, %y
define i1 @icmp_sub1_sge(i32 %x, i32 %y) {
%sub = add nsw i32 %x, -1
ret i1 %cmp
}
-; CHECK: @icmp_add1_sgt
+; CHECK-LABEL: @icmp_add1_sgt(
; CHECK-NEXT: icmp sge i32 %x, %y
define i1 @icmp_add1_sgt(i32 %x, i32 %y) {
%add = add nsw i32 %x, 1
ret i1 %cmp
}
-; CHECK: @icmp_sub1_slt
+; CHECK-LABEL: @icmp_sub1_slt(
; CHECK-NEXT: icmp sle i32 %x, %y
define i1 @icmp_sub1_slt(i32 %x, i32 %y) {
%sub = add nsw i32 %x, -1
ret i1 %cmp
}
-; CHECK: @icmp_add1_sle
+; CHECK-LABEL: @icmp_add1_sle(
; CHECK-NEXT: icmp slt i32 %x, %y
define i1 @icmp_add1_sle(i32 %x, i32 %y) {
%add = add nsw i32 %x, 1
ret i1 %cmp
}
-; CHECK: @icmp_add20_sge_add57
+; CHECK-LABEL: @icmp_add20_sge_add57(
; CHECK-NEXT: [[ADD:%[a-z0-9]+]] = add nsw i32 %y, 37
; CHECK-NEXT: icmp sle i32 [[ADD]], %x
define i1 @icmp_add20_sge_add57(i32 %x, i32 %y) {
ret i1 %cmp
}
-; CHECK: @icmp_sub57_sge_sub20
+; CHECK-LABEL: @icmp_sub57_sge_sub20(
; CHECK-NEXT: [[SUB:%[a-z0-9]+]] = add nsw i32 %x, -37
; CHECK-NEXT: icmp sge i32 [[SUB]], %y
define i1 @icmp_sub57_sge_sub20(i32 %x, i32 %y) {
ret i1 %cmp
}
-; CHECK: @icmp_and_shl_neg_ne_0
+; CHECK-LABEL: @icmp_and_shl_neg_ne_0(
; CHECK-NEXT: [[SHL:%[a-z0-9]+]] = shl i32 1, %B
; CHECK-NEXT: [[AND:%[a-z0-9]+]] = and i32 [[SHL]], %A
; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp eq i32 [[AND]], 0
ret i1 %cmp
}
-; CHECK: @icmp_and_shl_neg_eq_0
+; CHECK-LABEL: @icmp_and_shl_neg_eq_0(
; CHECK-NEXT: [[SHL:%[a-z0-9]+]] = shl i32 1, %B
; CHECK-NEXT: [[AND:%[a-z0-9]+]] = and i32 [[SHL]], %A
; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp ne i32 [[AND]], 0
ret i1 %cmp
}
-; CHECK: @icmp_add_and_shr_ne_0
+; CHECK-LABEL: @icmp_add_and_shr_ne_0(
; CHECK-NEXT: [[AND:%[a-z0-9]+]] = and i32 %X, 240
; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp ne i32 [[AND]], 224
; CHECK-NEXT: ret i1 [[CMP]]
ret i1 %c
}
-; CHECK: @icmp_shl_1_V_ult_32
+; CHECK-LABEL: @icmp_shl_1_V_ult_32(
; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp ult i32 %V, 5
; CHECK-NEXT: ret i1 [[CMP]]
define i1 @icmp_shl_1_V_ult_32(i32 %V) {
ret i1 %cmp
}
-; CHECK: @icmp_shl_1_V_eq_32
+; CHECK-LABEL: @icmp_shl_1_V_eq_32(
; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp eq i32 %V, 5
; CHECK-NEXT: ret i1 [[CMP]]
define i1 @icmp_shl_1_V_eq_32(i32 %V) {
ret i1 %cmp
}
-; CHECK: @icmp_shl_1_V_eq_31
+; CHECK-LABEL: @icmp_shl_1_V_eq_31(
; CHECK-NEXT: ret i1 false
define i1 @icmp_shl_1_V_eq_31(i32 %V) {
%shl = shl i32 1, %V
ret i1 %cmp
}
-; CHECK: @icmp_shl_1_V_ne_31
+; CHECK-LABEL: @icmp_shl_1_V_ne_31(
; CHECK-NEXT: ret i1 true
define i1 @icmp_shl_1_V_ne_31(i32 %V) {
%shl = shl i32 1, %V
ret i1 %cmp
}
-; CHECK: @icmp_shl_1_V_ult_30
+; CHECK-LABEL: @icmp_shl_1_V_ult_30(
; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp ult i32 %V, 5
; CHECK-NEXT: ret i1 [[CMP]]
define i1 @icmp_shl_1_V_ult_30(i32 %V) {
ret i1 %cmp
}
-; CHECK: @icmp_shl_1_V_ugt_30
+; CHECK-LABEL: @icmp_shl_1_V_ugt_30(
; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp ugt i32 %V, 4
; CHECK-NEXT: ret i1 [[CMP]]
define i1 @icmp_shl_1_V_ugt_30(i32 %V) {
ret i1 %cmp
}
-; CHECK: @icmp_shl_1_V_ule_30
+; CHECK-LABEL: @icmp_shl_1_V_ule_30(
; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp ult i32 %V, 5
; CHECK-NEXT: ret i1 [[CMP]]
define i1 @icmp_shl_1_V_ule_30(i32 %V) {
ret i1 %cmp
}
-; CHECK: @icmp_shl_1_V_uge_30
+; CHECK-LABEL: @icmp_shl_1_V_uge_30(
; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp ugt i32 %V, 4
; CHECK-NEXT: ret i1 [[CMP]]
define i1 @icmp_shl_1_V_uge_30(i32 %V) {
ret i1 %cmp
}
-; CHECK: @icmp_shl_1_V_uge_2147483648
+; CHECK-LABEL: @icmp_shl_1_V_uge_2147483648(
; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp eq i32 %V, 31
; CHECK-NEXT: ret i1 [[CMP]]
define i1 @icmp_shl_1_V_uge_2147483648(i32 %V) {
ret i1 %cmp
}
-; CHECK: @icmp_shl_1_V_ugt_2147483648
+; CHECK-LABEL: @icmp_shl_1_V_ugt_2147483648(
; CHECK-NEXT: ret i1 false
define i1 @icmp_shl_1_V_ugt_2147483648(i32 %V) {
%shl = shl i32 1, %V
ret i1 %cmp
}
-; CHECK: @icmp_shl_1_V_ule_2147483648
+; CHECK-LABEL: @icmp_shl_1_V_ule_2147483648(
; CHECK-NEXT: ret i1 true
define i1 @icmp_shl_1_V_ule_2147483648(i32 %V) {
%shl = shl i32 1, %V
ret i1 %cmp
}
-; CHECK: @icmp_shl_1_V_ult_2147483648
+; CHECK-LABEL: @icmp_shl_1_V_ult_2147483648(
; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp ne i32 %V, 31
; CHECK-NEXT: ret i1 [[CMP]]
define i1 @icmp_shl_1_V_ult_2147483648(i32 %V) {
ret i1 %cmp
}
-; CHECK: @or_icmp_eq_B_0_icmp_ult_A_B
+; CHECK-LABEL: @or_icmp_eq_B_0_icmp_ult_A_B(
; CHECK-NEXT: [[SUB:%[a-z0-9]+]] = add i64 %b, -1
; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp uge i64 [[SUB]], %a
; CHECK-NEXT: ret i1 [[CMP]]
ret i1 %3
}
-; CHECK: @icmp_add_ult_2
+; CHECK-LABEL: @icmp_add_ult_2(
; CHECK-NEXT: [[AND:%[a-z0-9]+]] = and i32 %X, -2
; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp eq i32 [[AND]], 14
; CHECK-NEXT: ret i1 [[CMP]]
ret i1 %cmp
}
-; CHECK: @icmp_sub_3_X_ult_2
+; CHECK-LABEL: @icmp_sub_3_X_ult_2(
; CHECK-NEXT: [[OR:%[a-z0-9]+]] = or i32 %X, 1
; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp eq i32 [[OR]], 3
; CHECK-NEXT: ret i1 [[CMP]]
ret i1 %cmp
}
-; CHECK: @icmp_sub_3_X_uge_2
+; CHECK-LABEL: @icmp_sub_3_X_uge_2(
; CHECK-NEXT: [[OR:%[a-z0-9]+]] = or i32 %X, 1
; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp ne i32 [[OR]], 3
; CHECK-NEXT: ret i1 [[CMP]]