Move the complex address expression out of DIVariable and into an extra

[oota-llvm.git] / test / Linker / Inputs / type-unique-inheritance-b.ll

diff --git a/test/Linker/Inputs/type-unique-inheritance-b.ll b/test/Linker/Inputs/type-unique-inheritance-b.ll
index 0cd43f6a9d4475ad88ad248b84a9677ead8aa38c..d6bf74fc9722b45e86accf3a447d2c62dcdc3973 100644 (file)
--- a/test/Linker/Inputs/type-unique-inheritance-b.ll
+++ b/test/Linker/Inputs/type-unique-inheritance-b.ll
@@ -10,13 +10,13 @@ entry:
   %a.addr = alloca i32, align 4
   %t = alloca %class.B, align 8
   store i32 %a, i32* %a.addr, align 4
-  call void @llvm.dbg.declare(metadata !{i32* %a.addr}, metadata !28), !dbg !29
-  call void @llvm.dbg.declare(metadata !{%class.B* %t}, metadata !30), !dbg !31
+  call void @llvm.dbg.declare(metadata !{i32* %a.addr}, metadata !28, metadata !{}), !dbg !29
+  call void @llvm.dbg.declare(metadata !{%class.B* %t}, metadata !30, metadata !{}), !dbg !31
   ret void, !dbg !32
 }
 
 ; Function Attrs: nounwind readnone
-declare void @llvm.dbg.declare(metadata, metadata) #1
+declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
 
 ; Function Attrs: ssp uwtable
 define i32 @main() #2 {
@@ -24,7 +24,7 @@ entry:
   %retval = alloca i32, align 4
   %a = alloca %class.A, align 4
   store i32 0, i32* %retval
-  call void @llvm.dbg.declare(metadata !{%class.A* %a}, metadata !33), !dbg !34
+  call void @llvm.dbg.declare(metadata !{%class.A* %a}, metadata !33, metadata !{}), !dbg !34
   call void @_Z1fi(i32 0), !dbg !35
   call void @_Z1gi(i32 1), !dbg !36
   ret i32 0, !dbg !37