;
; SSE41-LABEL: max_gt_v4i32c:
; SSE41: # BB#0:
-; SSE41-NEXT: movdqa {{.*#+}} xmm0 = [4294967289,4294967295,1,7]
-; SSE41-NEXT: pmaxud {{.*}}(%rip), %xmm0
+; SSE41-NEXT: movaps {{.*#+}} xmm0 = [4294967295,4294967295,7,7]
; SSE41-NEXT: retq
;
; SSE42-LABEL: max_gt_v4i32c:
; SSE42: # BB#0:
-; SSE42-NEXT: movdqa {{.*#+}} xmm0 = [4294967289,4294967295,1,7]
-; SSE42-NEXT: pmaxud {{.*}}(%rip), %xmm0
+; SSE42-NEXT: movaps {{.*#+}} xmm0 = [4294967295,4294967295,7,7]
; SSE42-NEXT: retq
;
; AVX-LABEL: max_gt_v4i32c:
; AVX: # BB#0:
-; AVX-NEXT: vmovdqa {{.*#+}} xmm0 = [4294967289,4294967295,1,7]
-; AVX-NEXT: vpmaxud {{.*}}(%rip), %xmm0, %xmm0
+; AVX-NEXT: vmovaps {{.*#+}} xmm0 = [4294967295,4294967295,7,7]
; AVX-NEXT: retq
%1 = insertelement <4 x i32> <i32 -7, i32 -1, i32 1, i32 7>, i32 -7, i32 0
%2 = insertelement <4 x i32> <i32 -1, i32 -7, i32 7, i32 1>, i32 -1, i32 0
;
; SSE41-LABEL: max_gt_v8i32c:
; SSE41: # BB#0:
-; SSE41-NEXT: movdqa {{.*#+}} xmm1 = [1,3,5,7]
-; SSE41-NEXT: movdqa {{.*#+}} xmm0 = [4294967289,4294967291,4294967293,4294967295]
-; SSE41-NEXT: pmaxud {{.*}}(%rip), %xmm0
-; SSE41-NEXT: pmaxud {{.*}}(%rip), %xmm1
+; SSE41-NEXT: movaps {{.*#+}} xmm0 = [4294967295,4294967293,4294967293,4294967295]
+; SSE41-NEXT: movaps {{.*#+}} xmm1 = [7,5,5,7]
; SSE41-NEXT: retq
;
; SSE42-LABEL: max_gt_v8i32c:
; SSE42: # BB#0:
-; SSE42-NEXT: movdqa {{.*#+}} xmm1 = [1,3,5,7]
-; SSE42-NEXT: movdqa {{.*#+}} xmm0 = [4294967289,4294967291,4294967293,4294967295]
-; SSE42-NEXT: pmaxud {{.*}}(%rip), %xmm0
-; SSE42-NEXT: pmaxud {{.*}}(%rip), %xmm1
+; SSE42-NEXT: movaps {{.*#+}} xmm0 = [4294967295,4294967293,4294967293,4294967295]
+; SSE42-NEXT: movaps {{.*#+}} xmm1 = [7,5,5,7]
; SSE42-NEXT: retq
;
-; AVX1-LABEL: max_gt_v8i32c:
-; AVX1: # BB#0:
-; AVX1-NEXT: vmovdqa {{.*#+}} xmm0 = [4294967289,4294967291,4294967293,4294967295]
-; AVX1-NEXT: vpmaxud {{.*}}(%rip), %xmm0, %xmm0
-; AVX1-NEXT: vmovdqa {{.*#+}} xmm1 = [1,3,5,7]
-; AVX1-NEXT: vpmaxud {{.*}}(%rip), %xmm1, %xmm1
-; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
-; AVX1-NEXT: retq
-;
-; AVX2-LABEL: max_gt_v8i32c:
-; AVX2: # BB#0:
-; AVX2-NEXT: vmovdqa {{.*#+}} ymm0 = [4294967289,4294967291,4294967293,4294967295,1,3,5,7]
-; AVX2-NEXT: vpmaxud {{.*}}(%rip), %ymm0, %ymm0
-; AVX2-NEXT: retq
-;
-; AVX512-LABEL: max_gt_v8i32c:
-; AVX512: # BB#0:
-; AVX512-NEXT: vmovdqa {{.*#+}} ymm0 = [4294967289,4294967291,4294967293,4294967295,1,3,5,7]
-; AVX512-NEXT: vpmaxud {{.*}}(%rip), %ymm0, %ymm0
-; AVX512-NEXT: retq
+; AVX-LABEL: max_gt_v8i32c:
+; AVX: # BB#0:
+; AVX-NEXT: vmovaps {{.*#+}} ymm0 = [4294967295,4294967293,4294967293,4294967295,7,5,5,7]
+; AVX-NEXT: retq
%1 = insertelement <8 x i32> <i32 -7, i32 -5, i32 -3, i32 -1, i32 1, i32 3, i32 5, i32 7>, i32 -7, i32 0
%2 = insertelement <8 x i32> <i32 -1, i32 -3, i32 -5, i32 -7, i32 7, i32 5, i32 3, i32 1>, i32 -1, i32 0
%3 = icmp ugt <8 x i32> %1, %2
;
; SSE41-LABEL: max_gt_v8i16c:
; SSE41: # BB#0:
-; SSE41-NEXT: movdqa {{.*#+}} xmm0 = [65529,65531,65533,65535,1,3,5,7]
-; SSE41-NEXT: pmaxuw {{.*}}(%rip), %xmm0
+; SSE41-NEXT: movaps {{.*#+}} xmm0 = [65535,65533,65533,65535,7,5,5,7]
; SSE41-NEXT: retq
;
; SSE42-LABEL: max_gt_v8i16c:
; SSE42: # BB#0:
-; SSE42-NEXT: movdqa {{.*#+}} xmm0 = [65529,65531,65533,65535,1,3,5,7]
-; SSE42-NEXT: pmaxuw {{.*}}(%rip), %xmm0
+; SSE42-NEXT: movaps {{.*#+}} xmm0 = [65535,65533,65533,65535,7,5,5,7]
; SSE42-NEXT: retq
;
; AVX-LABEL: max_gt_v8i16c:
; AVX: # BB#0:
-; AVX-NEXT: vmovdqa {{.*#+}} xmm0 = [65529,65531,65533,65535,1,3,5,7]
-; AVX-NEXT: vpmaxuw {{.*}}(%rip), %xmm0, %xmm0
+; AVX-NEXT: vmovaps {{.*#+}} xmm0 = [65535,65533,65533,65535,7,5,5,7]
; AVX-NEXT: retq
%1 = insertelement <8 x i16> <i16 -7, i16 -5, i16 -3, i16 -1, i16 1, i16 3, i16 5, i16 7>, i16 -7, i32 0
%2 = insertelement <8 x i16> <i16 -1, i16 -3, i16 -5, i16 -7, i16 7, i16 5, i16 3, i16 1>, i16 -1, i32 0
;
; SSE41-LABEL: max_gt_v16i16c:
; SSE41: # BB#0:
-; SSE41-NEXT: movdqa {{.*#+}} xmm1 = [1,2,3,4,5,6,7,8]
-; SSE41-NEXT: movdqa {{.*#+}} xmm0 = [65529,65530,65531,65532,65533,65534,65535,0]
-; SSE41-NEXT: pmaxuw {{.*}}(%rip), %xmm0
-; SSE41-NEXT: pmaxuw {{.*}}(%rip), %xmm1
+; SSE41-NEXT: movaps {{.*#+}} xmm0 = [65535,65534,65533,65532,65533,65534,65535,0]
+; SSE41-NEXT: movaps {{.*#+}} xmm1 = [7,6,5,4,5,6,7,8]
; SSE41-NEXT: retq
;
; SSE42-LABEL: max_gt_v16i16c:
; SSE42: # BB#0:
-; SSE42-NEXT: movdqa {{.*#+}} xmm1 = [1,2,3,4,5,6,7,8]
-; SSE42-NEXT: movdqa {{.*#+}} xmm0 = [65529,65530,65531,65532,65533,65534,65535,0]
-; SSE42-NEXT: pmaxuw {{.*}}(%rip), %xmm0
-; SSE42-NEXT: pmaxuw {{.*}}(%rip), %xmm1
+; SSE42-NEXT: movaps {{.*#+}} xmm0 = [65535,65534,65533,65532,65533,65534,65535,0]
+; SSE42-NEXT: movaps {{.*#+}} xmm1 = [7,6,5,4,5,6,7,8]
; SSE42-NEXT: retq
;
-; AVX1-LABEL: max_gt_v16i16c:
-; AVX1: # BB#0:
-; AVX1-NEXT: vmovdqa {{.*#+}} xmm0 = [65529,65530,65531,65532,65533,65534,65535,0]
-; AVX1-NEXT: vpmaxuw {{.*}}(%rip), %xmm0, %xmm0
-; AVX1-NEXT: vmovdqa {{.*#+}} xmm1 = [1,2,3,4,5,6,7,8]
-; AVX1-NEXT: vpmaxuw {{.*}}(%rip), %xmm1, %xmm1
-; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
-; AVX1-NEXT: retq
-;
-; AVX2-LABEL: max_gt_v16i16c:
-; AVX2: # BB#0:
-; AVX2-NEXT: vmovdqa {{.*#+}} ymm0 = [65529,65530,65531,65532,65533,65534,65535,0,1,2,3,4,5,6,7,8]
-; AVX2-NEXT: vpmaxuw {{.*}}(%rip), %ymm0, %ymm0
-; AVX2-NEXT: retq
-;
-; AVX512-LABEL: max_gt_v16i16c:
-; AVX512: # BB#0:
-; AVX512-NEXT: vmovdqa {{.*#+}} ymm0 = [65529,65530,65531,65532,65533,65534,65535,0,1,2,3,4,5,6,7,8]
-; AVX512-NEXT: vpmaxuw {{.*}}(%rip), %ymm0, %ymm0
-; AVX512-NEXT: retq
+; AVX-LABEL: max_gt_v16i16c:
+; AVX: # BB#0:
+; AVX-NEXT: vmovaps {{.*#+}} ymm0 = [65535,65534,65533,65532,65533,65534,65535,0,7,6,5,4,5,6,7,8]
+; AVX-NEXT: retq
%1 = insertelement <16 x i16> <i16 -7, i16 -6, i16 -5, i16 -4, i16 -3, i16 -2, i16 -1, i16 0, i16 1, i16 2, i16 3, i16 4, i16 5, i16 6, i16 7, i16 8>, i16 -7, i32 0
%2 = insertelement <16 x i16> <i16 -1, i16 -2, i16 -3, i16 -4, i16 -5, i16 -6, i16 -7, i16 0, i16 7, i16 6, i16 5, i16 4, i16 3, i16 2, i16 1, i16 0>, i16 -1, i32 0
%3 = icmp ugt <16 x i16> %1, %2
define <16 x i8> @max_gt_v16i8c() {
; SSE-LABEL: max_gt_v16i8c:
; SSE: # BB#0:
-; SSE-NEXT: movdqa {{.*#+}} xmm0 = [249,250,251,252,253,254,255,0,1,2,3,4,5,6,7,8]
-; SSE-NEXT: pmaxub {{.*}}(%rip), %xmm0
+; SSE-NEXT: movaps {{.*#+}} xmm0 = [255,254,253,252,253,254,255,0,7,6,5,4,5,6,7,8]
; SSE-NEXT: retq
;
; AVX-LABEL: max_gt_v16i8c:
; AVX: # BB#0:
-; AVX-NEXT: vmovdqa {{.*#+}} xmm0 = [249,250,251,252,253,254,255,0,1,2,3,4,5,6,7,8]
-; AVX-NEXT: vpmaxub {{.*}}(%rip), %xmm0, %xmm0
+; AVX-NEXT: vmovaps {{.*#+}} xmm0 = [255,254,253,252,253,254,255,0,7,6,5,4,5,6,7,8]
; AVX-NEXT: retq
%1 = insertelement <16 x i8> <i8 -7, i8 -6, i8 -5, i8 -4, i8 -3, i8 -2, i8 -1, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 8>, i8 -7, i32 0
%2 = insertelement <16 x i8> <i8 -1, i8 -2, i8 -3, i8 -4, i8 -5, i8 -6, i8 -7, i8 0, i8 7, i8 6, i8 5, i8 4, i8 3, i8 2, i8 1, i8 0>, i8 -1, i32 0
;
; SSE41-LABEL: max_ge_v4i32c:
; SSE41: # BB#0:
-; SSE41-NEXT: movdqa {{.*#+}} xmm0 = [4294967289,4294967295,1,7]
-; SSE41-NEXT: pmaxud {{.*}}(%rip), %xmm0
+; SSE41-NEXT: movaps {{.*#+}} xmm0 = [4294967295,4294967295,7,7]
; SSE41-NEXT: retq
;
; SSE42-LABEL: max_ge_v4i32c:
; SSE42: # BB#0:
-; SSE42-NEXT: movdqa {{.*#+}} xmm0 = [4294967289,4294967295,1,7]
-; SSE42-NEXT: pmaxud {{.*}}(%rip), %xmm0
+; SSE42-NEXT: movaps {{.*#+}} xmm0 = [4294967295,4294967295,7,7]
; SSE42-NEXT: retq
;
; AVX-LABEL: max_ge_v4i32c:
; AVX: # BB#0:
-; AVX-NEXT: vmovdqa {{.*#+}} xmm0 = [4294967289,4294967295,1,7]
-; AVX-NEXT: vpmaxud {{.*}}(%rip), %xmm0, %xmm0
+; AVX-NEXT: vmovaps {{.*#+}} xmm0 = [4294967295,4294967295,7,7]
; AVX-NEXT: retq
%1 = insertelement <4 x i32> <i32 -7, i32 -1, i32 1, i32 7>, i32 -7, i32 0
%2 = insertelement <4 x i32> <i32 -1, i32 -7, i32 7, i32 1>, i32 -1, i32 0
;
; SSE41-LABEL: max_ge_v8i32c:
; SSE41: # BB#0:
-; SSE41-NEXT: movdqa {{.*#+}} xmm1 = [1,3,5,7]
-; SSE41-NEXT: movdqa {{.*#+}} xmm0 = [4294967289,4294967291,4294967293,4294967295]
-; SSE41-NEXT: pmaxud {{.*}}(%rip), %xmm0
-; SSE41-NEXT: pmaxud {{.*}}(%rip), %xmm1
+; SSE41-NEXT: movaps {{.*#+}} xmm0 = [4294967295,4294967293,4294967293,4294967295]
+; SSE41-NEXT: movaps {{.*#+}} xmm1 = [7,5,5,7]
; SSE41-NEXT: retq
;
; SSE42-LABEL: max_ge_v8i32c:
; SSE42: # BB#0:
-; SSE42-NEXT: movdqa {{.*#+}} xmm1 = [1,3,5,7]
-; SSE42-NEXT: movdqa {{.*#+}} xmm0 = [4294967289,4294967291,4294967293,4294967295]
-; SSE42-NEXT: pmaxud {{.*}}(%rip), %xmm0
-; SSE42-NEXT: pmaxud {{.*}}(%rip), %xmm1
+; SSE42-NEXT: movaps {{.*#+}} xmm0 = [4294967295,4294967293,4294967293,4294967295]
+; SSE42-NEXT: movaps {{.*#+}} xmm1 = [7,5,5,7]
; SSE42-NEXT: retq
;
-; AVX1-LABEL: max_ge_v8i32c:
-; AVX1: # BB#0:
-; AVX1-NEXT: vmovdqa {{.*#+}} xmm0 = [4294967289,4294967291,4294967293,4294967295]
-; AVX1-NEXT: vpmaxud {{.*}}(%rip), %xmm0, %xmm0
-; AVX1-NEXT: vmovdqa {{.*#+}} xmm1 = [1,3,5,7]
-; AVX1-NEXT: vpmaxud {{.*}}(%rip), %xmm1, %xmm1
-; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
-; AVX1-NEXT: retq
-;
-; AVX2-LABEL: max_ge_v8i32c:
-; AVX2: # BB#0:
-; AVX2-NEXT: vmovdqa {{.*#+}} ymm0 = [4294967289,4294967291,4294967293,4294967295,1,3,5,7]
-; AVX2-NEXT: vpmaxud {{.*}}(%rip), %ymm0, %ymm0
-; AVX2-NEXT: retq
-;
-; AVX512-LABEL: max_ge_v8i32c:
-; AVX512: # BB#0:
-; AVX512-NEXT: vmovdqa {{.*#+}} ymm0 = [4294967289,4294967291,4294967293,4294967295,1,3,5,7]
-; AVX512-NEXT: vpmaxud {{.*}}(%rip), %ymm0, %ymm0
-; AVX512-NEXT: retq
+; AVX-LABEL: max_ge_v8i32c:
+; AVX: # BB#0:
+; AVX-NEXT: vmovaps {{.*#+}} ymm0 = [4294967295,4294967293,4294967293,4294967295,7,5,5,7]
+; AVX-NEXT: retq
%1 = insertelement <8 x i32> <i32 -7, i32 -5, i32 -3, i32 -1, i32 1, i32 3, i32 5, i32 7>, i32 -7, i32 0
%2 = insertelement <8 x i32> <i32 -1, i32 -3, i32 -5, i32 -7, i32 7, i32 5, i32 3, i32 1>, i32 -1, i32 0
%3 = icmp uge <8 x i32> %1, %2
;
; SSE41-LABEL: max_ge_v8i16c:
; SSE41: # BB#0:
-; SSE41-NEXT: movdqa {{.*#+}} xmm0 = [65529,65531,65533,65535,1,3,5,7]
-; SSE41-NEXT: pmaxuw {{.*}}(%rip), %xmm0
+; SSE41-NEXT: movaps {{.*#+}} xmm0 = [65535,65533,65533,65535,7,5,5,7]
; SSE41-NEXT: retq
;
; SSE42-LABEL: max_ge_v8i16c:
; SSE42: # BB#0:
-; SSE42-NEXT: movdqa {{.*#+}} xmm0 = [65529,65531,65533,65535,1,3,5,7]
-; SSE42-NEXT: pmaxuw {{.*}}(%rip), %xmm0
+; SSE42-NEXT: movaps {{.*#+}} xmm0 = [65535,65533,65533,65535,7,5,5,7]
; SSE42-NEXT: retq
;
; AVX-LABEL: max_ge_v8i16c:
; AVX: # BB#0:
-; AVX-NEXT: vmovdqa {{.*#+}} xmm0 = [65529,65531,65533,65535,1,3,5,7]
-; AVX-NEXT: vpmaxuw {{.*}}(%rip), %xmm0, %xmm0
+; AVX-NEXT: vmovaps {{.*#+}} xmm0 = [65535,65533,65533,65535,7,5,5,7]
; AVX-NEXT: retq
%1 = insertelement <8 x i16> <i16 -7, i16 -5, i16 -3, i16 -1, i16 1, i16 3, i16 5, i16 7>, i16 -7, i32 0
%2 = insertelement <8 x i16> <i16 -1, i16 -3, i16 -5, i16 -7, i16 7, i16 5, i16 3, i16 1>, i16 -1, i32 0
;
; SSE41-LABEL: max_ge_v16i16c:
; SSE41: # BB#0:
-; SSE41-NEXT: movdqa {{.*#+}} xmm1 = [1,2,3,4,5,6,7,8]
-; SSE41-NEXT: movdqa {{.*#+}} xmm0 = [65529,65530,65531,65532,65533,65534,65535,0]
-; SSE41-NEXT: pmaxuw {{.*}}(%rip), %xmm0
-; SSE41-NEXT: pmaxuw {{.*}}(%rip), %xmm1
+; SSE41-NEXT: movaps {{.*#+}} xmm0 = [65535,65534,65533,65532,65533,65534,65535,0]
+; SSE41-NEXT: movaps {{.*#+}} xmm1 = [7,6,5,4,5,6,7,8]
; SSE41-NEXT: retq
;
; SSE42-LABEL: max_ge_v16i16c:
; SSE42: # BB#0:
-; SSE42-NEXT: movdqa {{.*#+}} xmm1 = [1,2,3,4,5,6,7,8]
-; SSE42-NEXT: movdqa {{.*#+}} xmm0 = [65529,65530,65531,65532,65533,65534,65535,0]
-; SSE42-NEXT: pmaxuw {{.*}}(%rip), %xmm0
-; SSE42-NEXT: pmaxuw {{.*}}(%rip), %xmm1
+; SSE42-NEXT: movaps {{.*#+}} xmm0 = [65535,65534,65533,65532,65533,65534,65535,0]
+; SSE42-NEXT: movaps {{.*#+}} xmm1 = [7,6,5,4,5,6,7,8]
; SSE42-NEXT: retq
;
-; AVX1-LABEL: max_ge_v16i16c:
-; AVX1: # BB#0:
-; AVX1-NEXT: vmovdqa {{.*#+}} xmm0 = [65529,65530,65531,65532,65533,65534,65535,0]
-; AVX1-NEXT: vpmaxuw {{.*}}(%rip), %xmm0, %xmm0
-; AVX1-NEXT: vmovdqa {{.*#+}} xmm1 = [1,2,3,4,5,6,7,8]
-; AVX1-NEXT: vpmaxuw {{.*}}(%rip), %xmm1, %xmm1
-; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
-; AVX1-NEXT: retq
-;
-; AVX2-LABEL: max_ge_v16i16c:
-; AVX2: # BB#0:
-; AVX2-NEXT: vmovdqa {{.*#+}} ymm0 = [65529,65530,65531,65532,65533,65534,65535,0,1,2,3,4,5,6,7,8]
-; AVX2-NEXT: vpmaxuw {{.*}}(%rip), %ymm0, %ymm0
-; AVX2-NEXT: retq
-;
-; AVX512-LABEL: max_ge_v16i16c:
-; AVX512: # BB#0:
-; AVX512-NEXT: vmovdqa {{.*#+}} ymm0 = [65529,65530,65531,65532,65533,65534,65535,0,1,2,3,4,5,6,7,8]
-; AVX512-NEXT: vpmaxuw {{.*}}(%rip), %ymm0, %ymm0
-; AVX512-NEXT: retq
+; AVX-LABEL: max_ge_v16i16c:
+; AVX: # BB#0:
+; AVX-NEXT: vmovaps {{.*#+}} ymm0 = [65535,65534,65533,65532,65533,65534,65535,0,7,6,5,4,5,6,7,8]
+; AVX-NEXT: retq
%1 = insertelement <16 x i16> <i16 -7, i16 -6, i16 -5, i16 -4, i16 -3, i16 -2, i16 -1, i16 0, i16 1, i16 2, i16 3, i16 4, i16 5, i16 6, i16 7, i16 8>, i16 -7, i32 0
%2 = insertelement <16 x i16> <i16 -1, i16 -2, i16 -3, i16 -4, i16 -5, i16 -6, i16 -7, i16 0, i16 7, i16 6, i16 5, i16 4, i16 3, i16 2, i16 1, i16 0>, i16 -1, i32 0
%3 = icmp uge <16 x i16> %1, %2
define <16 x i8> @max_ge_v16i8c() {
; SSE-LABEL: max_ge_v16i8c:
; SSE: # BB#0:
-; SSE-NEXT: movdqa {{.*#+}} xmm0 = [249,250,251,252,253,254,255,0,1,2,3,4,5,6,7,8]
-; SSE-NEXT: pmaxub {{.*}}(%rip), %xmm0
+; SSE-NEXT: movaps {{.*#+}} xmm0 = [255,254,253,252,253,254,255,0,7,6,5,4,5,6,7,8]
; SSE-NEXT: retq
;
; AVX-LABEL: max_ge_v16i8c:
; AVX: # BB#0:
-; AVX-NEXT: vmovdqa {{.*#+}} xmm0 = [249,250,251,252,253,254,255,0,1,2,3,4,5,6,7,8]
-; AVX-NEXT: vpmaxub {{.*}}(%rip), %xmm0, %xmm0
+; AVX-NEXT: vmovaps {{.*#+}} xmm0 = [255,254,253,252,253,254,255,0,7,6,5,4,5,6,7,8]
; AVX-NEXT: retq
%1 = insertelement <16 x i8> <i8 -7, i8 -6, i8 -5, i8 -4, i8 -3, i8 -2, i8 -1, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 8>, i8 -7, i32 0
%2 = insertelement <16 x i8> <i8 -1, i8 -2, i8 -3, i8 -4, i8 -5, i8 -6, i8 -7, i8 0, i8 7, i8 6, i8 5, i8 4, i8 3, i8 2, i8 1, i8 0>, i8 -1, i32 0
;
; SSE41-LABEL: min_lt_v4i32c:
; SSE41: # BB#0:
-; SSE41-NEXT: movdqa {{.*#+}} xmm0 = [4294967289,4294967295,1,7]
-; SSE41-NEXT: pminud {{.*}}(%rip), %xmm0
+; SSE41-NEXT: movaps {{.*#+}} xmm0 = [4294967289,4294967289,1,1]
; SSE41-NEXT: retq
;
; SSE42-LABEL: min_lt_v4i32c:
; SSE42: # BB#0:
-; SSE42-NEXT: movdqa {{.*#+}} xmm0 = [4294967289,4294967295,1,7]
-; SSE42-NEXT: pminud {{.*}}(%rip), %xmm0
+; SSE42-NEXT: movaps {{.*#+}} xmm0 = [4294967289,4294967289,1,1]
; SSE42-NEXT: retq
;
; AVX-LABEL: min_lt_v4i32c:
; AVX: # BB#0:
-; AVX-NEXT: vmovdqa {{.*#+}} xmm0 = [4294967289,4294967295,1,7]
-; AVX-NEXT: vpminud {{.*}}(%rip), %xmm0, %xmm0
+; AVX-NEXT: vmovaps {{.*#+}} xmm0 = [4294967289,4294967289,1,1]
; AVX-NEXT: retq
%1 = insertelement <4 x i32> <i32 -7, i32 -1, i32 1, i32 7>, i32 -7, i32 0
%2 = insertelement <4 x i32> <i32 -1, i32 -7, i32 7, i32 1>, i32 -1, i32 0
;
; SSE41-LABEL: min_lt_v8i32c:
; SSE41: # BB#0:
-; SSE41-NEXT: movdqa {{.*#+}} xmm1 = [1,3,5,7]
-; SSE41-NEXT: movdqa {{.*#+}} xmm0 = [4294967289,4294967291,4294967293,4294967295]
-; SSE41-NEXT: pminud {{.*}}(%rip), %xmm0
-; SSE41-NEXT: pminud {{.*}}(%rip), %xmm1
+; SSE41-NEXT: movaps {{.*#+}} xmm0 = [4294967289,4294967291,4294967291,4294967289]
+; SSE41-NEXT: movaps {{.*#+}} xmm1 = [1,3,3,1]
; SSE41-NEXT: retq
;
; SSE42-LABEL: min_lt_v8i32c:
; SSE42: # BB#0:
-; SSE42-NEXT: movdqa {{.*#+}} xmm1 = [1,3,5,7]
-; SSE42-NEXT: movdqa {{.*#+}} xmm0 = [4294967289,4294967291,4294967293,4294967295]
-; SSE42-NEXT: pminud {{.*}}(%rip), %xmm0
-; SSE42-NEXT: pminud {{.*}}(%rip), %xmm1
+; SSE42-NEXT: movaps {{.*#+}} xmm0 = [4294967289,4294967291,4294967291,4294967289]
+; SSE42-NEXT: movaps {{.*#+}} xmm1 = [1,3,3,1]
; SSE42-NEXT: retq
;
-; AVX1-LABEL: min_lt_v8i32c:
-; AVX1: # BB#0:
-; AVX1-NEXT: vmovdqa {{.*#+}} xmm0 = [4294967289,4294967291,4294967293,4294967295]
-; AVX1-NEXT: vpminud {{.*}}(%rip), %xmm0, %xmm0
-; AVX1-NEXT: vmovdqa {{.*#+}} xmm1 = [1,3,5,7]
-; AVX1-NEXT: vpminud {{.*}}(%rip), %xmm1, %xmm1
-; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
-; AVX1-NEXT: retq
-;
-; AVX2-LABEL: min_lt_v8i32c:
-; AVX2: # BB#0:
-; AVX2-NEXT: vmovdqa {{.*#+}} ymm0 = [4294967289,4294967291,4294967293,4294967295,1,3,5,7]
-; AVX2-NEXT: vpminud {{.*}}(%rip), %ymm0, %ymm0
-; AVX2-NEXT: retq
-;
-; AVX512-LABEL: min_lt_v8i32c:
-; AVX512: # BB#0:
-; AVX512-NEXT: vmovdqa {{.*#+}} ymm0 = [4294967289,4294967291,4294967293,4294967295,1,3,5,7]
-; AVX512-NEXT: vpminud {{.*}}(%rip), %ymm0, %ymm0
-; AVX512-NEXT: retq
+; AVX-LABEL: min_lt_v8i32c:
+; AVX: # BB#0:
+; AVX-NEXT: vmovaps {{.*#+}} ymm0 = [4294967289,4294967291,4294967291,4294967289,1,3,3,1]
+; AVX-NEXT: retq
%1 = insertelement <8 x i32> <i32 -7, i32 -5, i32 -3, i32 -1, i32 1, i32 3, i32 5, i32 7>, i32 -7, i32 0
%2 = insertelement <8 x i32> <i32 -1, i32 -3, i32 -5, i32 -7, i32 7, i32 5, i32 3, i32 1>, i32 -1, i32 0
%3 = icmp ult <8 x i32> %1, %2
;
; SSE41-LABEL: min_lt_v8i16c:
; SSE41: # BB#0:
-; SSE41-NEXT: movdqa {{.*#+}} xmm0 = [65529,65531,65533,65535,1,3,5,7]
-; SSE41-NEXT: pminuw {{.*}}(%rip), %xmm0
+; SSE41-NEXT: movaps {{.*#+}} xmm0 = [1,65531,65531,65529,1,3,3,1]
; SSE41-NEXT: retq
;
; SSE42-LABEL: min_lt_v8i16c:
; SSE42: # BB#0:
-; SSE42-NEXT: movdqa {{.*#+}} xmm0 = [65529,65531,65533,65535,1,3,5,7]
-; SSE42-NEXT: pminuw {{.*}}(%rip), %xmm0
+; SSE42-NEXT: movaps {{.*#+}} xmm0 = [1,65531,65531,65529,1,3,3,1]
; SSE42-NEXT: retq
;
; AVX-LABEL: min_lt_v8i16c:
; AVX: # BB#0:
-; AVX-NEXT: vmovdqa {{.*#+}} xmm0 = [65529,65531,65533,65535,1,3,5,7]
-; AVX-NEXT: vpminuw {{.*}}(%rip), %xmm0, %xmm0
+; AVX-NEXT: vmovaps {{.*#+}} xmm0 = [1,65531,65531,65529,1,3,3,1]
; AVX-NEXT: retq
%1 = insertelement <8 x i16> <i16 -7, i16 -5, i16 -3, i16 -1, i16 1, i16 3, i16 5, i16 7>, i16 -7, i32 0
%2 = insertelement <8 x i16> <i16 -1, i16 -3, i16 -5, i16 -7, i16 7, i16 5, i16 3, i16 1>, i16 1, i32 0
;
; SSE41-LABEL: min_lt_v16i16c:
; SSE41: # BB#0:
-; SSE41-NEXT: movdqa {{.*#+}} xmm1 = [1,2,3,4,5,6,7,8]
-; SSE41-NEXT: movdqa {{.*#+}} xmm0 = [65529,65530,65531,65532,65533,65534,65535,0]
-; SSE41-NEXT: pminuw {{.*}}(%rip), %xmm0
-; SSE41-NEXT: pminuw {{.*}}(%rip), %xmm1
+; SSE41-NEXT: movaps {{.*#+}} xmm0 = [1,65530,65531,65532,65531,65530,65529,0]
+; SSE41-NEXT: movaps {{.*#+}} xmm1 = [1,2,3,4,3,2,1,0]
; SSE41-NEXT: retq
;
; SSE42-LABEL: min_lt_v16i16c:
; SSE42: # BB#0:
-; SSE42-NEXT: movdqa {{.*#+}} xmm1 = [1,2,3,4,5,6,7,8]
-; SSE42-NEXT: movdqa {{.*#+}} xmm0 = [65529,65530,65531,65532,65533,65534,65535,0]
-; SSE42-NEXT: pminuw {{.*}}(%rip), %xmm0
-; SSE42-NEXT: pminuw {{.*}}(%rip), %xmm1
+; SSE42-NEXT: movaps {{.*#+}} xmm0 = [1,65530,65531,65532,65531,65530,65529,0]
+; SSE42-NEXT: movaps {{.*#+}} xmm1 = [1,2,3,4,3,2,1,0]
; SSE42-NEXT: retq
;
-; AVX1-LABEL: min_lt_v16i16c:
-; AVX1: # BB#0:
-; AVX1-NEXT: vmovdqa {{.*#+}} xmm0 = [65529,65530,65531,65532,65533,65534,65535,0]
-; AVX1-NEXT: vpminuw {{.*}}(%rip), %xmm0, %xmm0
-; AVX1-NEXT: vmovdqa {{.*#+}} xmm1 = [1,2,3,4,5,6,7,8]
-; AVX1-NEXT: vpminuw {{.*}}(%rip), %xmm1, %xmm1
-; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
-; AVX1-NEXT: retq
-;
-; AVX2-LABEL: min_lt_v16i16c:
-; AVX2: # BB#0:
-; AVX2-NEXT: vmovdqa {{.*#+}} ymm0 = [65529,65530,65531,65532,65533,65534,65535,0,1,2,3,4,5,6,7,8]
-; AVX2-NEXT: vpminuw {{.*}}(%rip), %ymm0, %ymm0
-; AVX2-NEXT: retq
-;
-; AVX512-LABEL: min_lt_v16i16c:
-; AVX512: # BB#0:
-; AVX512-NEXT: vmovdqa {{.*#+}} ymm0 = [65529,65530,65531,65532,65533,65534,65535,0,1,2,3,4,5,6,7,8]
-; AVX512-NEXT: vpminuw {{.*}}(%rip), %ymm0, %ymm0
-; AVX512-NEXT: retq
+; AVX-LABEL: min_lt_v16i16c:
+; AVX: # BB#0:
+; AVX-NEXT: vmovaps {{.*#+}} ymm0 = [1,65530,65531,65532,65531,65530,65529,0,1,2,3,4,3,2,1,0]
+; AVX-NEXT: retq
%1 = insertelement <16 x i16> <i16 -7, i16 -6, i16 -5, i16 -4, i16 -3, i16 -2, i16 -1, i16 0, i16 1, i16 2, i16 3, i16 4, i16 5, i16 6, i16 7, i16 8>, i16 -7, i32 0
%2 = insertelement <16 x i16> <i16 -1, i16 -2, i16 -3, i16 -4, i16 -5, i16 -6, i16 -7, i16 0, i16 7, i16 6, i16 5, i16 4, i16 3, i16 2, i16 1, i16 0>, i16 1, i32 0
%3 = icmp ult <16 x i16> %1, %2
define <16 x i8> @min_lt_v16i8c() {
; SSE-LABEL: min_lt_v16i8c:
; SSE: # BB#0:
-; SSE-NEXT: movdqa {{.*#+}} xmm0 = [249,250,251,252,253,254,255,0,1,2,3,4,5,6,7,8]
-; SSE-NEXT: pminub {{.*}}(%rip), %xmm0
+; SSE-NEXT: movaps {{.*#+}} xmm0 = [1,250,251,252,251,250,249,0,1,2,3,4,3,2,1,0]
; SSE-NEXT: retq
;
; AVX-LABEL: min_lt_v16i8c:
; AVX: # BB#0:
-; AVX-NEXT: vmovdqa {{.*#+}} xmm0 = [249,250,251,252,253,254,255,0,1,2,3,4,5,6,7,8]
-; AVX-NEXT: vpminub {{.*}}(%rip), %xmm0, %xmm0
+; AVX-NEXT: vmovaps {{.*#+}} xmm0 = [1,250,251,252,251,250,249,0,1,2,3,4,3,2,1,0]
; AVX-NEXT: retq
%1 = insertelement <16 x i8> <i8 -7, i8 -6, i8 -5, i8 -4, i8 -3, i8 -2, i8 -1, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 8>, i8 -7, i32 0
%2 = insertelement <16 x i8> <i8 -1, i8 -2, i8 -3, i8 -4, i8 -5, i8 -6, i8 -7, i8 0, i8 7, i8 6, i8 5, i8 4, i8 3, i8 2, i8 1, i8 0>, i8 1, i32 0
;
; SSE41-LABEL: min_le_v4i32c:
; SSE41: # BB#0:
-; SSE41-NEXT: movdqa {{.*#+}} xmm0 = [4294967289,4294967295,1,7]
-; SSE41-NEXT: pminud {{.*}}(%rip), %xmm0
+; SSE41-NEXT: movaps {{.*#+}} xmm0 = [4294967289,4294967289,1,1]
; SSE41-NEXT: retq
;
; SSE42-LABEL: min_le_v4i32c:
; SSE42: # BB#0:
-; SSE42-NEXT: movdqa {{.*#+}} xmm0 = [4294967289,4294967295,1,7]
-; SSE42-NEXT: pminud {{.*}}(%rip), %xmm0
+; SSE42-NEXT: movaps {{.*#+}} xmm0 = [4294967289,4294967289,1,1]
; SSE42-NEXT: retq
;
; AVX-LABEL: min_le_v4i32c:
; AVX: # BB#0:
-; AVX-NEXT: vmovdqa {{.*#+}} xmm0 = [4294967289,4294967295,1,7]
-; AVX-NEXT: vpminud {{.*}}(%rip), %xmm0, %xmm0
+; AVX-NEXT: vmovaps {{.*#+}} xmm0 = [4294967289,4294967289,1,1]
; AVX-NEXT: retq
%1 = insertelement <4 x i32> <i32 -7, i32 -1, i32 1, i32 7>, i32 -7, i32 0
%2 = insertelement <4 x i32> <i32 -1, i32 -7, i32 7, i32 1>, i32 -1, i32 0
;
; SSE41-LABEL: min_le_v8i32c:
; SSE41: # BB#0:
-; SSE41-NEXT: movdqa {{.*#+}} xmm1 = [1,3,5,7]
-; SSE41-NEXT: movdqa {{.*#+}} xmm0 = [4294967289,4294967291,4294967293,4294967295]
-; SSE41-NEXT: pminud {{.*}}(%rip), %xmm0
-; SSE41-NEXT: pminud {{.*}}(%rip), %xmm1
+; SSE41-NEXT: movaps {{.*#+}} xmm0 = [4294967289,4294967291,4294967291,4294967289]
+; SSE41-NEXT: movaps {{.*#+}} xmm1 = [1,3,3,1]
; SSE41-NEXT: retq
;
; SSE42-LABEL: min_le_v8i32c:
; SSE42: # BB#0:
-; SSE42-NEXT: movdqa {{.*#+}} xmm1 = [1,3,5,7]
-; SSE42-NEXT: movdqa {{.*#+}} xmm0 = [4294967289,4294967291,4294967293,4294967295]
-; SSE42-NEXT: pminud {{.*}}(%rip), %xmm0
-; SSE42-NEXT: pminud {{.*}}(%rip), %xmm1
+; SSE42-NEXT: movaps {{.*#+}} xmm0 = [4294967289,4294967291,4294967291,4294967289]
+; SSE42-NEXT: movaps {{.*#+}} xmm1 = [1,3,3,1]
; SSE42-NEXT: retq
;
-; AVX1-LABEL: min_le_v8i32c:
-; AVX1: # BB#0:
-; AVX1-NEXT: vmovdqa {{.*#+}} xmm0 = [4294967289,4294967291,4294967293,4294967295]
-; AVX1-NEXT: vpminud {{.*}}(%rip), %xmm0, %xmm0
-; AVX1-NEXT: vmovdqa {{.*#+}} xmm1 = [1,3,5,7]
-; AVX1-NEXT: vpminud {{.*}}(%rip), %xmm1, %xmm1
-; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
-; AVX1-NEXT: retq
-;
-; AVX2-LABEL: min_le_v8i32c:
-; AVX2: # BB#0:
-; AVX2-NEXT: vmovdqa {{.*#+}} ymm0 = [4294967289,4294967291,4294967293,4294967295,1,3,5,7]
-; AVX2-NEXT: vpminud {{.*}}(%rip), %ymm0, %ymm0
-; AVX2-NEXT: retq
-;
-; AVX512-LABEL: min_le_v8i32c:
-; AVX512: # BB#0:
-; AVX512-NEXT: vmovdqa {{.*#+}} ymm0 = [4294967289,4294967291,4294967293,4294967295,1,3,5,7]
-; AVX512-NEXT: vpminud {{.*}}(%rip), %ymm0, %ymm0
-; AVX512-NEXT: retq
+; AVX-LABEL: min_le_v8i32c:
+; AVX: # BB#0:
+; AVX-NEXT: vmovaps {{.*#+}} ymm0 = [4294967289,4294967291,4294967291,4294967289,1,3,3,1]
+; AVX-NEXT: retq
%1 = insertelement <8 x i32> <i32 -7, i32 -5, i32 -3, i32 -1, i32 1, i32 3, i32 5, i32 7>, i32 -7, i32 0
%2 = insertelement <8 x i32> <i32 -1, i32 -3, i32 -5, i32 -7, i32 7, i32 5, i32 3, i32 1>, i32 -1, i32 0
%3 = icmp ule <8 x i32> %1, %2
;
; SSE41-LABEL: min_le_v8i16c:
; SSE41: # BB#0:
-; SSE41-NEXT: movdqa {{.*#+}} xmm0 = [65529,65531,65533,65535,1,3,5,7]
-; SSE41-NEXT: pminuw {{.*}}(%rip), %xmm0
+; SSE41-NEXT: movaps {{.*#+}} xmm0 = [65529,65531,65531,65529,1,3,3,1]
; SSE41-NEXT: retq
;
; SSE42-LABEL: min_le_v8i16c:
; SSE42: # BB#0:
-; SSE42-NEXT: movdqa {{.*#+}} xmm0 = [65529,65531,65533,65535,1,3,5,7]
-; SSE42-NEXT: pminuw {{.*}}(%rip), %xmm0
+; SSE42-NEXT: movaps {{.*#+}} xmm0 = [65529,65531,65531,65529,1,3,3,1]
; SSE42-NEXT: retq
;
; AVX-LABEL: min_le_v8i16c:
; AVX: # BB#0:
-; AVX-NEXT: vmovdqa {{.*#+}} xmm0 = [65529,65531,65533,65535,1,3,5,7]
-; AVX-NEXT: vpminuw {{.*}}(%rip), %xmm0, %xmm0
+; AVX-NEXT: vmovaps {{.*#+}} xmm0 = [65529,65531,65531,65529,1,3,3,1]
; AVX-NEXT: retq
%1 = insertelement <8 x i16> <i16 -7, i16 -5, i16 -3, i16 -1, i16 1, i16 3, i16 5, i16 7>, i16 -7, i32 0
%2 = insertelement <8 x i16> <i16 -1, i16 -3, i16 -5, i16 -7, i16 7, i16 5, i16 3, i16 1>, i16 -1, i32 0
;
; SSE41-LABEL: min_le_v16i16c:
; SSE41: # BB#0:
-; SSE41-NEXT: movdqa {{.*#+}} xmm1 = [1,2,3,4,5,6,7,8]
-; SSE41-NEXT: movdqa {{.*#+}} xmm0 = [65529,65530,65531,65532,65533,65534,65535,0]
-; SSE41-NEXT: pminuw {{.*}}(%rip), %xmm0
-; SSE41-NEXT: pminuw {{.*}}(%rip), %xmm1
+; SSE41-NEXT: movaps {{.*#+}} xmm0 = [65529,65530,65531,65532,65531,65530,65529,0]
+; SSE41-NEXT: movaps {{.*#+}} xmm1 = [1,2,3,4,3,2,1,0]
; SSE41-NEXT: retq
;
; SSE42-LABEL: min_le_v16i16c:
; SSE42: # BB#0:
-; SSE42-NEXT: movdqa {{.*#+}} xmm1 = [1,2,3,4,5,6,7,8]
-; SSE42-NEXT: movdqa {{.*#+}} xmm0 = [65529,65530,65531,65532,65533,65534,65535,0]
-; SSE42-NEXT: pminuw {{.*}}(%rip), %xmm0
-; SSE42-NEXT: pminuw {{.*}}(%rip), %xmm1
+; SSE42-NEXT: movaps {{.*#+}} xmm0 = [65529,65530,65531,65532,65531,65530,65529,0]
+; SSE42-NEXT: movaps {{.*#+}} xmm1 = [1,2,3,4,3,2,1,0]
; SSE42-NEXT: retq
;
-; AVX1-LABEL: min_le_v16i16c:
-; AVX1: # BB#0:
-; AVX1-NEXT: vmovdqa {{.*#+}} xmm0 = [65529,65530,65531,65532,65533,65534,65535,0]
-; AVX1-NEXT: vpminuw {{.*}}(%rip), %xmm0, %xmm0
-; AVX1-NEXT: vmovdqa {{.*#+}} xmm1 = [1,2,3,4,5,6,7,8]
-; AVX1-NEXT: vpminuw {{.*}}(%rip), %xmm1, %xmm1
-; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
-; AVX1-NEXT: retq
-;
-; AVX2-LABEL: min_le_v16i16c:
-; AVX2: # BB#0:
-; AVX2-NEXT: vmovdqa {{.*#+}} ymm0 = [65529,65530,65531,65532,65533,65534,65535,0,1,2,3,4,5,6,7,8]
-; AVX2-NEXT: vpminuw {{.*}}(%rip), %ymm0, %ymm0
-; AVX2-NEXT: retq
-;
-; AVX512-LABEL: min_le_v16i16c:
-; AVX512: # BB#0:
-; AVX512-NEXT: vmovdqa {{.*#+}} ymm0 = [65529,65530,65531,65532,65533,65534,65535,0,1,2,3,4,5,6,7,8]
-; AVX512-NEXT: vpminuw {{.*}}(%rip), %ymm0, %ymm0
-; AVX512-NEXT: retq
+; AVX-LABEL: min_le_v16i16c:
+; AVX: # BB#0:
+; AVX-NEXT: vmovaps {{.*#+}} ymm0 = [65529,65530,65531,65532,65531,65530,65529,0,1,2,3,4,3,2,1,0]
+; AVX-NEXT: retq
%1 = insertelement <16 x i16> <i16 -7, i16 -6, i16 -5, i16 -4, i16 -3, i16 -2, i16 -1, i16 0, i16 1, i16 2, i16 3, i16 4, i16 5, i16 6, i16 7, i16 8>, i16 -7, i32 0
%2 = insertelement <16 x i16> <i16 -1, i16 -2, i16 -3, i16 -4, i16 -5, i16 -6, i16 -7, i16 0, i16 7, i16 6, i16 5, i16 4, i16 3, i16 2, i16 1, i16 0>, i16 -1, i32 0
%3 = icmp ule <16 x i16> %1, %2
define <16 x i8> @min_le_v16i8c() {
; SSE-LABEL: min_le_v16i8c:
; SSE: # BB#0:
-; SSE-NEXT: movdqa {{.*#+}} xmm0 = [249,250,251,252,253,254,255,0,1,2,3,4,5,6,7,8]
-; SSE-NEXT: pminub {{.*}}(%rip), %xmm0
+; SSE-NEXT: movaps {{.*#+}} xmm0 = [249,250,251,252,251,250,249,0,1,2,3,4,3,2,1,0]
; SSE-NEXT: retq
;
; AVX-LABEL: min_le_v16i8c:
; AVX: # BB#0:
-; AVX-NEXT: vmovdqa {{.*#+}} xmm0 = [249,250,251,252,253,254,255,0,1,2,3,4,5,6,7,8]
-; AVX-NEXT: vpminub {{.*}}(%rip), %xmm0, %xmm0
+; AVX-NEXT: vmovaps {{.*#+}} xmm0 = [249,250,251,252,251,250,249,0,1,2,3,4,3,2,1,0]
; AVX-NEXT: retq
%1 = insertelement <16 x i8> <i8 -7, i8 -6, i8 -5, i8 -4, i8 -3, i8 -2, i8 -1, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 8>, i8 -7, i32 0
%2 = insertelement <16 x i8> <i8 -1, i8 -2, i8 -3, i8 -4, i8 -5, i8 -6, i8 -7, i8 0, i8 7, i8 6, i8 5, i8 4, i8 3, i8 2, i8 1, i8 0>, i8 -1, i32 0