MIR Serialization: Change MIR syntax - use custom syntax for MBBs.

[oota-llvm.git] / test / CodeGen / X86 / patchpoint-verifiable.mir

diff --git a/test/CodeGen/X86/patchpoint-verifiable.mir b/test/CodeGen/X86/patchpoint-verifiable.mir
index 315d963837c199429d233cc839d642d5a35564df..300ecaf002f2c5fb8ed606e8858f65a58f165042 100644 (file)
--- a/test/CodeGen/X86/patchpoint-verifiable.mir
+++ b/test/CodeGen/X86/patchpoint-verifiable.mir
@@ -26,18 +26,17 @@ frameInfo:
   hasCalls:      true
 fixedStack:
   - { id: 0, type: spill-slot, offset: -16, size: 8, alignment: 16 }
-body:
-  - id:          0
-    name:        entry
-    liveins:     [ '%rdi', '%rsi', '%rbp' ]
-    instructions:
-      - 'frame-setup PUSH64r killed %rbp, implicit-def %rsp, implicit %rsp'
-      - CFI_INSTRUCTION .cfi_def_cfa_offset 16
-      - 'CFI_INSTRUCTION .cfi_offset %rbp, -16'
-      - '%rbp = frame-setup MOV64rr %rsp'
-      - 'CFI_INSTRUCTION .cfi_def_cfa_register %rbp'
-# CHECK: PATCHPOINT 5, 5, 0, 2, 0, %rdi, %rsi, csr_64, implicit-def dead early-clobber %r11, implicit-def %rsp, implicit-def dead %rax
-      - 'PATCHPOINT 5, 5, 0, 2, 0, %rdi, %rsi, csr_64, implicit-def dead early-clobber %r11, implicit-def %rsp, implicit-def dead %rax'
-      - '%rbp = POP64r implicit-def %rsp, implicit %rsp'
-      - RETQ
+body: |
+  bb.0.entry:
+    liveins: %rdi, %rsi, %rbp
+
+    frame-setup PUSH64r killed %rbp, implicit-def %rsp, implicit %rsp
+    CFI_INSTRUCTION .cfi_def_cfa_offset 16
+    CFI_INSTRUCTION .cfi_offset %rbp, -16
+    %rbp = frame-setup MOV64rr %rsp
+    CFI_INSTRUCTION .cfi_def_cfa_register %rbp
+  ; CHECK: PATCHPOINT 5, 5, 0, 2, 0, %rdi, %rsi, csr_64, implicit-def dead early-clobber %r11, implicit-def %rsp, implicit-def dead %rax
+    PATCHPOINT 5, 5, 0, 2, 0, %rdi, %rsi, csr_64, implicit-def dead early-clobber %r11, implicit-def %rsp, implicit-def dead %rax
+    %rbp = POP64r implicit-def %rsp, implicit %rsp
+    RETQ
 ...