[ARM] Enable shrink-wrapping by default.

[oota-llvm.git] / test / CodeGen / Thumb2 / thumb2-ifcvt1.ll

diff --git a/test/CodeGen/Thumb2/thumb2-ifcvt1.ll b/test/CodeGen/Thumb2/thumb2-ifcvt1.ll
index e04ef29c8b386d7a43aace5c1bc38fa1e247003f..eb48ffb7d80e5c95781a379e7fdd44950dc7862c 100644 (file)
--- a/test/CodeGen/Thumb2/thumb2-ifcvt1.ll
+++ b/test/CodeGen/Thumb2/thumb2-ifcvt1.ll
@@ -1,9 +1,12 @@
-; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | FileCheck %s
-
-define i32 @t1(i32 %a, i32 %b, i32 %c, i32 %d) {
-; CHECK: t1:
-; CHECK: it ne
+; RUN: llc < %s -mtriple=thumbv7-apple-darwin | FileCheck %s
+; RUN: llc < %s -mtriple=thumbv7-apple-darwin -arm-default-it | FileCheck %s
+; RUN: llc < %s -mtriple=thumbv8 -arm-no-restrict-it |FileCheck %s
+define i32 @t1(i32 %a, i32 %b, i32 %c, i32 %d) nounwind {
+; CHECK-LABEL: t1:
+; CHECK: ittt ne
 ; CHECK: cmpne
+; CHECK: addne
+; CHECK: bxne lr
        switch i32 %c, label %cond_next [
                 i32 1, label %cond_true
                 i32 7, label %cond_true
@@ -19,13 +22,12 @@ cond_next:
        ret i32 %tmp15
 }
 
-; FIXME: Check for # of unconditional branch after adding branch folding post ifcvt.
-define i32 @t2(i32 %a, i32 %b) {
+define i32 @t2(i32 %a, i32 %b) nounwind {
 entry:
-; CHECK: t2:
-; CHECK: ite le
-; CHECK: suble
+; CHECK-LABEL: t2:
+; CHECK: ite gt
 ; CHECK: subgt
+; CHECK: suble
        %tmp1434 = icmp eq i32 %a, %b           ; <i1> [#uses=1]
        br i1 %tmp1434, label %bb17, label %bb.outer
 
@@ -60,23 +62,25 @@ bb17:               ; preds = %cond_false, %cond_true, %entry
 
 @x = external global i32*              ; <i32**> [#uses=1]
 
-define void @foo(i32 %a) {
+define void @foo(i32 %a) nounwind {
 entry:
-       %tmp = load i32** @x            ; <i32*> [#uses=1]
+       %tmp = load i32*, i32** @x              ; <i32*> [#uses=1]
        store i32 %a, i32* %tmp
        ret void
 }
 
-define void @t3(i32 %a, i32 %b) {
+define void @t3(i32 %a, i32 %b) nounwind {
 entry:
-; CHECK: t3:
+; CHECK-LABEL: t3:
 ; CHECK: it lt
-; CHECK: poplt {r7, pc}
+; CHECK-NEXT: bxlt lr
+; CHECK: mov r0, r1
+; CHECK: bl  {{_?}}foo
        %tmp1 = icmp sgt i32 %a, 10             ; <i1> [#uses=1]
        br i1 %tmp1, label %cond_true, label %UnifiedReturnBlock
 
 cond_true:             ; preds = %entry
-       tail call void @foo( i32 %b )
+       call void @foo( i32 %b )
        ret void
 
 UnifiedReturnBlock:            ; preds = %entry