[ARM] Enable shrink-wrapping by default.

[oota-llvm.git] / test / CodeGen / Thumb2 / thumb2-ifcvt1.ll

diff --git a/test/CodeGen/Thumb2/thumb2-ifcvt1.ll b/test/CodeGen/Thumb2/thumb2-ifcvt1.ll
index af8fcc64124706ad448cc5b59180f03faa9546e4..eb48ffb7d80e5c95781a379e7fdd44950dc7862c 100644 (file)
--- a/test/CodeGen/Thumb2/thumb2-ifcvt1.ll
+++ b/test/CodeGen/Thumb2/thumb2-ifcvt1.ll
@@ -1,7 +1,8 @@
 ; RUN: llc < %s -mtriple=thumbv7-apple-darwin | FileCheck %s
-
+; RUN: llc < %s -mtriple=thumbv7-apple-darwin -arm-default-it | FileCheck %s
+; RUN: llc < %s -mtriple=thumbv8 -arm-no-restrict-it |FileCheck %s
 define i32 @t1(i32 %a, i32 %b, i32 %c, i32 %d) nounwind {
-; CHECK: t1:
+; CHECK-LABEL: t1:
 ; CHECK: ittt ne
 ; CHECK: cmpne
 ; CHECK: addne
@@ -23,11 +24,10 @@ cond_next:
 
 define i32 @t2(i32 %a, i32 %b) nounwind {
 entry:
-; Do not if-convert when branches go to the different loops.
-; CHECK: t2:
-; CHECK-NOT: ite gt
-; CHECK-NOT: subgt
-; CHECK-NOT: suble
+; CHECK-LABEL: t2:
+; CHECK: ite gt
+; CHECK: subgt
+; CHECK: suble
        %tmp1434 = icmp eq i32 %a, %b           ; <i1> [#uses=1]
        br i1 %tmp1434, label %bb17, label %bb.outer
 
@@ -64,17 +64,18 @@ bb17:               ; preds = %cond_false, %cond_true, %entry
 
 define void @foo(i32 %a) nounwind {
 entry:
-       %tmp = load i32** @x            ; <i32*> [#uses=1]
+       %tmp = load i32*, i32** @x              ; <i32*> [#uses=1]
        store i32 %a, i32* %tmp
        ret void
 }
 
 define void @t3(i32 %a, i32 %b) nounwind {
 entry:
-; CHECK: t3:
-; CHECK: itt ge
-; CHECK: movge r0, r1
-; CHECK: blge  _foo
+; CHECK-LABEL: t3:
+; CHECK: it lt
+; CHECK-NEXT: bxlt lr
+; CHECK: mov r0, r1
+; CHECK: bl  {{_?}}foo
        %tmp1 = icmp sgt i32 %a, 10             ; <i1> [#uses=1]
        br i1 %tmp1, label %cond_true, label %UnifiedReturnBlock