[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.

[oota-llvm.git] / test / CodeGen / Mips / insn-zero-size-bb.ll

diff --git a/test/CodeGen/Mips/insn-zero-size-bb.ll b/test/CodeGen/Mips/insn-zero-size-bb.ll
index ea61c994ae1d953795b4bf9bd22f9c3c1952a000..a9c2069b3044ff5404a4a28bb5efabfece7aebb2 100644 (file)
--- a/test/CodeGen/Mips/insn-zero-size-bb.ll
+++ b/test/CodeGen/Mips/insn-zero-size-bb.ll
@@ -1,6 +1,6 @@
 ; RUN: llc < %s -march=mips -mcpu=mips32 | FileCheck %s
 ; RUN: llc < %s -march=mips -mcpu=mips32r3 -mattr=+micromips | FileCheck %s
-; RUN: llc < %s -march=mips -mcpu=mips16 | FileCheck %s
+; RUN: llc < %s -march=mips -mattr=mips16 | FileCheck %s
 
 ; Verify that we emit the .insn directive for zero-sized (empty) basic blocks.
 ; This only really matters for microMIPS and MIPS16.