MIR Serialization: Change MIR syntax - use custom syntax for MBBs.

[oota-llvm.git] / test / CodeGen / MIR / X86 / expected-named-register-in-allocation-hint.mir

diff --git a/test/CodeGen/MIR/X86/expected-named-register-in-allocation-hint.mir b/test/CodeGen/MIR/X86/expected-named-register-in-allocation-hint.mir
index 3dca9ab726b8274a46f128a4b8db287695456aed..04568f6dde57a6d33f983d3f20c544331c4c8a82 100644 (file)
--- a/test/CodeGen/MIR/X86/expected-named-register-in-allocation-hint.mir
+++ b/test/CodeGen/MIR/X86/expected-named-register-in-allocation-hint.mir
@@ -17,14 +17,13 @@ registers:
   # CHECK: [[@LINE+1]]:48: expected a named register
   - { id: 1, class: gr32, preferred-register: '%0' }
   - { id: 2, class: gr32, preferred-register: '%edi' }
-body:
-  - id:              0
-    name:            body
-    liveins:         [ '%edi', '%esi' ]
-    instructions:
-      - '%1 = COPY %esi'
-      - '%2 = COPY %edi'
-      - '%2 = IMUL32rr %2, %1, implicit-def dead %eflags'
-      - '%eax = COPY %2'
-      - 'RETQ killed %eax'
+body: |
+  bb.0.body:
+    liveins: %edi, %esi
+
+    %1 = COPY %esi
+    %2 = COPY %edi
+    %2 = IMUL32rr %2, %1, implicit-def dead %eflags
+    %eax = COPY %2
+    RETQ killed %eax
 ...