Fix mapping of @llvm.arm.ssat/usat intrinsics to ssat/usat instructions for Thumb2

[oota-llvm.git] / test / CodeGen / ARM / sat-arith.ll

diff --git a/test/CodeGen/ARM/sat-arith.ll b/test/CodeGen/ARM/sat-arith.ll
index c1ad1a5858e78044a8deed2e54d26ceca64736df..4844ed1bd21e253e042073434784ff2c1b4ac763 100644 (file)
--- a/test/CodeGen/ARM/sat-arith.ll
+++ b/test/CodeGen/ARM/sat-arith.ll
@@ -1,19 +1,22 @@
-; RUN: llc -O1 -mtriple=armv6-none-none-eabi %s -o - | FileCheck %s
+; RUN: llc -O1 -mtriple=armv6-none-none-eabi %s -o - | FileCheck %s -check-prefix=ARM -check-prefix=CHECK
+; RUN: llc -O1 -mtriple=thumbv7-none-none-eabi %s -o - | FileCheck %s -check-prefix=THUMB -check-prefix=CHECK
 
 ; CHECK-LABEL: qadd
 define i32 @qadd() nounwind {
-; CHECK: mov [[R0:.*]], #8
-; CHECK: mov [[R1:.*]], #128
-; CHECK: qadd [[R0]], [[R1]], [[R0]]
+; CHECK-DAG: mov{{s?}} [[R0:.*]], #8
+; CHECK-DAG: mov{{s?}} [[R1:.*]], #128
+; CHECK-ARM: qadd [[R0]], [[R1]], [[R0]]
+; CHECK-THRUMB: qadd [[R0]], [[R0]], [[R1]]
   %tmp = call i32 @llvm.arm.qadd(i32 128, i32 8)
   ret i32 %tmp
 }
 
 ; CHECK-LABEL: qsub
 define i32 @qsub() nounwind {
-; CHECK: mov [[R0:.*]], #8
-; CHECK: mov [[R1:.*]], #128
-; CHECK: qsub [[R0]], [[R1]], [[R0]]
+; CHECK-DAG: mov{{s?}} [[R0:.*]], #8
+; CHECK-DAG: mov{{s?}} [[R1:.*]], #128
+; CHECK-ARM: qsub [[R0]], [[R1]], [[R0]]
+; CHECK-THRUMB: qadd [[R0]], [[R1]], [[R0]]
   %tmp = call i32 @llvm.arm.qsub(i32 128, i32 8)
   ret i32 %tmp
 }
@@ -21,7 +24,7 @@ define i32 @qsub() nounwind {
 ; upper-bound of the immediate argument
 ; CHECK-LABEL: ssat1
 define i32 @ssat1() nounwind {
-; CHECK: mov [[R0:.*]], #128
+; CHECK: mov{{s?}} [[R0:.*]], #128
 ; CHECK: ssat [[R1:.*]], #32, [[R0]]
   %tmp = call i32 @llvm.arm.ssat(i32 128, i32 32)
   ret i32 %tmp
@@ -30,7 +33,7 @@ define i32 @ssat1() nounwind {
 ; lower-bound of the immediate argument
 ; CHECK-LABEL: ssat2
 define i32 @ssat2() nounwind {
-; CHECK: mov [[R0:.*]], #128
+; CHECK: mov{{s?}} [[R0:.*]], #128
 ; CHECK: ssat [[R1:.*]], #1, [[R0]]
   %tmp = call i32 @llvm.arm.ssat(i32 128, i32 1)
   ret i32 %tmp
@@ -39,7 +42,7 @@ define i32 @ssat2() nounwind {
 ; upper-bound of the immediate argument
 ; CHECK-LABEL: usat1
 define i32 @usat1() nounwind {
-; CHECK: mov [[R0:.*]], #128
+; CHECK: mov{{s?}} [[R0:.*]], #128
 ; CHECK: usat [[R1:.*]], #31, [[R0]]
   %tmp = call i32 @llvm.arm.usat(i32 128, i32 31)
   ret i32 %tmp
@@ -48,7 +51,7 @@ define i32 @usat1() nounwind {
 ; lower-bound of the immediate argument
 ; CHECK-LABEL: usat2
 define i32 @usat2() nounwind {
-; CHECK: mov [[R0:.*]], #128
+; CHECK: mov{{s?}} [[R0:.*]], #128
 ; CHECK: usat [[R1:.*]], #0, [[R0]]
   %tmp = call i32 @llvm.arm.usat(i32 128, i32 0)
   ret i32 %tmp