[ARM] Enable shrink-wrapping by default.

[oota-llvm.git] / test / CodeGen / ARM / ifcvt5.ll

diff --git a/test/CodeGen/ARM/ifcvt5.ll b/test/CodeGen/ARM/ifcvt5.ll
index e9145ac36ddfbf143b13e4a025a531af5371b1c5..9fb8abde6130d1193aae522443e6fc5de1d089a4 100644 (file)
--- a/test/CodeGen/ARM/ifcvt5.ll
+++ b/test/CodeGen/ARM/ifcvt5.ll
@@ -1,25 +1,31 @@
-; RUN: llc < %s -mtriple=armv7-apple-darwin | FileCheck %s
+; RUN: llc < %s -mtriple=armv7-apple-ios -mcpu=cortex-a8 | FileCheck %s -check-prefix=A8
+; RUN: llc < %s -mtriple=armv7-apple-ios -mcpu=swift     | FileCheck %s -check-prefix=SWIFT
+; rdar://8402126
 
 @x = external global i32*              ; <i32**> [#uses=1]
 
 define void @foo(i32 %a) {
 entry:
-       %tmp = load i32** @x            ; <i32*> [#uses=1]
+       %tmp = load i32*, i32** @x              ; <i32*> [#uses=1]
        store i32 %a, i32* %tmp
        ret void
 }
 
-define void @t1(i32 %a, i32 %b) {
-; CHECK: t1:
-; CHECK: ldmltfd sp!, {r7, pc}
+define i32 @t1(i32 %a, i32 %b) {
+; A8-LABEL: t1:
+; A8: bxlt lr
+
+; SWIFT-LABEL: t1:
+; SWIFT: bxlt lr
+; SWIFT: pop {r7, pc}
 entry:
        %tmp1 = icmp sgt i32 %a, 10             ; <i1> [#uses=1]
        br i1 %tmp1, label %cond_true, label %UnifiedReturnBlock
 
 cond_true:             ; preds = %entry
        tail call void @foo( i32 %b )
-       ret void
+       ret i32 0
 
 UnifiedReturnBlock:            ; preds = %entry
-       ret void
+       ret i32 1
 }