//
// The LLVM Compiler Infrastructure
//
-// This file was developed by the LLVM research group and is distributed under
-// the University of Illinois Open Source License. See LICENSE.TXT for details.
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
//
#include "X86JITInfo.h"
#include "X86Relocations.h"
#include "X86Subtarget.h"
-#include "llvm/CodeGen/MachineCodeEmitter.h"
-#include "llvm/Config/alloca.h"
+#include "X86TargetMachine.h"
+#include "llvm/Function.h"
+#include "llvm/Support/Compiler.h"
+#include "llvm/Support/ErrorHandling.h"
+#include "llvm/Support/Valgrind.h"
#include <cstdlib>
+#include <cstring>
using namespace llvm;
-#ifdef _MSC_VER
- extern "C" void *_AddressOfReturnAddress(void);
- #pragma intrinsic(_AddressOfReturnAddress)
+// Determine the platform we're running on
+#if defined (__x86_64__) || defined (_M_AMD64) || defined (_M_X64)
+# define X86_64_JIT
+#elif defined(__i386__) || defined(i386) || defined(_M_IX86)
+# define X86_32_JIT
#endif
void X86JITInfo::replaceMachineCodeForFunction(void *Old, void *New) {
unsigned NewAddr = (intptr_t)New;
unsigned OldAddr = (intptr_t)OldWord;
*OldWord = NewAddr - OldAddr - 4; // Emit PC-relative addr of New code.
+
+ // X86 doesn't need to invalidate the processor cache, so just invalidate
+ // Valgrind's cache directly.
+ sys::ValgrindDiscardTranslations(Old, 5);
}
#define GETASMPREFIX(X) GETASMPREFIX2(X)
#define ASMPREFIX GETASMPREFIX(__USER_LABEL_PREFIX__)
+// For ELF targets, use a .size and .type directive, to let tools
+// know the extent of functions defined in assembler.
+#if defined(__ELF__)
+# define SIZE(sym) ".size " #sym ", . - " #sym "\n"
+# define TYPE_FUNCTION(sym) ".type " #sym ", @function\n"
+#else
+# define SIZE(sym)
+# define TYPE_FUNCTION(sym)
+#endif
+
+// Provide a convenient way for disabling usage of CFI directives.
+// This is needed for old/broken assemblers (for example, gas on
+// Darwin is pretty old and doesn't support these directives)
+#if defined(__APPLE__)
+# define CFI(x)
+#else
+// FIXME: Disable this until we really want to use it. Also, we will
+// need to add some workarounds for compilers, which support
+// only subset of these directives.
+# define CFI(x)
+#endif
+
// Provide a wrapper for X86CompilationCallback2 that saves non-traditional
// callee saved registers, for the fastcc calling convention.
extern "C" {
-#if defined(__x86_64__)
+#if defined(X86_64_JIT)
+# ifndef _MSC_VER
// No need to save EAX/EDX for X86-64.
void X86CompilationCallback(void);
asm(
".text\n"
".align 8\n"
".globl " ASMPREFIX "X86CompilationCallback\n"
+ TYPE_FUNCTION(X86CompilationCallback)
ASMPREFIX "X86CompilationCallback:\n"
- ".cfi_startproc\n"
+ CFI(".cfi_startproc\n")
// Save RBP
"pushq %rbp\n"
- ".cfi_def_cfa_offset 16\n"
- ".cfi_offset %rbp, -16\n"
+ CFI(".cfi_def_cfa_offset 16\n")
+ CFI(".cfi_offset %rbp, -16\n")
// Save RSP
"movq %rsp, %rbp\n"
- ".cfi_def_cfa_register %rbp\n"
+ CFI(".cfi_def_cfa_register %rbp\n")
// Save all int arg registers
"pushq %rdi\n"
- ".cfi_rel_offset %rdi, 0\n"
+ CFI(".cfi_rel_offset %rdi, 0\n")
"pushq %rsi\n"
- ".cfi_rel_offset %rsi, 8\n"
+ CFI(".cfi_rel_offset %rsi, 8\n")
"pushq %rdx\n"
- ".cfi_rel_offset %rdx, 16\n"
+ CFI(".cfi_rel_offset %rdx, 16\n")
"pushq %rcx\n"
- ".cfi_rel_offset %rcx, 24\n"
+ CFI(".cfi_rel_offset %rcx, 24\n")
"pushq %r8\n"
- ".cfi_rel_offset %r8, 32\n"
+ CFI(".cfi_rel_offset %r8, 32\n")
"pushq %r9\n"
- ".cfi_rel_offset %r9, 40\n"
+ CFI(".cfi_rel_offset %r9, 40\n")
// Align stack on 16-byte boundary. ESP might not be properly aligned
// (8 byte) if this is called from an indirect stub.
"andq $-16, %rsp\n"
"movaps %xmm6, 96(%rsp)\n"
"movaps %xmm7, 112(%rsp)\n"
// JIT callee
+#ifdef _WIN64
+ "subq $32, %rsp\n"
+ "movq %rbp, %rcx\n" // Pass prev frame and return address
+ "movq 8(%rbp), %rdx\n"
+ "call " ASMPREFIX "X86CompilationCallback2\n"
+ "addq $32, %rsp\n"
+#else
"movq %rbp, %rdi\n" // Pass prev frame and return address
"movq 8(%rbp), %rsi\n"
"call " ASMPREFIX "X86CompilationCallback2\n"
+#endif
// Restore all XMM arg registers
"movaps 112(%rsp), %xmm7\n"
"movaps 96(%rsp), %xmm6\n"
"movaps (%rsp), %xmm0\n"
// Restore RSP
"movq %rbp, %rsp\n"
- ".cfi_def_cfa_register esp\n"
+ CFI(".cfi_def_cfa_register %rsp\n")
// Restore all int arg registers
"subq $48, %rsp\n"
- ".cfi_adjust_cfa_offset 48\n"
+ CFI(".cfi_adjust_cfa_offset 48\n")
"popq %r9\n"
- ".cfi_adjust_cfa_offset -8\n"
- ".cfi_restore %r9\n"
+ CFI(".cfi_adjust_cfa_offset -8\n")
+ CFI(".cfi_restore %r9\n")
"popq %r8\n"
- ".cfi_adjust_cfa_offset -8\n"
- ".cfi_restore %r8\n"
+ CFI(".cfi_adjust_cfa_offset -8\n")
+ CFI(".cfi_restore %r8\n")
"popq %rcx\n"
- ".cfi_adjust_cfa_offset -8\n"
- ".cfi_restore %rcx\n"
+ CFI(".cfi_adjust_cfa_offset -8\n")
+ CFI(".cfi_restore %rcx\n")
"popq %rdx\n"
- ".cfi_adjust_cfa_offset -8\n"
- ".cfi_restore %rdx\n"
+ CFI(".cfi_adjust_cfa_offset -8\n")
+ CFI(".cfi_restore %rdx\n")
"popq %rsi\n"
- ".cfi_adjust_cfa_offset -8\n"
- ".cfi_restore %rsi\n"
+ CFI(".cfi_adjust_cfa_offset -8\n")
+ CFI(".cfi_restore %rsi\n")
"popq %rdi\n"
- ".cfi_adjust_cfa_offset -8\n"
- ".cfi_restore %rdi\n"
+ CFI(".cfi_adjust_cfa_offset -8\n")
+ CFI(".cfi_restore %rdi\n")
// Restore RBP
"popq %rbp\n"
- ".cfi_adjust_cfa_offset -8\n"
- ".cfi_restore %rbp\n"
+ CFI(".cfi_adjust_cfa_offset -8\n")
+ CFI(".cfi_restore %rbp\n")
"ret\n"
- ".cfi_endproc\n");
-#elif defined(__i386__) || defined(i386) || defined(_M_IX86)
-#ifndef _MSC_VER
+ CFI(".cfi_endproc\n")
+ SIZE(X86CompilationCallback)
+ );
+# else
+ // No inline assembler support on this platform. The routine is in external
+ // file.
+ void X86CompilationCallback();
+
+# endif
+#elif defined (X86_32_JIT)
+# ifndef _MSC_VER
void X86CompilationCallback(void);
asm(
".text\n"
".align 8\n"
- ".globl " ASMPREFIX "X86CompilationCallback\n"
+ ".globl " ASMPREFIX "X86CompilationCallback\n"
+ TYPE_FUNCTION(X86CompilationCallback)
ASMPREFIX "X86CompilationCallback:\n"
- ".cfi_startproc\n"
+ CFI(".cfi_startproc\n")
"pushl %ebp\n"
- ".cfi_def_cfa_offset 8\n"
- ".cfi_offset %ebp, -8\n"
+ CFI(".cfi_def_cfa_offset 8\n")
+ CFI(".cfi_offset %ebp, -8\n")
"movl %esp, %ebp\n" // Standard prologue
- ".cfi_def_cfa_register %ebp\n"
+ CFI(".cfi_def_cfa_register %ebp\n")
"pushl %eax\n"
- ".cfi_rel_offset %eax, 0\n"
+ CFI(".cfi_rel_offset %eax, 0\n")
"pushl %edx\n" // Save EAX/EDX/ECX
- ".cfi_rel_offset %edx, 4\n"
+ CFI(".cfi_rel_offset %edx, 4\n")
"pushl %ecx\n"
- ".cfi_rel_offset %ecx, 8\n"
-#if defined(__APPLE__)
+ CFI(".cfi_rel_offset %ecx, 8\n")
+# if defined(__APPLE__)
"andl $-16, %esp\n" // Align ESP on 16-byte boundary
-#endif
+# endif
"subl $16, %esp\n"
"movl 4(%ebp), %eax\n" // Pass prev frame and return address
"movl %eax, 4(%esp)\n"
"movl %ebp, (%esp)\n"
"call " ASMPREFIX "X86CompilationCallback2\n"
"movl %ebp, %esp\n" // Restore ESP
- ".cfi_def_cfa_register %esp\n"
+ CFI(".cfi_def_cfa_register %esp\n")
"subl $12, %esp\n"
- ".cfi_adjust_cfa_offset 12\n"
+ CFI(".cfi_adjust_cfa_offset 12\n")
"popl %ecx\n"
- ".cfi_adjust_cfa_offset -4\n"
- ".cfi_restore %ecx\n"
+ CFI(".cfi_adjust_cfa_offset -4\n")
+ CFI(".cfi_restore %ecx\n")
"popl %edx\n"
- ".cfi_adjust_cfa_offset -4\n"
- ".cfi_restore %edx\n"
+ CFI(".cfi_adjust_cfa_offset -4\n")
+ CFI(".cfi_restore %edx\n")
"popl %eax\n"
- ".cfi_adjust_cfa_offset -4\n"
- ".cfi_restore %eax\n"
+ CFI(".cfi_adjust_cfa_offset -4\n")
+ CFI(".cfi_restore %eax\n")
"popl %ebp\n"
- ".cfi_adjust_cfa_offset -4\n"
- ".cfi_restore %ebp\n"
+ CFI(".cfi_adjust_cfa_offset -4\n")
+ CFI(".cfi_restore %ebp\n")
"ret\n"
- ".cfi_endproc\n");
+ CFI(".cfi_endproc\n")
+ SIZE(X86CompilationCallback)
+ );
// Same as X86CompilationCallback but also saves XMM argument registers.
void X86CompilationCallback_SSE(void);
asm(
".text\n"
".align 8\n"
- ".globl " ASMPREFIX "X86CompilationCallback_SSE\n"
+ ".globl " ASMPREFIX "X86CompilationCallback_SSE\n"
+ TYPE_FUNCTION(X86CompilationCallback_SSE)
ASMPREFIX "X86CompilationCallback_SSE:\n"
- ".cfi_startproc\n"
+ CFI(".cfi_startproc\n")
"pushl %ebp\n"
- ".cfi_def_cfa_offset 8\n"
- ".cfi_offset %ebp, -8\n"
+ CFI(".cfi_def_cfa_offset 8\n")
+ CFI(".cfi_offset %ebp, -8\n")
"movl %esp, %ebp\n" // Standard prologue
- ".cfi_def_cfa_register %ebp\n"
+ CFI(".cfi_def_cfa_register %ebp\n")
"pushl %eax\n"
- ".cfi_rel_offset %eax, 0\n"
+ CFI(".cfi_rel_offset %eax, 0\n")
"pushl %edx\n" // Save EAX/EDX/ECX
- ".cfi_rel_offset %edx, 4\n"
+ CFI(".cfi_rel_offset %edx, 4\n")
"pushl %ecx\n"
- ".cfi_rel_offset %ecx, 8\n"
+ CFI(".cfi_rel_offset %ecx, 8\n")
"andl $-16, %esp\n" // Align ESP on 16-byte boundary
// Save all XMM arg registers
"subl $64, %esp\n"
"call " ASMPREFIX "X86CompilationCallback2\n"
"addl $16, %esp\n"
"movaps 48(%esp), %xmm3\n"
- ".cfi_restore %xmm3\n"
+ CFI(".cfi_restore %xmm3\n")
"movaps 32(%esp), %xmm2\n"
- ".cfi_restore %xmm2\n"
+ CFI(".cfi_restore %xmm2\n")
"movaps 16(%esp), %xmm1\n"
- ".cfi_restore %xmm1\n"
+ CFI(".cfi_restore %xmm1\n")
"movaps (%esp), %xmm0\n"
- ".cfi_restore %xmm0\n"
+ CFI(".cfi_restore %xmm0\n")
"movl %ebp, %esp\n" // Restore ESP
- ".cfi_def_cfa_register esp\n"
+ CFI(".cfi_def_cfa_register esp\n")
"subl $12, %esp\n"
- ".cfi_adjust_cfa_offset 12\n"
+ CFI(".cfi_adjust_cfa_offset 12\n")
"popl %ecx\n"
- ".cfi_adjust_cfa_offset -4\n"
- ".cfi_restore %ecx\n"
+ CFI(".cfi_adjust_cfa_offset -4\n")
+ CFI(".cfi_restore %ecx\n")
"popl %edx\n"
- ".cfi_adjust_cfa_offset -4\n"
- ".cfi_restore %edx\n"
+ CFI(".cfi_adjust_cfa_offset -4\n")
+ CFI(".cfi_restore %edx\n")
"popl %eax\n"
- ".cfi_adjust_cfa_offset -4\n"
- ".cfi_restore %eax\n"
+ CFI(".cfi_adjust_cfa_offset -4\n")
+ CFI(".cfi_restore %eax\n")
"popl %ebp\n"
- ".cfi_adjust_cfa_offset -4\n"
- ".cfi_restore %ebp\n"
+ CFI(".cfi_adjust_cfa_offset -4\n")
+ CFI(".cfi_restore %ebp\n")
"ret\n"
- ".cfi_endproc\n");
-#else
- void X86CompilationCallback2(void);
+ CFI(".cfi_endproc\n")
+ SIZE(X86CompilationCallback_SSE)
+ );
+# else
+ // the following function is called only from this translation unit,
+ // unless we are under 64bit Windows with MSC, where there is
+ // no support for inline assembly
+ static void X86CompilationCallback2(intptr_t *StackPtr, intptr_t RetAddr);
_declspec(naked) void X86CompilationCallback(void) {
__asm {
+ push ebp
+ mov ebp, esp
push eax
push edx
push ecx
+ and esp, -16
+ sub esp, 16
+ mov eax, dword ptr [ebp+4]
+ mov dword ptr [esp+4], eax
+ mov dword ptr [esp], ebp
call X86CompilationCallback2
+ mov esp, ebp
+ sub esp, 12
pop ecx
pop edx
pop eax
+ pop ebp
ret
}
}
-#endif // _MSC_VER
+
+# endif // _MSC_VER
#else // Not an i386 host
void X86CompilationCallback() {
- assert(0 && "Cannot call X86CompilationCallback() on a non-x86 arch!\n");
- abort();
+ llvm_unreachable("Cannot call X86CompilationCallback() on a non-x86 arch!");
}
#endif
}
-/// X86CompilationCallback - This is the target-specific function invoked by the
+/// X86CompilationCallback2 - This is the target-specific function invoked by the
/// function stub when we did not know the real target of a call. This function
/// must locate the start of the stub or call site and pass it into the JIT
/// compiler function.
-#ifdef _MSC_VER
-extern "C" void X86CompilationCallback2() {
- assert(sizeof(size_t) == 4); // FIXME: handle Win64
- intptr_t *RetAddrLoc = (intptr_t *)_AddressOfReturnAddress();
- RetAddrLoc += 4; // skip over ret addr, edx, eax, ecx
- intptr_t RetAddr = *RetAddrLoc;
-#else
-extern "C" void X86CompilationCallback2(intptr_t *StackPtr, intptr_t RetAddr) {
- intptr_t *RetAddrLoc = &StackPtr[1];
+extern "C" {
+#if !(defined (X86_64_JIT) && defined(_MSC_VER))
+ // the following function is called only from this translation unit,
+ // unless we are under 64bit Windows with MSC, where there is
+ // no support for inline assembly
+static
#endif
+void LLVM_ATTRIBUTE_USED
+X86CompilationCallback2(intptr_t *StackPtr, intptr_t RetAddr) {
+ intptr_t *RetAddrLoc = &StackPtr[1];
assert(*RetAddrLoc == RetAddr &&
"Could not find return address on the stack!");
// It's a stub if there is an interrupt marker after the call.
- bool isStub = ((unsigned char*)RetAddr)[0] == 0xCD;
+ bool isStub = ((unsigned char*)RetAddr)[0] == 0xCE;
// The call instruction should have pushed the return value onto the stack...
-#ifdef __x86_64__
+#if defined (X86_64_JIT)
RetAddr--; // Backtrack to the reference itself...
#else
RetAddr -= 4; // Backtrack to the reference itself...
#endif
#if 0
- DOUT << "In callback! Addr=" << (void*)RetAddr
- << " ESP=" << (void*)StackPtr
- << ": Resolving call to function: "
- << TheVM->getFunctionReferencedName((void*)RetAddr) << "\n";
+ DEBUG(dbgs() << "In callback! Addr=" << (void*)RetAddr
+ << " ESP=" << (void*)StackPtr
+ << ": Resolving call to function: "
+ << TheVM->getFunctionReferencedName((void*)RetAddr) << "\n");
#endif
// Sanity check to make sure this really is a call instruction.
-#ifdef __x86_64__
+#if defined (X86_64_JIT)
assert(((unsigned char*)RetAddr)[-2] == 0x41 &&"Not a call instr!");
assert(((unsigned char*)RetAddr)[-1] == 0xFF &&"Not a call instr!");
#else
// Rewrite the call target... so that we don't end up here every time we
// execute the call.
-#ifdef __x86_64__
- *(intptr_t *)(RetAddr - 0xa) = NewVal;
+#if defined (X86_64_JIT)
+ assert(isStub &&
+ "X86-64 doesn't support rewriting non-stub lazy compilation calls:"
+ " the call instruction varies too much.");
#else
*(intptr_t *)RetAddr = (intptr_t)(NewVal-RetAddr-4);
#endif
// If this is a stub, rewrite the call into an unconditional branch
// instruction so that two return addresses are not pushed onto the stack
// when the requested function finally gets called. This also makes the
- // 0xCD byte (interrupt) dead, so the marker doesn't effect anything.
-#ifdef __x86_64__
- ((unsigned char*)RetAddr)[0] = (2 | (4 << 3) | (3 << 6));
+ // 0xCE byte (interrupt) dead, so the marker doesn't effect anything.
+#if defined (X86_64_JIT)
+ // If the target address is within 32-bit range of the stub, use a
+ // PC-relative branch instead of loading the actual address. (This is
+ // considerably shorter than the 64-bit immediate load already there.)
+ // We assume here intptr_t is 64 bits.
+ intptr_t diff = NewVal-RetAddr+7;
+ if (diff >= -2147483648LL && diff <= 2147483647LL) {
+ *(unsigned char*)(RetAddr-0xc) = 0xE9;
+ *(intptr_t *)(RetAddr-0xb) = diff & 0xffffffff;
+ } else {
+ *(intptr_t *)(RetAddr - 0xa) = NewVal;
+ ((unsigned char*)RetAddr)[0] = (2 | (4 << 3) | (3 << 6));
+ }
+ sys::ValgrindDiscardTranslations((void*)(RetAddr-0xc), 0xd);
#else
((unsigned char*)RetAddr)[-1] = 0xE9;
+ sys::ValgrindDiscardTranslations((void*)(RetAddr-1), 5);
#endif
}
// Change the return address to reexecute the call instruction...
-#ifdef __x86_64__
+#if defined (X86_64_JIT)
*RetAddrLoc -= 0xd;
#else
*RetAddrLoc -= 5;
#endif
}
+}
TargetJITInfo::LazyResolverFn
X86JITInfo::getLazyResolverFunction(JITCompilerFn F) {
+ TsanIgnoreWritesBegin();
JITCompilerFunction = F;
+ TsanIgnoreWritesEnd();
-#if (defined(__i386__) || defined(i386) || defined(_M_IX86)) && \
- !defined(_MSC_VER) && !defined(__x86_64__)
- unsigned EAX = 0, EBX = 0, ECX = 0, EDX = 0;
- union {
- unsigned u[3];
- char c[12];
- } text;
-
- if (!X86::GetCpuIDAndInfo(0, &EAX, text.u+0, text.u+2, text.u+1)) {
- // FIXME: support for AMD family of processors.
- if (memcmp(text.c, "GenuineIntel", 12) == 0) {
- X86::GetCpuIDAndInfo(0x1, &EAX, &EBX, &ECX, &EDX);
- if ((EDX >> 25) & 0x1)
- return X86CompilationCallback_SSE;
- }
- }
+#if defined (X86_32_JIT) && !defined (_MSC_VER)
+ if (Subtarget->hasSSE1())
+ return X86CompilationCallback_SSE;
#endif
return X86CompilationCallback;
}
-void *X86JITInfo::emitFunctionStub(void *Fn, MachineCodeEmitter &MCE) {
- // Note, we cast to intptr_t here to silence a -pedantic warning that
+X86JITInfo::X86JITInfo(X86TargetMachine &tm) : TM(tm) {
+ Subtarget = &TM.getSubtarget<X86Subtarget>();
+ useGOT = 0;
+ TLSOffset = 0;
+}
+
+void *X86JITInfo::emitGlobalValueIndirectSym(const GlobalValue* GV, void *ptr,
+ JITCodeEmitter &JCE) {
+#if defined (X86_64_JIT)
+ const unsigned Alignment = 8;
+ uint8_t Buffer[8];
+ uint8_t *Cur = Buffer;
+ MachineCodeEmitter::emitWordLEInto(Cur, (unsigned)(intptr_t)ptr);
+ MachineCodeEmitter::emitWordLEInto(Cur, (unsigned)(((intptr_t)ptr) >> 32));
+#else
+ const unsigned Alignment = 4;
+ uint8_t Buffer[4];
+ uint8_t *Cur = Buffer;
+ MachineCodeEmitter::emitWordLEInto(Cur, (intptr_t)ptr);
+#endif
+ return JCE.allocIndirectGV(GV, Buffer, sizeof(Buffer), Alignment);
+}
+
+TargetJITInfo::StubLayout X86JITInfo::getStubLayout() {
+ // The 64-bit stub contains:
+ // movabs r10 <- 8-byte-target-address # 10 bytes
+ // call|jmp *r10 # 3 bytes
+ // The 32-bit stub contains a 5-byte call|jmp.
+ // If the stub is a call to the compilation callback, an extra byte is added
+ // to mark it as a stub.
+ StubLayout Result = {14, 4};
+ return Result;
+}
+
+void *X86JITInfo::emitFunctionStub(const Function* F, void *Target,
+ JITCodeEmitter &JCE) {
+ // Note, we cast to intptr_t here to silence a -pedantic warning that
// complains about casting a function pointer to a normal pointer.
-#if (defined(__i386__) || defined(i386) || defined(_M_IX86)) && \
- !defined(_MSC_VER) && !defined(__x86_64__)
- bool NotCC = (Fn != (void*)(intptr_t)X86CompilationCallback &&
- Fn != (void*)(intptr_t)X86CompilationCallback_SSE);
+#if defined (X86_32_JIT) && !defined (_MSC_VER)
+ bool NotCC = (Target != (void*)(intptr_t)X86CompilationCallback &&
+ Target != (void*)(intptr_t)X86CompilationCallback_SSE);
#else
- bool NotCC = Fn != (void*)(intptr_t)X86CompilationCallback;
+ bool NotCC = Target != (void*)(intptr_t)X86CompilationCallback;
#endif
+ JCE.emitAlignment(4);
+ void *Result = (void*)JCE.getCurrentPCValue();
if (NotCC) {
-#ifdef __x86_64__
- MCE.startFunctionStub(13, 4);
- MCE.emitByte(0x49); // REX prefix
- MCE.emitByte(0xB8+2); // movabsq r10
- MCE.emitWordLE(((unsigned *)&Fn)[0]);
- MCE.emitWordLE(((unsigned *)&Fn)[1]);
- MCE.emitByte(0x41); // REX prefix
- MCE.emitByte(0xFF); // jmpq *r10
- MCE.emitByte(2 | (4 << 3) | (3 << 6));
+#if defined (X86_64_JIT)
+ JCE.emitByte(0x49); // REX prefix
+ JCE.emitByte(0xB8+2); // movabsq r10
+ JCE.emitWordLE((unsigned)(intptr_t)Target);
+ JCE.emitWordLE((unsigned)(((intptr_t)Target) >> 32));
+ JCE.emitByte(0x41); // REX prefix
+ JCE.emitByte(0xFF); // jmpq *r10
+ JCE.emitByte(2 | (4 << 3) | (3 << 6));
#else
- MCE.startFunctionStub(5, 4);
- MCE.emitByte(0xE9);
- MCE.emitWordLE((intptr_t)Fn-MCE.getCurrentPCValue()-4);
+ JCE.emitByte(0xE9);
+ JCE.emitWordLE((intptr_t)Target-JCE.getCurrentPCValue()-4);
#endif
- return MCE.finishFunctionStub(0);
+ return Result;
}
-#ifdef __x86_64__
- MCE.startFunctionStub(14, 4);
- MCE.emitByte(0x49); // REX prefix
- MCE.emitByte(0xB8+2); // movabsq r10
- MCE.emitWordLE(((unsigned *)&Fn)[0]);
- MCE.emitWordLE(((unsigned *)&Fn)[1]);
- MCE.emitByte(0x41); // REX prefix
- MCE.emitByte(0xFF); // callq *r10
- MCE.emitByte(2 | (2 << 3) | (3 << 6));
+#if defined (X86_64_JIT)
+ JCE.emitByte(0x49); // REX prefix
+ JCE.emitByte(0xB8+2); // movabsq r10
+ JCE.emitWordLE((unsigned)(intptr_t)Target);
+ JCE.emitWordLE((unsigned)(((intptr_t)Target) >> 32));
+ JCE.emitByte(0x41); // REX prefix
+ JCE.emitByte(0xFF); // callq *r10
+ JCE.emitByte(2 | (2 << 3) | (3 << 6));
#else
- MCE.startFunctionStub(6, 4);
- MCE.emitByte(0xE8); // Call with 32 bit pc-rel destination...
+ JCE.emitByte(0xE8); // Call with 32 bit pc-rel destination...
- MCE.emitWordLE((intptr_t)Fn-MCE.getCurrentPCValue()-4);
+ JCE.emitWordLE((intptr_t)Target-JCE.getCurrentPCValue()-4);
#endif
- MCE.emitByte(0xCD); // Interrupt - Just a marker identifying the stub!
- return MCE.finishFunctionStub(0);
+ // This used to use 0xCD, but that value is used by JITMemoryManager to
+ // initialize the buffer with garbage, which means it may follow a
+ // noreturn function call, confusing X86CompilationCallback2. PR 4929.
+ JCE.emitByte(0xCE); // Interrupt - Just a marker identifying the stub!
+ return Result;
+}
+
+/// getPICJumpTableEntry - Returns the value of the jumptable entry for the
+/// specific basic block.
+uintptr_t X86JITInfo::getPICJumpTableEntry(uintptr_t BB, uintptr_t Entry) {
+#if defined(X86_64_JIT)
+ return BB - Entry;
+#else
+ return BB - PICBase;
+#endif
}
/// relocate - Before the JIT can run a block of code that has been emitted,
case X86::reloc_pcrel_word: {
// PC relative relocation, add the relocated value to the value already in
// memory, after we adjust it for where the PC is.
- ResultPtr = ResultPtr-(intptr_t)RelocPos-4-MR->getConstantVal();
+ ResultPtr = ResultPtr -(intptr_t)RelocPos - 4 - MR->getConstantVal();
+ *((unsigned*)RelocPos) += (unsigned)ResultPtr;
+ break;
+ }
+ case X86::reloc_picrel_word: {
+ // PIC base relative relocation, add the relocated value to the value
+ // already in memory, after we adjust it for where the PIC base is.
+ ResultPtr = ResultPtr - ((intptr_t)Function + MR->getConstantVal());
*((unsigned*)RelocPos) += (unsigned)ResultPtr;
break;
}
case X86::reloc_absolute_word:
+ case X86::reloc_absolute_word_sext:
// Absolute relocation, just add the relocated value to the value already
// in memory.
*((unsigned*)RelocPos) += (unsigned)ResultPtr;
}
}
}
+
+char* X86JITInfo::allocateThreadLocalMemory(size_t size) {
+#if defined(X86_32_JIT) && !defined(__APPLE__) && !defined(_MSC_VER)
+ TLSOffset -= size;
+ return TLSOffset;
+#else
+ llvm_unreachable("Cannot allocate thread local storage on this arch!");
+#endif
+}
projects / oota-llvm.git / blobdiff