//===-- X86/X86CodeEmitter.cpp - Convert X86 code to machine code ---------===//
+//
+// The LLVM Compiler Infrastructure
+//
+// This file was developed by the LLVM research group and is distributed under
+// the University of Illinois Open Source License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
//
// This file contains the pass that transforms the X86 machine instructions into
// actual executable machine code.
#include "llvm/CodeGen/MachineCodeEmitter.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineInstr.h"
-#include "llvm/Value.h"
+#include "llvm/Function.h"
#include "Support/Debug.h"
#include "Support/Statistic.h"
#include "Config/alloca.h"
+using namespace llvm;
namespace {
Statistic<>
JITResolver *TheJITResolver;
}
+void *X86TargetMachine::getJITStubForFunction(Function *F,
+ MachineCodeEmitter &MCE) {
+ if (TheJITResolver == 0)
+ TheJITResolver = new JITResolver(MCE);
+ return (void*)((unsigned long)TheJITResolver->getLazyResolver(F));
+}
/// addFunctionReference - This method is called when we need to emit the
/// address of a function that has not yet been emitted, so we don't know the
}
/// addPassesToEmitMachineCode - Add passes to the specified pass manager to get
-/// machine code emitted. This uses a MAchineCodeEmitter object to handle
+/// machine code emitted. This uses a MachineCodeEmitter object to handle
/// actually outputting the machine code and resolving things like the address
/// of functions. This method should returns true if machine code emission is
/// not supported.
// Get the address from the backend...
unsigned Address = MCE.getGlobalValueAddress(GV);
- // If the machine code emitter doesn't know what the address IS yet, we have
- // to take special measures.
- //
if (Address == 0) {
// FIXME: this is JIT specific!
if (TheJITResolver == 0)
TheJITResolver = new JITResolver(MCE);
Address = TheJITResolver->addFunctionReference(MCE.getCurrentPCValue(),
- (Function*)GV);
+ cast<Function>(GV));
}
emitMaybePCRelativeValue(Address, true);
}
unsigned Opcode = MI.getOpcode();
const TargetInstrDescriptor &Desc = II->get(Opcode);
- // Emit instruction prefixes if neccesary
+ // Emit instruction prefixes if necessary
if (Desc.TSFlags & X86II::OpSize) MCE.emitByte(0x66);// Operand size...
switch (Desc.TSFlags & X86II::Op0Mask) {
case X86II::MRMSrcReg:
MCE.emitByte(BaseOpcode);
- emitRegModRMByte(MI.getOperand(MI.getNumOperands()-1).getReg(),
- getX86RegNum(MI.getOperand(0).getReg()));
+
+ if (MI.getNumOperands() == 2) {
+ emitRegModRMByte(MI.getOperand(MI.getNumOperands()-1).getReg(),
+ getX86RegNum(MI.getOperand(0).getReg()));
+ } else if (MI.getOperand(2).isImmediate()) {
+ emitRegModRMByte(MI.getOperand(1).getReg(),
+ getX86RegNum(MI.getOperand(0).getReg()));
+
+ emitConstant(MI.getOperand(2).getImmedValue(), sizeOfPtr(Desc));
+ } else {
+ emitRegModRMByte(MI.getOperand(2).getReg(),
+ getX86RegNum(MI.getOperand(0).getReg()));
+ }
break;
case X86II::MRMSrcMem: