//
//===----------------------------------------------------------------------===//
-#ifndef HEXAGONBASEINFO_H
-#define HEXAGONBASEINFO_H
+#ifndef LLVM_LIB_TARGET_HEXAGON_MCTARGETDESC_HEXAGONBASEINFO_H
+#define LLVM_LIB_TARGET_HEXAGON_MCTARGETDESC_HEXAGONBASEINFO_H
#include "HexagonMCTargetDesc.h"
#include "llvm/Support/ErrorHandling.h"
+#include <stdint.h>
+
namespace llvm {
/// HexagonII - This namespace holds all of the target specific flags that
// Solo instructions.
SoloPos = 5,
SoloMask = 0x1,
+ // Packed only with A or X-type instructions.
+ SoloAXPos = 6,
+ SoloAXMask = 0x1,
+ // Only A-type instruction in first slot or nothing.
+ SoloAin1Pos = 7,
+ SoloAin1Mask = 0x1,
// Predicated instructions.
- PredicatedPos = 6,
+ PredicatedPos = 8,
PredicatedMask = 0x1,
- PredicatedFalsePos = 7,
+ PredicatedFalsePos = 9,
PredicatedFalseMask = 0x1,
- PredicatedNewPos = 8,
+ PredicatedNewPos = 10,
PredicatedNewMask = 0x1,
+ PredicateLatePos = 11,
+ PredicateLateMask = 0x1,
// New-Value consumer instructions.
- NewValuePos = 9,
+ NewValuePos = 12,
NewValueMask = 0x1,
-
// New-Value producer instructions.
- hasNewValuePos = 10,
+ hasNewValuePos = 13,
hasNewValueMask = 0x1,
-
// Which operand consumes or produces a new value.
- NewValueOpPos = 11,
+ NewValueOpPos = 14,
NewValueOpMask = 0x7,
-
- // Which bits encode the new value.
- NewValueBitsPos = 14,
- NewValueBitsMask = 0x3,
-
// Stores that can become new-value stores.
- mayNVStorePos = 16,
+ mayNVStorePos = 17,
mayNVStoreMask = 0x1,
-
// New-value store instructions.
- NVStorePos = 17,
+ NVStorePos = 18,
NVStoreMask = 0x1,
+ // Loads that can become current-value loads.
+ mayCVLoadPos = 19,
+ mayCVLoadMask = 0x1,
+ // Current-value load instructions.
+ CVLoadPos = 20,
+ CVLoadMask = 0x1,
// Extendable insns.
- ExtendablePos = 18,
+ ExtendablePos = 21,
ExtendableMask = 0x1,
-
// Insns must be extended.
- ExtendedPos = 19,
+ ExtendedPos = 22,
ExtendedMask = 0x1,
-
// Which operand may be extended.
- ExtendableOpPos = 20,
+ ExtendableOpPos = 23,
ExtendableOpMask = 0x7,
-
// Signed or unsigned range.
- ExtentSignedPos = 23,
+ ExtentSignedPos = 26,
ExtentSignedMask = 0x1,
-
// Number of bits of range before extending operand.
- ExtentBitsPos = 24,
+ ExtentBitsPos = 27,
ExtentBitsMask = 0x1f,
+ // Alignment power-of-two before extending operand.
+ ExtentAlignPos = 32,
+ ExtentAlignMask = 0x3,
// Valid subtargets
- validSubTargetPos = 29,
+ validSubTargetPos = 34,
validSubTargetMask = 0xf,
// Addressing mode for load/store instructions.
- AddrModePos = 33,
+ AddrModePos = 40,
AddrModeMask = 0x7,
+ // Access size for load/store instructions.
+ MemAccessSizePos = 43,
+ MemAccesSizeMask = 0x7,
- // Access size of memory access instructions (load/store).
- MemAccessSizePos = 36,
- MemAccesSizeMask = 0x7
+ // Branch predicted taken.
+ TakenPos = 47,
+ TakenMask = 0x1,
+
+ // Floating-point instructions.
+ FPPos = 48,
+ FPMask = 0x1
};
// *** The code above must match HexagonInstrFormat*.td *** //
MO_GPREL
};
+ enum class InstParseBits : uint32_t {
+ INST_PARSE_MASK = 0x0000c000,
+ INST_PARSE_PACKET_END = 0x0000c000,
+ INST_PARSE_LOOP_END = 0x00008000,
+ INST_PARSE_NOT_END = 0x00004000,
+ INST_PARSE_DUPLEX = 0x00000000,
+ INST_PARSE_EXTENDER = 0x00000000
+ };
+
} // End namespace HexagonII.
} // End namespace llvm.