Taints relaxed loads to enforce load/store ordering

[oota-llvm.git] / lib / Target / AArch64 / AArch64TargetMachine.cpp

diff --git a/lib/Target/AArch64/AArch64TargetMachine.cpp b/lib/Target/AArch64/AArch64TargetMachine.cpp
index c52c5544fc7e26e787c5fd4e271e58b2aec255b7..b2090ab4ea0aae2d33fea9c4d0265536a7ce81e3 100644 (file)
--- a/lib/Target/AArch64/AArch64TargetMachine.cpp
+++ b/lib/Target/AArch64/AArch64TargetMachine.cpp
@@ -216,6 +216,9 @@ void AArch64PassConfig::addIRPasses() {
   // Always expand atomic operations, we don't deal with atomicrmw or cmpxchg
   // ourselves.
   addPass(createAtomicExpandPass(TM));
+  // XXX-update: Immediate add -licm pass after atomic expand pass to deal with
+  // loop invariants introduced mannually.
+  addPass(createLICMPass());
 
   // Cmpxchg instructions are often used with a subsequent comparison to
   // determine whether it succeeded. We can exploit existing control-flow in