Taints upcoming store and adds bogus conditional branches else where. Now as a separa...

[oota-llvm.git] / lib / CodeGen / CodeGenPrepare.cpp

diff --git a/lib/CodeGen/CodeGenPrepare.cpp b/lib/CodeGen/CodeGenPrepare.cpp
index f4ff3787e630347a89b3737db4ebb16239df75e5..c9d22a298654908fd40fe06d9980fd0ca32b38f6 100644 (file)
--- a/lib/CodeGen/CodeGenPrepare.cpp
+++ b/lib/CodeGen/CodeGenPrepare.cpp
@@ -964,19 +964,20 @@ bool AddFakeConditionalBranchAfterMonotonicLoads(
       }
     }
 
-    // We really need to process the relaxed load now.
+    // We really need to process the relaxed load now. Note that if the next
+    // instruction is a RMW, it will be transformed into a control block, so we
+    // can safely only taint upcoming store instructions.
     StoreInst* SI = nullptr;
     IntrinsicInst* II = nullptr;
     if (FirstInst) {
       SI = dyn_cast<StoreInst>(FirstInst);
       II = dyn_cast<IntrinsicInst>(FirstInst);
     }
-    if (FirstInst &&
-        (SI || (II && II->getIntrinsicID() == Intrinsic::aarch64_stlxr))) {
+    if (FirstInst && SI) {
       // For immediately coming stores, taint the address of the store.
       if (FirstInst->getParent() == LI->getParent() ||
           DT->dominates(LI, FirstInst)) {
-        TaintRelaxedLoads(LI, FirstInst);
+        Changed != taintStoreAddress(SI, LI);
         Changed = true;
       } else {
         auto* Inst =
@@ -985,8 +986,7 @@ bool AddFakeConditionalBranchAfterMonotonicLoads(
           LI->setOrdering(Acquire);
           Changed = true;
         } else {
-          TaintRelaxedLoads(Inst, FirstInst);
-          Changed = true;
+          Changed |= taintStoreAddress(SI, Inst);
         }
       }
     } else {