#ifndef LLVM_TARGET_TARGETMACHINE_H
#define LLVM_TARGET_TARGETMACHINE_H
+#include "llvm/ADT/StringRef.h"
+#include "llvm/ADT/Triple.h"
+#include "llvm/IR/DataLayout.h"
+#include "llvm/Pass.h"
+#include "llvm/Support/CodeGen.h"
+#include "llvm/Target/TargetOptions.h"
#include <cassert>
#include <string>
namespace llvm {
class InstrItineraryData;
-class JITCodeEmitter;
+class GlobalValue;
+class Mangler;
+class MachineFunctionInitializer;
class MCAsmInfo;
+class MCCodeGenInfo;
class MCContext;
-class Pass;
-class PassManager;
-class PassManagerBase;
+class MCInstrInfo;
+class MCRegisterInfo;
+class MCSubtargetInfo;
+class MCSymbol;
class Target;
-class TargetData;
-class TargetELFWriterInfo;
+class DataLayout;
+class TargetLibraryInfo;
class TargetFrameLowering;
-class TargetInstrInfo;
+class TargetIRAnalysis;
class TargetIntrinsicInfo;
-class TargetJITInfo;
class TargetLowering;
+class TargetPassConfig;
class TargetRegisterInfo;
class TargetSelectionDAGInfo;
-class TargetSubtarget;
+class TargetSubtargetInfo;
+class TargetTransformInfo;
class formatted_raw_ostream;
class raw_ostream;
+class raw_pwrite_stream;
+class TargetLoweringObjectFile;
-// Relocation model types.
-namespace Reloc {
- enum Model {
- Default,
- Static,
- PIC_, // Cannot be named PIC due to collision with -DPIC
- DynamicNoPIC
- };
-}
-
-// Code model types.
-namespace CodeModel {
- enum Model {
- Default,
- Small,
- Kernel,
- Medium,
- Large
- };
-}
-
-// Code generation optimization level.
-namespace CodeGenOpt {
- enum Level {
- None, // -O0
- Less, // -O1
- Default, // -O2, -Os
- Aggressive // -O3
- };
-}
-
-namespace Sched {
- enum Preference {
- None, // No preference
- Latency, // Scheduling for shortest total latency.
- RegPressure, // Scheduling for lowest register pressure.
- Hybrid, // Scheduling for both latency and register pressure.
- ILP // Scheduling for ILP in low register pressure mode.
- };
+// The old pass manager infrastructure is hidden in a legacy namespace now.
+namespace legacy {
+class PassManagerBase;
}
+using legacy::PassManagerBase;
//===----------------------------------------------------------------------===//
///
-/// TargetMachine - Primary interface to the complete machine description for
-/// the target machine. All target-specific information should be accessible
-/// through this interface.
+/// Primary interface to the complete machine description for the target
+/// machine. All target-specific information should be accessible through this
+/// interface.
///
class TargetMachine {
- TargetMachine(const TargetMachine &); // DO NOT IMPLEMENT
- void operator=(const TargetMachine &); // DO NOT IMPLEMENT
+ TargetMachine(const TargetMachine &) = delete;
+ void operator=(const TargetMachine &) = delete;
protected: // Can only create subclasses.
- TargetMachine(const Target &);
-
- /// getSubtargetImpl - virtual method implemented by subclasses that returns
- /// a reference to that target's TargetSubtarget-derived member variable.
- virtual const TargetSubtarget *getSubtargetImpl() const { return 0; }
+ TargetMachine(const Target &T, StringRef DataLayoutString,
+ const Triple &TargetTriple, StringRef CPU, StringRef FS,
+ const TargetOptions &Options);
- /// TheTarget - The Target that this machine was created for.
+ /// The Target that this machine was created for.
const Target &TheTarget;
- /// AsmInfo - Contains target specific asm information.
+ /// DataLayout for the target: keep ABI type size and alignment.
///
+ /// The DataLayout is created based on the string representation provided
+ /// during construction. It is kept here only to avoid reparsing the string
+ /// but should not really be used during compilation, because it has an
+ /// internal cache that is context specific.
+ const DataLayout DL;
+
+ /// Triple string, CPU name, and target feature strings the TargetMachine
+ /// instance is created with.
+ Triple TargetTriple;
+ std::string TargetCPU;
+ std::string TargetFS;
+
+ /// Low level target information such as relocation model. Non-const to
+ /// allow resetting optimization level per-function.
+ MCCodeGenInfo *CodeGenInfo;
+
+ /// Contains target specific asm information.
const MCAsmInfo *AsmInfo;
- unsigned MCRelaxAll : 1;
- unsigned MCNoExecStack : 1;
- unsigned MCSaveTempLabels : 1;
- unsigned MCUseLoc : 1;
- unsigned MCUseCFI : 1;
+ const MCRegisterInfo *MRI;
+ const MCInstrInfo *MII;
+ const MCSubtargetInfo *STI;
+
+ unsigned RequireStructuredCFG : 1;
public:
+ mutable TargetOptions Options;
+
virtual ~TargetMachine();
const Target &getTarget() const { return TheTarget; }
- // Interfaces to the major aspects of target machine information:
- // -- Instruction opcode and operand information
- // -- Pipelines and scheduling information
- // -- Stack frame information
- // -- Selection DAG lowering information
- //
- virtual const TargetInstrInfo *getInstrInfo() const { return 0; }
- virtual const TargetFrameLowering *getFrameLowering() const { return 0; }
- virtual const TargetLowering *getTargetLowering() const { return 0; }
- virtual const TargetSelectionDAGInfo *getSelectionDAGInfo() const{ return 0; }
- virtual const TargetData *getTargetData() const { return 0; }
-
- /// getMCAsmInfo - Return target specific asm information.
- ///
- const MCAsmInfo *getMCAsmInfo() const { return AsmInfo; }
+ const Triple &getTargetTriple() const { return TargetTriple; }
+ StringRef getTargetCPU() const { return TargetCPU; }
+ StringRef getTargetFeatureString() const { return TargetFS; }
- /// getSubtarget - This method returns a pointer to the specified type of
- /// TargetSubtarget. In debug builds, it verifies that the object being
- /// returned is of the correct type.
- template<typename STC> const STC &getSubtarget() const {
- return *static_cast<const STC*>(getSubtargetImpl());
+ /// Virtual method implemented by subclasses that returns a reference to that
+ /// target's TargetSubtargetInfo-derived member variable.
+ virtual const TargetSubtargetInfo *getSubtargetImpl(const Function &) const {
+ return nullptr;
+ }
+ virtual TargetLoweringObjectFile *getObjFileLowering() const {
+ return nullptr;
}
- /// getRegisterInfo - If register information is available, return it. If
- /// not, return null. This is kept separate from RegInfo until RegInfo has
- /// details of graph coloring register allocation removed from it.
- ///
- virtual const TargetRegisterInfo *getRegisterInfo() const { return 0; }
-
- /// getIntrinsicInfo - If intrinsic information is available, return it. If
- /// not, return null.
- ///
- virtual const TargetIntrinsicInfo *getIntrinsicInfo() const { return 0; }
+ /// This method returns a pointer to the specified type of
+ /// TargetSubtargetInfo. In debug builds, it verifies that the object being
+ /// returned is of the correct type.
+ template <typename STC> const STC &getSubtarget(const Function &F) const {
+ return *static_cast<const STC*>(getSubtargetImpl(F));
+ }
- /// getJITInfo - If this target supports a JIT, return information for it,
- /// otherwise return null.
- ///
- virtual TargetJITInfo *getJITInfo() { return 0; }
+ /// Create a DataLayout.
+ const DataLayout createDataLayout() const { return DL; }
- /// getInstrItineraryData - Returns instruction itinerary data for the target
- /// or specific subtarget.
+ /// Test if a DataLayout if compatible with the CodeGen for this target.
///
- virtual const InstrItineraryData *getInstrItineraryData() const {
- return 0;
+ /// The LLVM Module owns a DataLayout that is used for the target independent
+ /// optimizations and code generation. This hook provides a target specific
+ /// check on the validity of this DataLayout.
+ bool isCompatibleDataLayout(const DataLayout &Candidate) const {
+ return DL == Candidate;
}
- /// getELFWriterInfo - If this target supports an ELF writer, return
- /// information for it, otherwise return null.
+ /// Get the pointer size for this target.
///
- virtual const TargetELFWriterInfo *getELFWriterInfo() const { return 0; }
+ /// This is the only time the DataLayout in the TargetMachine is used.
+ unsigned getPointerSize() const { return DL.getPointerSize(); }
- /// hasMCRelaxAll - Check whether all machine code instructions should be
- /// relaxed.
- bool hasMCRelaxAll() const { return MCRelaxAll; }
+ /// \brief Reset the target options based on the function's attributes.
+ // FIXME: Remove TargetOptions that affect per-function code generation
+ // from TargetMachine.
+ void resetTargetOptions(const Function &F) const;
- /// setMCRelaxAll - Set whether all machine code instructions should be
- /// relaxed.
- void setMCRelaxAll(bool Value) { MCRelaxAll = Value; }
-
- /// hasMCSaveTempLabels - Check whether temporary labels will be preserved
- /// (i.e., not treated as temporary).
- bool hasMCSaveTempLabels() const { return MCSaveTempLabels; }
-
- /// setMCSaveTempLabels - Set whether temporary labels will be preserved
- /// (i.e., not treated as temporary).
- void setMCSaveTempLabels(bool Value) { MCSaveTempLabels = Value; }
+ /// Return target specific asm information.
+ const MCAsmInfo *getMCAsmInfo() const { return AsmInfo; }
- /// hasMCNoExecStack - Check whether an executable stack is not needed.
- bool hasMCNoExecStack() const { return MCNoExecStack; }
+ const MCRegisterInfo *getMCRegisterInfo() const { return MRI; }
+ const MCInstrInfo *getMCInstrInfo() const { return MII; }
+ const MCSubtargetInfo *getMCSubtargetInfo() const { return STI; }
- /// setMCNoExecStack - Set whether an executabel stack is not needed.
- void setMCNoExecStack(bool Value) { MCNoExecStack = Value; }
+ /// If intrinsic information is available, return it. If not, return null.
+ virtual const TargetIntrinsicInfo *getIntrinsicInfo() const {
+ return nullptr;
+ }
- /// hasMCUseLoc - Check whether we should use dwarf's .loc directive.
- bool hasMCUseLoc() const { return MCUseLoc; }
+ bool requiresStructuredCFG() const { return RequireStructuredCFG; }
+ void setRequiresStructuredCFG(bool Value) { RequireStructuredCFG = Value; }
- /// setMCUseLoc - Set whether all we should use dwarf's .loc directive.
- void setMCUseLoc(bool Value) { MCUseLoc = Value; }
+ /// Returns the code generation relocation model. The choices are static, PIC,
+ /// and dynamic-no-pic, and target default.
+ Reloc::Model getRelocationModel() const;
- /// hasMCUseCFI - Check whether we should use dwarf's .cfi_* directives.
- bool hasMCUseCFI() const { return MCUseCFI; }
+ /// Returns the code model. The choices are small, kernel, medium, large, and
+ /// target default.
+ CodeModel::Model getCodeModel() const;
- /// setMCUseCFI - Set whether all we should use dwarf's .cfi_* directives.
- void setMCUseCFI(bool Value) { MCUseCFI = Value; }
+ /// Returns the TLS model which should be used for the given global variable.
+ TLSModel::Model getTLSModel(const GlobalValue *GV) const;
- /// getRelocationModel - Returns the code generation relocation model. The
- /// choices are static, PIC, and dynamic-no-pic, and target default.
- static Reloc::Model getRelocationModel();
+ /// Returns the optimization level: None, Less, Default, or Aggressive.
+ CodeGenOpt::Level getOptLevel() const;
- /// setRelocationModel - Sets the code generation relocation model.
- ///
- static void setRelocationModel(Reloc::Model Model);
+ /// \brief Overrides the optimization level.
+ void setOptLevel(CodeGenOpt::Level Level) const;
- /// getCodeModel - Returns the code model. The choices are small, kernel,
- /// medium, large, and target default.
- static CodeModel::Model getCodeModel();
+ void setFastISel(bool Enable) { Options.EnableFastISel = Enable; }
- /// setCodeModel - Sets the code model.
- ///
- static void setCodeModel(CodeModel::Model Model);
+ bool shouldPrintMachineCode() const { return Options.PrintMachineCode; }
- /// getAsmVerbosityDefault - Returns the default value of asm verbosity.
+ /// Returns the default value of asm verbosity.
///
- static bool getAsmVerbosityDefault();
-
- /// setAsmVerbosityDefault - Set the default value of asm verbosity. Default
- /// is false.
- static void setAsmVerbosityDefault(bool);
-
- /// getDataSections - Return true if data objects should be emitted into their
- /// own section, corresponds to -fdata-sections.
- static bool getDataSections();
+ bool getAsmVerbosityDefault() const {
+ return Options.MCOptions.AsmVerbose;
+ }
- /// getFunctionSections - Return true if functions should be emitted into
- /// their own section, corresponding to -ffunction-sections.
- static bool getFunctionSections();
+ bool getUniqueSectionNames() const { return Options.UniqueSectionNames; }
- /// setDataSections - Set if the data are emit into separate sections.
- static void setDataSections(bool);
+ /// Return true if data objects should be emitted into their own section,
+ /// corresponds to -fdata-sections.
+ bool getDataSections() const {
+ return Options.DataSections;
+ }
- /// setFunctionSections - Set if the functions are emit into separate
- /// sections.
- static void setFunctionSections(bool);
+ /// Return true if functions should be emitted into their own section,
+ /// corresponding to -ffunction-sections.
+ bool getFunctionSections() const {
+ return Options.FunctionSections;
+ }
- /// CodeGenFileType - These enums are meant to be passed into
- /// addPassesToEmitFile to indicate what type of file to emit, and returned by
- /// it to indicate what type of file could actually be made.
+ /// \brief Get a \c TargetIRAnalysis appropriate for the target.
+ ///
+ /// This is used to construct the new pass manager's target IR analysis pass,
+ /// set up appropriately for this target machine. Even the old pass manager
+ /// uses this to answer queries about the IR.
+ virtual TargetIRAnalysis getTargetIRAnalysis();
+
+ /// These enums are meant to be passed into addPassesToEmitFile to indicate
+ /// what type of file to emit, and returned by it to indicate what type of
+ /// file could actually be made.
enum CodeGenFileType {
CGFT_AssemblyFile,
CGFT_ObjectFile,
CGFT_Null // Do not emit any output.
};
- /// getEnableTailMergeDefault - the default setting for -enable-tail-merge
- /// on this target. User flag overrides.
- virtual bool getEnableTailMergeDefault() const { return true; }
-
- /// addPassesToEmitFile - Add passes to the specified pass manager to get the
- /// specified file emitted. Typically this will involve several steps of code
- /// generation. This method should return true if emission of this file type
- /// is not supported, or false on success.
- virtual bool addPassesToEmitFile(PassManagerBase &,
- formatted_raw_ostream &,
- CodeGenFileType,
- CodeGenOpt::Level,
- bool = true) {
+ /// Add passes to the specified pass manager to get the specified file
+ /// emitted. Typically this will involve several steps of code generation.
+ /// This method should return true if emission of this file type is not
+ /// supported, or false on success.
+ virtual bool addPassesToEmitFile(
+ PassManagerBase &, raw_pwrite_stream &, CodeGenFileType,
+ bool /*DisableVerify*/ = true, AnalysisID /*StartBefore*/ = nullptr,
+ AnalysisID /*StartAfter*/ = nullptr, AnalysisID /*StopAfter*/ = nullptr,
+ MachineFunctionInitializer * /*MFInitializer*/ = nullptr) {
return true;
}
- /// addPassesToEmitMachineCode - Add passes to the specified pass manager to
- /// get machine code emitted. This uses a JITCodeEmitter object to handle
- /// actually outputting the machine code and resolving things like the address
- /// of functions. This method returns true if machine code emission is
- /// not supported.
+ /// Add passes to the specified pass manager to get machine code emitted with
+ /// the MCJIT. This method returns true if machine code is not supported. It
+ /// fills the MCContext Ctx pointer which can be used to build custom
+ /// MCStreamer.
///
- virtual bool addPassesToEmitMachineCode(PassManagerBase &,
- JITCodeEmitter &,
- CodeGenOpt::Level,
- bool = true) {
+ virtual bool addPassesToEmitMC(PassManagerBase &, MCContext *&,
+ raw_pwrite_stream &,
+ bool /*DisableVerify*/ = true) {
return true;
}
- /// addPassesToEmitMC - Add passes to the specified pass manager to get
- /// machine code emitted with the MCJIT. This method returns true if machine
- /// code is not supported. It fills the MCContext Ctx pointer which can be
- /// used to build custom MCStreamer.
- ///
- virtual bool addPassesToEmitMC(PassManagerBase &,
- MCContext *&,
- raw_ostream &,
- CodeGenOpt::Level,
- bool = true) {
- return true;
- }
+ void getNameWithPrefix(SmallVectorImpl<char> &Name, const GlobalValue *GV,
+ Mangler &Mang, bool MayAlwaysUsePrivate = false) const;
+ MCSymbol *getSymbol(const GlobalValue *GV, Mangler &Mang) const;
};
-/// LLVMTargetMachine - This class describes a target machine that is
-/// implemented with the LLVM target-independent code generator.
+/// This class describes a target machine that is implemented with the LLVM
+/// target-independent code generator.
///
class LLVMTargetMachine : public TargetMachine {
- std::string TargetTriple;
-
protected: // Can only create subclasses.
- LLVMTargetMachine(const Target &T, const std::string &TargetTriple);
-
-private:
- /// addCommonCodeGenPasses - Add standard LLVM codegen passes used for
- /// both emitting to assembly files or machine code output.
- ///
- bool addCommonCodeGenPasses(PassManagerBase &, CodeGenOpt::Level,
- bool DisableVerify, MCContext *&OutCtx);
-
- virtual void setCodeModelForJIT();
- virtual void setCodeModelForStatic();
+ LLVMTargetMachine(const Target &T, StringRef DataLayoutString,
+ const Triple &TargetTriple, StringRef CPU, StringRef FS,
+ TargetOptions Options, Reloc::Model RM, CodeModel::Model CM,
+ CodeGenOpt::Level OL);
+ void initAsmInfo();
public:
-
- const std::string &getTargetTriple() const { return TargetTriple; }
-
- /// addPassesToEmitFile - Add passes to the specified pass manager to get the
- /// specified file emitted. Typically this will involve several steps of code
- /// generation. If OptLevel is None, the code generator should emit code as
- /// fast as possible, though the generated code may be less efficient.
- virtual bool addPassesToEmitFile(PassManagerBase &PM,
- formatted_raw_ostream &Out,
- CodeGenFileType FileType,
- CodeGenOpt::Level,
- bool DisableVerify = true);
-
- /// addPassesToEmitMachineCode - Add passes to the specified pass manager to
- /// get machine code emitted. This uses a JITCodeEmitter object to handle
- /// actually outputting the machine code and resolving things like the address
- /// of functions. This method returns true if machine code emission is
- /// not supported.
- ///
- virtual bool addPassesToEmitMachineCode(PassManagerBase &PM,
- JITCodeEmitter &MCE,
- CodeGenOpt::Level,
- bool DisableVerify = true);
-
- /// addPassesToEmitMC - Add passes to the specified pass manager to get
- /// machine code emitted with the MCJIT. This method returns true if machine
- /// code is not supported. It fills the MCContext Ctx pointer which can be
- /// used to build custom MCStreamer.
+ /// \brief Get a TargetIRAnalysis implementation for the target.
///
- virtual bool addPassesToEmitMC(PassManagerBase &PM,
- MCContext *&Ctx,
- raw_ostream &OS,
- CodeGenOpt::Level OptLevel,
- bool DisableVerify = true);
-
- /// Target-Independent Code Generator Pass Configuration Options.
-
- /// addPreISelPasses - This method should add any "last minute" LLVM->LLVM
- /// passes (which are run just before instruction selector).
- virtual bool addPreISel(PassManagerBase &, CodeGenOpt::Level) {
- return true;
- }
-
- /// addInstSelector - This method should install an instruction selector pass,
- /// which converts from LLVM code to machine instructions.
- virtual bool addInstSelector(PassManagerBase &, CodeGenOpt::Level) {
- return true;
- }
-
- /// addPreRegAlloc - This method may be implemented by targets that want to
- /// run passes immediately before register allocation. This should return
- /// true if -print-machineinstrs should print after these passes.
- virtual bool addPreRegAlloc(PassManagerBase &, CodeGenOpt::Level) {
- return false;
- }
-
- /// addPostRegAlloc - This method may be implemented by targets that want
- /// to run passes after register allocation but before prolog-epilog
- /// insertion. This should return true if -print-machineinstrs should print
- /// after these passes.
- virtual bool addPostRegAlloc(PassManagerBase &, CodeGenOpt::Level) {
- return false;
- }
-
- /// addPreSched2 - This method may be implemented by targets that want to
- /// run passes after prolog-epilog insertion and before the second instruction
- /// scheduling pass. This should return true if -print-machineinstrs should
- /// print after these passes.
- virtual bool addPreSched2(PassManagerBase &, CodeGenOpt::Level) {
- return false;
- }
-
- /// addPreEmitPass - This pass may be implemented by targets that want to run
- /// passes immediately before machine code is emitted. This should return
- /// true if -print-machineinstrs should print out the code after the passes.
- virtual bool addPreEmitPass(PassManagerBase &, CodeGenOpt::Level) {
- return false;
- }
-
-
- /// addCodeEmitter - This pass should be overridden by the target to add a
- /// code emitter, if supported. If this is not supported, 'true' should be
- /// returned.
- virtual bool addCodeEmitter(PassManagerBase &, CodeGenOpt::Level,
- JITCodeEmitter &) {
- return true;
- }
-
- /// getEnableTailMergeDefault - the default setting for -enable-tail-merge
- /// on this target. User flag overrides.
- virtual bool getEnableTailMergeDefault() const { return true; }
+ /// This analysis will produce a TTI result which uses the common code
+ /// generator to answer queries about the IR.
+ TargetIRAnalysis getTargetIRAnalysis() override;
+
+ /// Create a pass configuration object to be used by addPassToEmitX methods
+ /// for generating a pipeline of CodeGen passes.
+ virtual TargetPassConfig *createPassConfig(PassManagerBase &PM);
+
+ /// Add passes to the specified pass manager to get the specified file
+ /// emitted. Typically this will involve several steps of code generation.
+ bool addPassesToEmitFile(
+ PassManagerBase &PM, raw_pwrite_stream &Out, CodeGenFileType FileType,
+ bool DisableVerify = true, AnalysisID StartBefore = nullptr,
+ AnalysisID StartAfter = nullptr, AnalysisID StopAfter = nullptr,
+ MachineFunctionInitializer *MFInitializer = nullptr) override;
+
+ /// Add passes to the specified pass manager to get machine code emitted with
+ /// the MCJIT. This method returns true if machine code is not supported. It
+ /// fills the MCContext Ctx pointer which can be used to build custom
+ /// MCStreamer.
+ bool addPassesToEmitMC(PassManagerBase &PM, MCContext *&Ctx,
+ raw_pwrite_stream &OS,
+ bool DisableVerify = true) override;
};
} // End llvm namespace
projects / oota-llvm.git / blobdiff