namespace llvm {
class InstrItineraryData;
-class JITCodeEmitter;
class GlobalValue;
+class Mangler;
class MCAsmInfo;
class MCCodeGenInfo;
class MCContext;
-class PassManagerBase;
+class MCSymbol;
class Target;
class DataLayout;
+class TargetLibraryInfo;
class TargetFrameLowering;
-class TargetInstrInfo;
class TargetIntrinsicInfo;
-class TargetJITInfo;
class TargetLowering;
class TargetPassConfig;
class TargetRegisterInfo;
class formatted_raw_ostream;
class raw_ostream;
+// The old pass manager infrastructure is hidden in a legacy namespace now.
+namespace legacy {
+class PassManagerBase;
+}
+using legacy::PassManagerBase;
+
//===----------------------------------------------------------------------===//
///
/// TargetMachine - Primary interface to the complete machine description for
std::string TargetFS;
/// CodeGenInfo - Low level target information such as relocation model.
- const MCCodeGenInfo *CodeGenInfo;
+ /// Non-const to allow resetting optimization level per-function.
+ MCCodeGenInfo *CodeGenInfo;
/// AsmInfo - Contains target specific asm information.
///
const MCAsmInfo *AsmInfo;
- unsigned MCRelaxAll : 1;
- unsigned MCNoExecStack : 1;
- unsigned MCSaveTempLabels : 1;
- unsigned MCUseLoc : 1;
- unsigned MCUseCFI : 1;
- unsigned MCUseDwarfDirectory : 1;
+ unsigned RequireStructuredCFG : 1;
public:
+ mutable TargetOptions Options;
+
virtual ~TargetMachine();
const Target &getTarget() const { return TheTarget; }
- const StringRef getTargetTriple() const { return TargetTriple; }
- const StringRef getTargetCPU() const { return TargetCPU; }
- const StringRef getTargetFeatureString() const { return TargetFS; }
+ StringRef getTargetTriple() const { return TargetTriple; }
+ StringRef getTargetCPU() const { return TargetCPU; }
+ StringRef getTargetFeatureString() const { return TargetFS; }
/// getSubtargetImpl - virtual method implemented by subclasses that returns
/// a reference to that target's TargetSubtargetInfo-derived member variable.
- virtual const TargetSubtargetInfo *getSubtargetImpl() const { return 0; }
-
- TargetOptions Options;
-
- // Interfaces to the major aspects of target machine information:
- // -- Instruction opcode and operand information
- // -- Pipelines and scheduling information
- // -- Stack frame information
- // -- Selection DAG lowering information
- //
- virtual const TargetInstrInfo *getInstrInfo() const { return 0; }
- virtual const TargetFrameLowering *getFrameLowering() const { return 0; }
- virtual const TargetLowering *getTargetLowering() const { return 0; }
- virtual const TargetSelectionDAGInfo *getSelectionDAGInfo() const{ return 0; }
- virtual const DataLayout *getDataLayout() const { return 0; }
-
- /// getMCAsmInfo - Return target specific asm information.
- ///
- const MCAsmInfo *getMCAsmInfo() const { return AsmInfo; }
+ virtual const TargetSubtargetInfo *getSubtargetImpl() const {
+ return nullptr;
+ }
+ virtual const TargetSubtargetInfo *getSubtargetImpl(const Function *) const {
+ return getSubtargetImpl();
+ }
/// getSubtarget - This method returns a pointer to the specified type of
/// TargetSubtargetInfo. In debug builds, it verifies that the object being
template<typename STC> const STC &getSubtarget() const {
return *static_cast<const STC*>(getSubtargetImpl());
}
+ template <typename STC> const STC &getSubtarget(const Function *) const {
+ return *static_cast<const STC*>(getSubtargetImpl());
+ }
+
+ /// \brief Reset the target options based on the function's attributes.
+ // FIXME: Remove TargetOptions that affect per-function code generation
+ // from TargetMachine.
+ void resetTargetOptions(const Function &F) const;
- /// getRegisterInfo - If register information is available, return it. If
- /// not, return null. This is kept separate from RegInfo until RegInfo has
- /// details of graph coloring register allocation removed from it.
+ /// getMCAsmInfo - Return target specific asm information.
///
- virtual const TargetRegisterInfo *getRegisterInfo() const { return 0; }
+ const MCAsmInfo *getMCAsmInfo() const { return AsmInfo; }
/// getIntrinsicInfo - If intrinsic information is available, return it. If
/// not, return null.
///
- virtual const TargetIntrinsicInfo *getIntrinsicInfo() const { return 0; }
-
- /// getJITInfo - If this target supports a JIT, return information for it,
- /// otherwise return null.
- ///
- virtual TargetJITInfo *getJITInfo() { return 0; }
-
- /// getInstrItineraryData - Returns instruction itinerary data for the target
- /// or specific subtarget.
- ///
- virtual const InstrItineraryData *getInstrItineraryData() const {
- return 0;
+ virtual const TargetIntrinsicInfo *getIntrinsicInfo() const {
+ return nullptr;
}
- /// hasMCRelaxAll - Check whether all machine code instructions should be
- /// relaxed.
- bool hasMCRelaxAll() const { return MCRelaxAll; }
-
- /// setMCRelaxAll - Set whether all machine code instructions should be
- /// relaxed.
- void setMCRelaxAll(bool Value) { MCRelaxAll = Value; }
-
- /// hasMCSaveTempLabels - Check whether temporary labels will be preserved
- /// (i.e., not treated as temporary).
- bool hasMCSaveTempLabels() const { return MCSaveTempLabels; }
-
- /// setMCSaveTempLabels - Set whether temporary labels will be preserved
- /// (i.e., not treated as temporary).
- void setMCSaveTempLabels(bool Value) { MCSaveTempLabels = Value; }
-
- /// hasMCNoExecStack - Check whether an executable stack is not needed.
- bool hasMCNoExecStack() const { return MCNoExecStack; }
-
- /// setMCNoExecStack - Set whether an executabel stack is not needed.
- void setMCNoExecStack(bool Value) { MCNoExecStack = Value; }
-
- /// hasMCUseLoc - Check whether we should use dwarf's .loc directive.
- bool hasMCUseLoc() const { return MCUseLoc; }
-
- /// setMCUseLoc - Set whether all we should use dwarf's .loc directive.
- void setMCUseLoc(bool Value) { MCUseLoc = Value; }
-
- /// hasMCUseCFI - Check whether we should use dwarf's .cfi_* directives.
- bool hasMCUseCFI() const { return MCUseCFI; }
-
- /// setMCUseCFI - Set whether all we should use dwarf's .cfi_* directives.
- void setMCUseCFI(bool Value) { MCUseCFI = Value; }
-
- /// hasMCUseDwarfDirectory - Check whether we should use .file directives with
- /// explicit directories.
- bool hasMCUseDwarfDirectory() const { return MCUseDwarfDirectory; }
-
- /// setMCUseDwarfDirectory - Set whether all we should use .file directives
- /// with explicit directories.
- void setMCUseDwarfDirectory(bool Value) { MCUseDwarfDirectory = Value; }
+ bool requiresStructuredCFG() const { return RequireStructuredCFG; }
+ void setRequiresStructuredCFG(bool Value) { RequireStructuredCFG = Value; }
/// getRelocationModel - Returns the code generation relocation model. The
/// choices are static, PIC, and dynamic-no-pic, and target default.
/// Default, or Aggressive.
CodeGenOpt::Level getOptLevel() const;
+ /// \brief Overrides the optimization level.
+ void setOptLevel(CodeGenOpt::Level Level) const;
+
void setFastISel(bool Enable) { Options.EnableFastISel = Enable; }
bool shouldPrintMachineCode() const { return Options.PrintMachineCode; }
/// getAsmVerbosityDefault - Returns the default value of asm verbosity.
///
- static bool getAsmVerbosityDefault();
+ bool getAsmVerbosityDefault() const ;
/// setAsmVerbosityDefault - Set the default value of asm verbosity. Default
/// is false.
- static void setAsmVerbosityDefault(bool);
+ void setAsmVerbosityDefault(bool);
/// getDataSections - Return true if data objects should be emitted into their
/// own section, corresponds to -fdata-sections.
- static bool getDataSections();
+ bool getDataSections() const;
/// getFunctionSections - Return true if functions should be emitted into
/// their own section, corresponding to -ffunction-sections.
- static bool getFunctionSections();
+ bool getFunctionSections() const;
/// setDataSections - Set if the data are emit into separate sections.
- static void setDataSections(bool);
+ void setDataSections(bool);
/// setFunctionSections - Set if the functions are emit into separate
/// sections.
- static void setFunctionSections(bool);
+ void setFunctionSections(bool);
/// \brief Register analysis passes for this target with a pass manager.
virtual void addAnalysisPasses(PassManagerBase &) {}
formatted_raw_ostream &,
CodeGenFileType,
bool /*DisableVerify*/ = true,
- AnalysisID StartAfter = 0,
- AnalysisID StopAfter = 0) {
- return true;
- }
-
- /// addPassesToEmitMachineCode - Add passes to the specified pass manager to
- /// get machine code emitted. This uses a JITCodeEmitter object to handle
- /// actually outputting the machine code and resolving things like the address
- /// of functions. This method returns true if machine code emission is
- /// not supported.
- ///
- virtual bool addPassesToEmitMachineCode(PassManagerBase &,
- JITCodeEmitter &,
- bool /*DisableVerify*/ = true) {
+ AnalysisID /*StartAfter*/ = nullptr,
+ AnalysisID /*StopAfter*/ = nullptr) {
return true;
}
bool /*DisableVerify*/ = true) {
return true;
}
+
+ void getNameWithPrefix(SmallVectorImpl<char> &Name, const GlobalValue *GV,
+ Mangler &Mang, bool MayAlwaysUsePrivate = false) const;
+ MCSymbol *getSymbol(const GlobalValue *GV, Mangler &Mang) const;
};
/// LLVMTargetMachine - This class describes a target machine that is
Reloc::Model RM, CodeModel::Model CM,
CodeGenOpt::Level OL);
+ void initAsmInfo();
public:
/// \brief Register analysis passes for this target with a pass manager.
///
/// This registers target independent analysis passes.
- virtual void addAnalysisPasses(PassManagerBase &PM);
+ void addAnalysisPasses(PassManagerBase &PM) override;
/// createPassConfig - Create a pass configuration object to be used by
/// addPassToEmitX methods for generating a pipeline of CodeGen passes.
/// addPassesToEmitFile - Add passes to the specified pass manager to get the
/// specified file emitted. Typically this will involve several steps of code
/// generation.
- virtual bool addPassesToEmitFile(PassManagerBase &PM,
- formatted_raw_ostream &Out,
- CodeGenFileType FileType,
- bool DisableVerify = true,
- AnalysisID StartAfter = 0,
- AnalysisID StopAfter = 0);
-
- /// addPassesToEmitMachineCode - Add passes to the specified pass manager to
- /// get machine code emitted. This uses a JITCodeEmitter object to handle
- /// actually outputting the machine code and resolving things like the address
- /// of functions. This method returns true if machine code emission is
- /// not supported.
- ///
- virtual bool addPassesToEmitMachineCode(PassManagerBase &PM,
- JITCodeEmitter &MCE,
- bool DisableVerify = true);
+ bool addPassesToEmitFile(PassManagerBase &PM, formatted_raw_ostream &Out,
+ CodeGenFileType FileType, bool DisableVerify = true,
+ AnalysisID StartAfter = nullptr,
+ AnalysisID StopAfter = nullptr) override;
/// addPassesToEmitMC - Add passes to the specified pass manager to get
/// machine code emitted with the MCJIT. This method returns true if machine
/// code is not supported. It fills the MCContext Ctx pointer which can be
/// used to build custom MCStreamer.
///
- virtual bool addPassesToEmitMC(PassManagerBase &PM,
- MCContext *&Ctx,
- raw_ostream &OS,
- bool DisableVerify = true);
-
- /// addCodeEmitter - This pass should be overridden by the target to add a
- /// code emitter, if supported. If this is not supported, 'true' should be
- /// returned.
- virtual bool addCodeEmitter(PassManagerBase &,
- JITCodeEmitter &) {
- return true;
- }
+ bool addPassesToEmitMC(PassManagerBase &PM, MCContext *&Ctx,
+ raw_ostream &OS, bool DisableVerify = true) override;
};
} // End llvm namespace
projects / oota-llvm.git / blobdiff