======================
-LLVM 3.6 Release Notes
+LLVM 3.8 Release Notes
======================
.. contents::
:local:
-.. warning::
- These are in-progress notes for the upcoming LLVM 3.6 release. You may
- prefer the `LLVM 3.5 Release Notes <http://llvm.org/releases/3.5.0/docs
- /ReleaseNotes.html>`_.
-
Introduction
============
This document contains the release notes for the LLVM Compiler Infrastructure,
-release 3.6. Here we describe the status of LLVM, including major improvements
+release 3.8. Here we describe the status of LLVM, including major improvements
from the previous release, improvements in various subprojects of LLVM, and
some of the current users of the code. All LLVM releases may be downloaded
from the `LLVM releases web site <http://llvm.org/releases/>`_.
For more information about LLVM, including information about the latest
release, please check out the `main LLVM web site <http://llvm.org/>`_. If you
have questions or comments, the `LLVM Developer's Mailing List
-<http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev>`_ is a good place to send
+<http://lists.llvm.org/mailman/listinfo/llvm-dev>`_ is a good place to send
them.
-Note that if you are reading this file from a Subversion checkout or the main
-LLVM web page, this document applies to the *next* release, not the current
-one. To see the release notes for a specific release, please see the `releases
-page <http://llvm.org/releases/>`_.
-
Non-comprehensive list of changes in this release
=================================================
+* With this release, the minimum Windows version required for running LLVM is
+ Windows 7. Earlier versions, including Windows Vista and XP are no longer
+ supported.
-.. NOTE
- For small 1-3 sentence descriptions, just add an entry at the end of
- this list. If your description won't fit comfortably in one bullet
- point (e.g. maybe you would like to give an example of the
- functionality, or simply have a lot to talk about), see the `NOTE` below
- for adding a new subsection.
+* With this release, the autoconf build system is deprecated. It will be removed
+ in the 3.9 release. Please migrate to using CMake. For more information see:
+ `Building LLVM with CMake <CMake.html>`_
-* Support for AuroraUX has been removed.
+* The C API function LLVMLinkModules is deprecated. It will be removed in the
+ 3.9 release. Please migrate to LLVMLinkModules2. Unlike the old function the
+ new one
-* Added support for a `native object file-based bitcode wrapper format
- <BitCodeFormat.html#native-object-file>`_.
+ * Doesn't take an unused parameter.
+ * Destroys the source instead of only damaging it.
+ * Does not record a message. Use the diagnostic handler instead.
-* ... next change ...
+* The C API functions LLVMParseBitcode, LLVMParseBitcodeInContext,
+ LLVMGetBitcodeModuleInContext and LLVMGetBitcodeModule have been deprecated.
+ They will be removed in 3.9. Please migrate to the versions with a 2 suffix.
+ Unlike the old ones the new ones do not record a diagnostic message. Use
+ the diagnostic handler instead.
-.. NOTE
- If you would like to document a larger change, then you can add a
- subsection about it right here. You can copy the following boilerplate
- and un-indent it (the indentation causes it to be inside this comment).
+* The deprecated C APIs LLVMGetBitcodeModuleProviderInContext and
+ LLVMGetBitcodeModuleProvider have been removed.
- Special New Feature
- -------------------
-
- Makes programs 10x faster by doing Special New Thing.
+* The deprecated C APIs LLVMCreateExecutionEngine, LLVMCreateInterpreter,
+ LLVMCreateJITCompiler, LLVMAddModuleProvider and LLVMRemoveModuleProvider
+ have been removed.
-Prefix data rework
-------------------
+* With this release, the C API headers have been reorganized to improve build
+ time. Type specific declarations have been moved to Type.h, and error
+ handling routines have been moved to ErrorHandling.h. Both are included in
+ Core.h so nothing should change for projects directly including the headers,
+ but transitive dependencies may be affected.
-The semantics of the ``prefix`` attribute have been changed. Users
-that want the previous ``prefix`` semantics should instead use
-``prologue``. To motivate this change, let's examine the primary
-usecases that these attributes aim to serve,
+* llvm-ar now suports thin archives.
- 1. Code sanitization metadata (e.g. Clang's undefined behavior
- sanitizer)
+* llvm doesn't produce .data.rel.ro.local or .data.rel sections anymore.
- 2. Function hot-patching: Enable the user to insert ``nop`` operations
- at the beginning of the function which can later be safely replaced
- with a call to some instrumentation facility.
+* aliases to available_externally globals are now rejected by the verifier.
- 3. Language runtime metadata: Allow a compiler to insert data for
- use by the runtime during execution. GHC is one example of a
- compiler that needs this functionality for its
- tables-next-to-code functionality.
+* the IR Linker has been split into IRMover that moves bits from one module to
+ another and Linker proper that decides what to link.
-Previously ``prefix`` served cases (1) and (2) quite well by allowing the user
-to introduce arbitrary data at the entrypoint but before the function
-body. Case (3), however, was poorly handled by this approach as it
-required that prefix data was valid executable code.
+* Support for dematerializing has been dropped.
-In this release the concept of prefix data has been redefined to be
-data which occurs immediately before the function entrypoint (i.e. the
-symbol address). Since prefix data now occurs before the function
-entrypoint, there is no need for the data to be valid code.
+* RegisterScheduler::setDefault was removed. Targets that used to call into the
+ command line parser to set the DAGScheduler, and that don't have enough
+ control with setSchedulingPreference, should look into overriding the
+ SubTargetHook "getDAGScheduler()".
-The previous notion of prefix data now goes under the name "prologue
-data" to emphasize its duality with the function epilogue.
+* ``ilist_iterator<T>`` no longer has implicit conversions to and from ``T*``,
+ since ``ilist_iterator<T>`` may be pointing at the sentinel (which is usually
+ not of type ``T`` at all). To convert from an iterator ``I`` to a pointer,
+ use ``&*I``; to convert from a pointer ``P`` to an iterator, use
+ ``P->getIterator()``. Alternatively, explicit conversions via
+ ``static_cast<T>(U)`` are still available.
-The intention here is to handle cases (1) and (2) with prologue data and
-case (3) with prefix data. See the language reference for further details
-on the semantics of these attributes.
+* ``ilist_node<T>::getNextNode()`` and ``ilist_node<T>::getPrevNode()`` now
+ fail at compile time when the node cannot access its parent list.
+ Previously, when the sentinel was was an ``ilist_half_node<T>``, this API
+ could return the sentinal instead of ``nullptr``. Frustrated callers should
+ be updated to use ``iplist<T>::getNextNode(T*)`` instead. Alternatively, if
+ the node ``N`` is guaranteed not to be the last in the list, it is safe to
+ call ``&*++N->getIterator()`` directly.
-This refactoring arose out of discussions_ with Reid Kleckner in
-response to a proposal to introduce the notion of symbol offsets to
-enable handling of case (3).
+* The `Kaleidoscope tutorials <tutorial/index.html>`_ have been updated to use
+ the ORC JIT APIs.
-.. _discussions: http://lists.cs.uiuc.edu/pipermail/llvmdev/2014-May/073235.html
+* ORC now has a basic set of C bindings.
+* Optional support for linking clang and the LLVM tools with a single libLLVM
+ shared library. To enable this, pass ``-DLLVM_LINK_LLVM_DYLIB=ON`` to CMake.
+ See `Building LLVM with CMake`_ for more details.
-Changes to the ARM Backend
---------------------------
+.. NOTE
+ For small 1-3 sentence descriptions, just add an entry at the end of
+ this list. If your description won't fit comfortably in one bullet
+ point (e.g. maybe you would like to give an example of the
+ functionality, or simply have a lot to talk about), see the `NOTE` below
+ for adding a new subsection.
- During this release ...
+* ... next change ...
+.. NOTE
+ If you would like to document a larger change, then you can add a
+ subsection about it right here. You can copy the following boilerplate
+ and un-indent it (the indentation causes it to be inside this comment).
-Changes to the MIPS Target
---------------------------
+ Special New Feature
+ -------------------
-During this release the MIPS target has reached a few major milestones. It has
-gained support for MIPS-II and MIPS-III, become ABI-compatible with GCC for big
-and little endian O32, N32, and N64, and it is now able to compile the Linux
-kernel for 32-bit targets.
+ Makes programs 10x faster by doing Special New Thing.
-ABI
-^^^
-A large number of bugs have been fixed for big-endian MIPS targets using the
-N32 and N64 ABI's as well as a small number of bugs affecting other ABI's.
-Please note that some of these bugs will still affect LLVM-IR generated by
-LLVM 3.5 since correct code generation depends on appropriate usage of the
-``inreg``, ``signext``, and ``zeroext`` attributes on all function arguments
-and returns.
+Changes to the ARM Backends
+---------------------------
-There are far too many corrections to provide a complete list but here are a
-few notable ones:
+During this release the AArch64 target has:
-* Big-endian N32 and N64 now interlinks successfully with GCC compiled code.
- Previously this didn't work for the majority of cases.
+* Added support for more sanitizers (MSAN, TSAN) and made them compatible with
+ all VMA kernel configurations (currently tested on 39 and 42 bits).
+* Gained initial LLD support in the new ELF back-end
+* Extended the Load/Store optimiser and cleaned up some of the bad decisions
+ made earlier.
+* Expanded LLDB support, including watchpoints, native building, Renderscript,
+ LLDB-server, debugging 32-bit applications.
+* Added support for the ``Exynos M1`` chip.
-* The registers used to return a structure containing a single 128-bit floating
- point member on the N32/N64 ABI's have been changed from those specified by
- the ABI documentation to match those used by GCC. The documentation specifies
- that ``$f0`` and ``$f2`` should be used but GCC has used ``$f0`` and ``$f1``
- for many years.
+During this release the ARM target has:
-* Returning a zero-byte struct no longer causes arguments to be read from the
- wrong registers when using the O32 ABI.
+* Gained massive performance improvements on embedded benchmarks due to finally
+ running the stride vectorizer in full form, incrementing the performance gains
+ that we already had in the previous releases with limited stride vectorization.
+* Expanded LLDB support, including watchpoints, unwind tables
+* Extended the Load/Store optimiser and cleaned up some of the bad decisions
+ made earlier.
+* Simplified code generation for global variable addresses in ELF, resulting in
+ a significant (4% in Chromium) reduction in code size.
+* Gained some additional code size improvements, though there's still a long road
+ ahead, especially for older cores.
+* Added some EABI floating point comparison functions to Compiler-RT
+* Added support for Windows+GNU triple, +features in -mcpu/-march options.
-* The exception personality has been changed for 64-bit MIPS targets to
- eliminate warnings about relocations in a read-only section.
-* Incorrect usage of odd-numbered single-precision floating point registers
- has been fixed when the fastcc calling convention is used with 64-bit FPU's
- and -mno-odd-spreg.
+Changes to the MIPS Target
+--------------------------
-LLVMLinux
-^^^^^^^^^
+During this release the MIPS target has:
+
+* Significantly extended support for the Integrated Assembler. See below for
+ more information
+* Added support for the ``P5600`` processor.
+* Added support for the ``interrupt`` attribute for MIPS32R2 and later. This
+ attribute will generate a function which can be used as a interrupt handler
+ on bare metal MIPS targets using the static relocation model.
+* Added support for the ``ERETNC`` instruction found in MIPS32R5 and later.
+* Added support for OpenCL. See http://portablecl.org/.
+
+ * Address spaces 1 to 255 are now reserved for software use and conversions
+ between them are no-op casts.
+
+* Removed the ``mips16`` value for the -mcpu option since it is an :abbr:`ASE
+ (Application Specific Extension)` and not a processor. If you were using this,
+ please specify another CPU and use ``-mips16`` to enable MIPS16.
+* Removed ``copy_u.w`` from 32-bit MSA and ``copy_u.d`` from 64-bit MSA since
+ they have been removed from the MSA specification due to forward compatibility
+ issues. For example, 32-bit MSA code containing ``copy_u.w`` would behave
+ differently on a 64-bit processor supporting MSA. The corresponding intrinsics
+ are still available and may expand to ``copy_s.[wd]`` where this is
+ appropriate for forward compatibility purposes.
+* Relaxed the ``-mnan`` option to allow ``-mnan=2008`` on MIPS32R2/MIPS64R2 for
+ compatibility with GCC.
+* Made MIPS64R6 the default CPU for 64-bit Android triples.
+
+The MIPS target has also fixed various bugs including the following notable
+fixes:
+
+* Fixed reversed operands on ``mthi``/``mtlo`` in the DSP :abbr:`ASE
+ (Application Specific Extension)`.
+* The code generator no longer uses ``jal`` for calls to absolute immediate
+ addresses.
+* Disabled fast instruction selection on MIPS32R6 and MIPS64R6 since this is not
+ yet supported.
+* Corrected addend for ``R_MIPS_HI16`` and ``R_MIPS_PCHI16`` in MCJIT
+* The code generator no longer crashes when handling subregisters of an 64-bit
+ FPU register with undefined value.
+* The code generator no longer attempts to use ``$zero`` for operands that do
+ not permit ``$zero``.
+* Corrected the opcode used for ``ll``/``sc`` when using MIPS32R6/MIPS64R6 and
+ the Integrated Assembler.
+* Added support for atomic load and atomic store.
+* Corrected debug info when dynamically re-aligning the stack.
+
+Integrated Assembler
+^^^^^^^^^^^^^^^^^^^^
+We have made a large number of improvements to the integrated assembler for
+MIPS. In this release, the integrated assembler isn't quite production-ready
+since there are a few known issues related to bare-metal support, checking
+immediates on instructions, and the N32/N64 ABI's. However, the current support
+should be sufficient for many users of the O32 ABI, particularly those targeting
+MIPS32 on Linux or bare-metal MIPS32.
+
+If you would like to try the integrated assembler, please use
+``-fintegrated-as``.
-It is now possible to compile the Linux kernel. This currently requires a small
-number of kernel patches. See the `LLVMLinux project
-<http://llvm.linuxfoundation.org/index.php/Main_Page>`_ for details.
+Changes to the PowerPC Target
+-----------------------------
-* Added -mabicalls and -mno-abicalls. The implementation may not be complete
- but works sufficiently well for the Linux kernel.
+ During this release ...
-* Fixed multiple compatibility issues between LLVM's inline assembly support
- and GCC's.
-* Added support for a number of directives used by Linux to the Integrated
- Assembler.
+Changes to the X86 Target
+-----------------------------
-Miscellaneous
-^^^^^^^^^^^^^
+ During this release ...
-* Attempting to disassemble l[wd]c[23], s[wd]c[23], cache, and pref no longer
- triggers an assertion.
+* TLS is enabled for Cygwin as emutls.
-* Added -muclibc and -mglibc to support toolchains that provide both uClibC and
- GLibC.
+* Smaller code for materializing 32-bit 1 and -1 constants at ``-Os``.
-* __SIZEOF_INT128__ is no longer defined for 64-bit targets since 128-bit
- integers do not work at this time for this target.
+* More efficient code for wide integer compares. (E.g. 64-bit compares
+ on 32-bit targets.)
-* Using $t4-$t7 with the N32 and N64 ABI is deprecated when ``-fintegrated-as``
- is in use and will be removed in LLVM 3.7. These names have never been
- supported by the GNU Assembler for these ABI's.
+* Tail call support for ``thiscall``, ``stdcall`, ``vectorcall``, and
+ ``fastcall`` functions.
-Changes to the PowerPC Target
+Changes to the Hexagon Target
-----------------------------
-There are numerous improvements to the PowerPC target in this release:
+In addition to general code size and performance improvements, Hexagon target
+now has basic support for Hexagon V60 architecture and Hexagon Vector
+Extensions (HVX).
-* LLVM now generates the Vector-Scalar eXtension (VSX) instructions from
- version 2.06 of the Power ISA, for both big- and little-endian targets.
+Changes to the AVR Target
+-------------------------
-* LLVM now has a POWER8 instruction scheduling description.
+Slightly less than half of the AVR backend has been merged in at this point. It is still
+missing a number large parts which cause it to be unusable, but is well on the
+road to being completely merged and workable.
-* Address Sanitizer (ASAN) support is now fully functional.
-
-* Performance of simple atomic accesses has been greatly improved.
-
-* Atomic fences now use light-weight syncs where possible, again providing
- significant performance benefit.
+Changes to the OCaml bindings
+-----------------------------
-* The PowerPC target now supports PIC levels (-fPIC vs. -fpic).
+ During this release ...
-* PPC32 SVR4 now supports small-model PIC.
+* The ocaml function link_modules has been replaced with link_modules' which
+ uses LLVMLinkModules2.
-* There have been many smaller bug fixes and performance improvements.
-External Open Source Projects Using LLVM 3.6
+External Open Source Projects Using LLVM 3.8
============================================
An exciting aspect of LLVM is that it is used as an enabling technology for
a lot of other language and tools projects. This section lists some of the
-projects that have already been updated to work with LLVM 3.6.
+projects that have already been updated to work with LLVM 3.8.
+
+LDC - the LLVM-based D compiler
+-------------------------------
+
+`D <http://dlang.org>`_ is a language with C-like syntax and static typing. It
+pragmatically combines efficiency, control, and modeling power, with safety and
+programmer productivity. D supports powerful concepts like Compile-Time Function
+Execution (CTFE) and Template Meta-Programming, provides an innovative approach
+to concurrency and offers many classical paradigms.
-* A project
+`LDC <http://wiki.dlang.org/LDC>`_ uses the frontend from the reference compiler
+combined with LLVM as backend to produce efficient native code. LDC targets
+x86/x86_64 systems like Linux, OS X and Windows and also PowerPC (32/64 bit)
+and ARM. Ports to other architectures like AArch64 and MIPS64 are underway.
Additional Information
projects / oota-llvm.git / blobdiff