ReleaseNotes: PowerPC; by Kit Barton

[oota-llvm.git] / docs / ReleaseNotes.rst

diff --git a/docs/ReleaseNotes.rst b/docs/ReleaseNotes.rst
index 2a4e011f244bc4740ffe04b58e04e5d3717700a4..831003b098c41b7b0b1ab7ee442fb855e53c7f5d 100644 (file)
--- a/docs/ReleaseNotes.rst
+++ b/docs/ReleaseNotes.rst
@@ -98,6 +98,21 @@ Non-comprehensive list of changes in this release
   shared library. To enable this, pass ``-DLLVM_LINK_LLVM_DYLIB=ON`` to CMake.
   See `Building LLVM with CMake`_ for more details.
 
+* The optimization to move the prologue and epilogue of functions in colder
+  code path (shrink-wrapping) is now enabled by default.
+
+* A new target-independent gcc-compatible emulated Thread Local Storage mode
+  is added.  When ``-femultated-tls`` flag is used, all accesses to TLS
+  variables are converted to calls to ``__emutls_get_address`` in the runtime
+  library.
+
+* MSVC compatible exception handling has been completely overhauled. New
+  instructions have been introduced to facilitate this:
+  `New exception handling instructions <ExceptionHandling.html#new-exception-handling-instructions>`_. 
+  While we have done our best to test this feature thoroughly, it would
+  not be completely surprising if there were a few lingering issues that
+  early adopters might bump into.
+
 .. NOTE
    For small 1-3 sentence descriptions, just add an entry at the end of
    this list. If your description won't fit comfortably in one bullet
@@ -212,7 +227,26 @@ If you would like to try the integrated assembler, please use
 Changes to the PowerPC Target
 -----------------------------
 
- During this release ...
+There are numerous improvements to the PowerPC target in this release:
+
+* Shrink wrapping optimization has been enabled for PowerPC Little Endian
+
+* Direct move instructions are used when converting scalars to vectors
+
+* Thread Sanitizer (TSAN) is now supported for PowerPC
+
+* New MI peephole pass to clean up redundand XXPERMDI instructions  
+
+* Add branch hints to highly biased branch instructions (code reaching
+  unreachable terminators and exceptional control flow consructs)
+
+* Promote boolean return values to integer to prevent excessive usage of
+  condition registers
+
+* Additional vector APIs for vector comparisons and vector merges have been
+  added to altivec.h
+
+* Many bugs have been identified and fixed
 
 
 Changes to the X86 Target
@@ -227,9 +261,16 @@ Changes to the X86 Target
 * More efficient code for wide integer compares. (E.g. 64-bit compares
   on 32-bit targets.)
 
-* Tail call support for ``thiscall``, ``stdcall`, ``vectorcall``, and
+* Tail call support for ``thiscall``, ``stdcall``, ``vectorcall``, and
   ``fastcall`` functions.
 
+Changes to the Hexagon Target
+-----------------------------
+
+In addition to general code size and performance improvements, Hexagon target
+now has basic support for Hexagon V60 architecture and Hexagon Vector
+Extensions (HVX).
+
 Changes to the AVR Target
 -------------------------