IR: Give 'DI' prefix to debug info metadata

[oota-llvm.git] / bindings / ocaml / target / llvm_target.mli

diff --git a/bindings/ocaml/target/llvm_target.mli b/bindings/ocaml/target/llvm_target.mli
index 168eef539e963abccc3022db8a8fb8f316cbd9e9..676bc613c649c4b21c86d29f5b881ba17c246dad 100644 (file)
--- a/bindings/ocaml/target/llvm_target.mli
+++ b/bindings/ocaml/target/llvm_target.mli
@@ -18,6 +18,44 @@ module Endian : sig
   | Little
 end
 
+module CodeGenOptLevel : sig
+  type t =
+  | None
+  | Less
+  | Default
+  | Aggressive
+end
+
+module RelocMode : sig
+  type t =
+  | Default
+  | Static
+  | PIC
+  | DynamicNoPIC
+end
+
+module CodeModel : sig
+  type t =
+  | Default
+  | JITDefault
+  | Small
+  | Kernel
+  | Medium
+  | Large
+end
+
+module CodeGenFileType : sig
+  type t =
+  | AssemblyFile
+  | ObjectFile
+end
+
+(** {6 Exceptions} *)
+
+exception Error of string
+
+(** {6 Data Layout} *)
+
 module DataLayout : sig
   type t
 
@@ -29,7 +67,7 @@ module DataLayout : sig
       See the method [llvm::DataLayout::getStringRepresentation]. *)
   val as_string : t -> string
 
-  (** [add_to_pass_manager dl pm] adds the target data [dl] to
+  (** [add_to_pass_manager pm dl] adds the data layout [dl] to
       the pass manager [pm].
       See the method [llvm::PassManagerBase::add]. *)
   val add_to_pass_manager : [<Llvm.PassManager.any] Llvm.PassManager.t ->
@@ -93,3 +131,96 @@ module DataLayout : sig
       See the method [llvm::StructLayout::getElementContainingOffset]. *)
   val offset_of_element : Llvm.lltype -> int -> t -> Int64.t
 end
+
+(** {6 Target} *)
+
+module Target : sig
+  type t
+
+  (** [default_triple ()] returns the default target triple for current
+      platform. *)
+  val default_triple : unit -> string
+
+  (** [first ()] returns the first target in the registered targets
+      list, or [None]. *)
+  val first : unit -> t option
+
+  (** [succ t] returns the next target after [t], or [None]
+      if [t] was the last target. *)
+  val succ : t -> t option
+
+  (** [all ()] returns a list of known targets. *)
+  val all : unit -> t list
+
+  (** [by_name name] returns [Some t] if a target [t] named [name] is
+      registered, or [None] otherwise. *)
+  val by_name : string -> t option
+
+  (** [by_triple triple] returns a target for a triple [triple], or raises
+      [Error] if [triple] does not correspond to a registered target. *)
+  val by_triple : string -> t
+
+  (** Returns the name of a target. See [llvm::Target::getName]. *)
+  val name : t -> string
+
+  (** Returns the description of a target.
+      See [llvm::Target::getDescription]. *)
+  val description : t -> string
+
+  (** Returns [true] if the target has a JIT. *)
+  val has_jit : t -> bool
+
+  (** Returns [true] if the target has a target machine associated. *)
+  val has_target_machine : t -> bool
+
+  (** Returns [true] if the target has an ASM backend (required for
+      emitting output). *)
+  val has_asm_backend : t -> bool
+end
+
+(** {6 Target Machine} *)
+
+module TargetMachine : sig
+  type t
+
+  (** Creates a new target machine.
+      See [llvm::Target::createTargetMachine]. *)
+  val create : triple:string -> ?cpu:string -> ?features:string ->
+               ?level:CodeGenOptLevel.t -> ?reloc_mode:RelocMode.t ->
+               ?code_model:CodeModel.t -> Target.t -> t
+
+  (** Returns the Target used in a TargetMachine *)
+  val target : t -> Target.t
+
+  (** Returns the triple used while creating this target machine. See
+      [llvm::TargetMachine::getTriple]. *)
+  val triple : t -> string
+
+  (** Returns the CPU used while creating this target machine. See
+      [llvm::TargetMachine::getCPU]. *)
+  val cpu : t -> string
+
+  (** Returns the feature string used while creating this target machine. See
+      [llvm::TargetMachine::getFeatureString]. *)
+  val features : t -> string
+
+  (** Returns the data layout of this target machine. *)
+  val data_layout : t -> DataLayout.t
+
+  (** Adds the target-specific analysis passes to the pass manager.
+      See [llvm::TargetMachine::addAnalysisPasses]. *)
+  val add_analysis_passes : [< Llvm.PassManager.any ] Llvm.PassManager.t -> t -> unit
+
+  (** Sets the assembly verbosity of this target machine.
+      See [llvm::TargetMachine::setAsmVerbosity]. *)
+  val set_verbose_asm : bool -> t -> unit
+
+  (** Emits assembly or object data for the given module to the given
+      file or raise [Error]. *)
+  val emit_to_file : Llvm.llmodule -> CodeGenFileType.t -> string -> t -> unit
+
+  (** Emits assembly or object data for the given module to a fresh memory
+      buffer or raise [Error]. *)
+  val emit_to_memory_buffer : Llvm.llmodule -> CodeGenFileType.t -> t ->
+                              Llvm.llmemorybuffer
+end