test commit redux

[oota-llvm.git] / Makefile.rules

diff --git a/Makefile.rules b/Makefile.rules
index d057f043ff640bd2214741efa269b41c04cbe998..78d1f97e146bb91fdfa94e8f7bb567156fbb718c 100644 (file)
--- a/Makefile.rules
+++ b/Makefile.rules
@@ -57,6 +57,62 @@ VPATH=$(PROJ_SRC_DIR)
 
 $(UserTargets)::
 
+#------------------------------------------------------------------------
+# LLVMBuild Integration
+#------------------------------------------------------------------------
+#
+# We use llvm-build to generate all the data required by the Makefile based
+# build system in one swoop:
+#
+#  - We generate a file (a Makefile fragment) in the object root which contains
+#    all the definitions that are required by Makefiles across the entire
+#    project.
+#
+#  - We generate the library table used by llvm-config.
+#
+#  - We generate the dependencies for the Makefile fragment, so that we will
+#    automatically reconfigure outselves.
+
+# The path to the llvm-build tool itself.
+LLVMBuildTool  := $(PROJ_SRC_ROOT)/utils/llvm-build/llvm-build
+
+# The files we are going to generate using llvm-build.
+LLVMBuildMakeFrag := $(PROJ_OBJ_ROOT)/Makefile.llvmbuild
+LLVMConfigLibraryDependenciesInc := \
+       $(PROJ_OBJ_ROOT)/tools/llvm-config-2/LibraryDependencies.inc
+
+# The rule to create the LLVMBuild Makefile fragment as well as the llvm-config
+# library table.
+#
+# Note that this target gets its real dependencies generated for us by
+# llvm-build.
+#
+# We include a dependency on this Makefile to ensure that changes to the
+# generation command get picked up.
+$(LLVMBuildMakeFrag): $(PROJ_SRC_ROOT)/Makefile.rules
+       $(Echo) Constructing LLVMBuild project information.
+       $(Verb) $(LLVMBuildTool) \
+         --native-target "$(ARCH)" \
+         --enable-targets "$(TARGETS_TO_BUILD)" \
+         --write-library-table $(LLVMConfigLibraryDependenciesInc) \
+         --write-make-fragment $(LLVMBuildMakeFrag)
+
+# For completeness, let Make know how the extra files are generated.
+$(LLVMConfigLibraryDependenciesInc): $(LLVMBuildMakeFrag)
+
+# Include the generated Makefile fragment.
+#
+# We currently only include the dependencies for the fragment itself if we are
+# at the top-level. Otherwise, recursive invocations would ends up doing
+# substantially more redundant stat'ing.
+#
+# This means that we won't properly regenerate things for developers used to
+# building from a subdirectory, but that is always somewhat unreliable.
+ifeq ($(LEVEL),.)
+LLVMBUILD_INCLUDE_DEPENDENCIES := 1
+endif
+-include $(LLVMBuildMakeFrag)
+
 ################################################################################
 # PRECONDITIONS: that which must be built/checked first
 ################################################################################
@@ -631,6 +687,10 @@ CPP.Flags     += $(sort -I$(PROJ_OBJ_DIR) -I$(PROJ_SRC_DIR) \
                 $(LLVM_OBJ_ROOT) $(LLVM_SRC_ROOT))) \
                 $(CPP.BaseFlags)
 
+ifeq ($(INCLUDE_BUILD_DIR),1)
+  CPP.Flags   += -I$(ObjDir)
+endif
+
 # SHOW_DIAGNOSTICS support.
 ifeq ($(SHOW_DIAGNOSTICS),1)
   Compile.Wrapper := env CC_LOG_DIAGNOSTICS=1 \
@@ -806,7 +866,7 @@ endif
 # Handle the OPTIONAL_PARALLEL_DIRS options for optional parallel construction
 #-----------------------------------------------------------
 ifdef OPTIONAL_PARALLEL_DIRS
-  PARALLEL_DIRS += $(foreach T,$(OPTIONAL_PARALLEL_DIRS),$(shell test -d $(PROJ_SRC_DIR)/$(T) && echo "$(T)"))
+  PARALLEL_DIRS += $(foreach T,$(OPTIONAL_PARALLEL_DIRS),$(shell test -d $(PROJ_SRC_DIR)/$(T) -o -f $(T)/Makefile && echo "$(T)"))
 endif
 
 #-----------------------------------------------------------
@@ -828,13 +888,20 @@ unitcheck:: $(addsuffix /.makeunitcheck,$(PARALLEL_DIRS))
 ParallelTargets := $(foreach T,$(RecursiveTargets),%/.make$(T))
 
 $(ParallelTargets) :
-       $(Verb) if ([ ! -f $(@D)/Makefile ] || \
-                   command test $(@D)/Makefile -ot \
-                      $(PROJ_SRC_DIR)/$(@D)/Makefile ); then \
-         $(MKDIR) $(@D); \
-         $(CP) $(PROJ_SRC_DIR)/$(@D)/Makefile $(@D)/Makefile; \
+       $(Verb) \
+         SD=$(PROJ_SRC_DIR)/$(@D); \
+         DD=$(@D); \
+         if [ ! -f $$SD/Makefile ]; then \
+           SD=$(@D); \
+           DD=$(notdir $(@D)); \
+         fi; \
+         if ([ ! -f $$DD/Makefile ] || \
+                   command test $$DD/Makefile -ot \
+                      $$SD/Makefile ); then \
+         $(MKDIR) $$DD; \
+         $(CP) $$SD/Makefile $$DD/Makefile; \
        fi; \
-       $(MAKE) -C $(@D) $(subst $(@D)/.make,,$@)
+       $(MAKE) -C $$DD $(subst $(@D)/.make,,$@)
 endif
 
 #---------------------------------------------------------