[AArch64] Add ARMv8.2-A FP16 vector instructions
[oota-llvm.git] / test / MC / AArch64 / neon-frsqrt-frecp.s
1 // RUN: llvm-mc -triple aarch64-none-linux-gnu -mattr=+neon,+fullfp16 -show-encoding < %s | FileCheck %s
2
3 // Check that the assembler can handle the documented syntax for AArch64
4
5 //----------------------------------------------------------------------
6 // Vector Reciprocal Square Root Step (Floating Point)
7 //----------------------------------------------------------------------
8          frsqrts v0.4h, v31.4h, v16.4h
9          frsqrts v4.8h, v7.8h, v15.8h
10          frsqrts v0.2s, v31.2s, v16.2s
11          frsqrts v4.4s, v7.4s, v15.4s
12          frsqrts v29.2d, v2.2d, v5.2d
13
14 // CHECK: frsqrts v0.4h, v31.4h, v16.4h   // encoding: [0xe0,0x3f,0xd0,0x0e]
15 // CHECK: frsqrts v4.8h, v7.8h, v15.8h    // encoding: [0xe4,0x3c,0xcf,0x4e]
16 // CHECK: frsqrts v0.2s, v31.2s, v16.2s // encoding: [0xe0,0xff,0xb0,0x0e]
17 // CHECK: frsqrts v4.4s, v7.4s, v15.4s  // encoding: [0xe4,0xfc,0xaf,0x4e]
18 // CHECK: frsqrts v29.2d, v2.2d, v5.2d  // encoding: [0x5d,0xfc,0xe5,0x4e]
19
20 //----------------------------------------------------------------------
21 // Vector Reciprocal Step (Floating Point)
22 //----------------------------------------------------------------------
23          frecps v3.4h, v8.4h, v12.4h
24          frecps v31.8h, v29.8h, v28.8h
25          frecps v31.4s, v29.4s, v28.4s
26          frecps v3.2s, v8.2s, v12.2s
27          frecps v17.2d, v15.2d, v13.2d
28
29 // CHECK: frecps  v3.4h, v8.4h, v12.4h    // encoding: [0x03,0x3d,0x4c,0x0e]
30 // CHECK: frecps  v31.8h, v29.8h, v28.8h  // encoding: [0xbf,0x3f,0x5c,0x4e]
31 // CHECK: frecps v31.4s, v29.4s, v28.4s  // encoding: [0xbf,0xff,0x3c,0x4e]
32 // CHECK: frecps v3.2s, v8.2s, v12.2s    // encoding: [0x03,0xfd,0x2c,0x0e]
33 // CHECK: frecps v17.2d, v15.2d, v13.2d  // encoding: [0xf1,0xfd,0x6d,0x4e]
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