1 target triple = "x86_64-unknown-unknown"
3 ; RUN: llc < %s -march=x86-64 -mattr=+avx | FileCheck %s
5 ; When extracting multiple consecutive elements from a larger
6 ; vector into a smaller one, do it efficiently. We should use
7 ; an EXTRACT_SUBVECTOR node internally rather than a bunch of
8 ; single element extractions.
10 ; Extracting the low elements only requires using the right kind of store.
11 define void @low_v8f32_to_v4f32(<8 x float> %v, <4 x float>* %ptr) {
12 %ext0 = extractelement <8 x float> %v, i32 0
13 %ext1 = extractelement <8 x float> %v, i32 1
14 %ext2 = extractelement <8 x float> %v, i32 2
15 %ext3 = extractelement <8 x float> %v, i32 3
16 %ins0 = insertelement <4 x float> undef, float %ext0, i32 0
17 %ins1 = insertelement <4 x float> %ins0, float %ext1, i32 1
18 %ins2 = insertelement <4 x float> %ins1, float %ext2, i32 2
19 %ins3 = insertelement <4 x float> %ins2, float %ext3, i32 3
20 store <4 x float> %ins3, <4 x float>* %ptr, align 16
23 ; CHECK-LABEL: low_v8f32_to_v4f32
25 ; CHECK-NEXT: vzeroupper
29 ; Extracting the high elements requires just one AVX instruction.
30 define void @high_v8f32_to_v4f32(<8 x float> %v, <4 x float>* %ptr) {
31 %ext0 = extractelement <8 x float> %v, i32 4
32 %ext1 = extractelement <8 x float> %v, i32 5
33 %ext2 = extractelement <8 x float> %v, i32 6
34 %ext3 = extractelement <8 x float> %v, i32 7
35 %ins0 = insertelement <4 x float> undef, float %ext0, i32 0
36 %ins1 = insertelement <4 x float> %ins0, float %ext1, i32 1
37 %ins2 = insertelement <4 x float> %ins1, float %ext2, i32 2
38 %ins3 = insertelement <4 x float> %ins2, float %ext3, i32 3
39 store <4 x float> %ins3, <4 x float>* %ptr, align 16
42 ; CHECK-LABEL: high_v8f32_to_v4f32
44 ; CHECK-NEXT: vzeroupper
48 ; Make sure element type doesn't alter the codegen. Note that
49 ; if we were actually using the vector in this function and
50 ; have AVX2, we should generate vextracti128 (the int version).
51 define void @high_v8i32_to_v4i32(<8 x i32> %v, <4 x i32>* %ptr) {
52 %ext0 = extractelement <8 x i32> %v, i32 4
53 %ext1 = extractelement <8 x i32> %v, i32 5
54 %ext2 = extractelement <8 x i32> %v, i32 6
55 %ext3 = extractelement <8 x i32> %v, i32 7
56 %ins0 = insertelement <4 x i32> undef, i32 %ext0, i32 0
57 %ins1 = insertelement <4 x i32> %ins0, i32 %ext1, i32 1
58 %ins2 = insertelement <4 x i32> %ins1, i32 %ext2, i32 2
59 %ins3 = insertelement <4 x i32> %ins2, i32 %ext3, i32 3
60 store <4 x i32> %ins3, <4 x i32>* %ptr, align 16
63 ; CHECK-LABEL: high_v8i32_to_v4i32
65 ; CHECK-NEXT: vzeroupper
69 ; Make sure that element size doesn't alter the codegen.
70 define void @high_v4f64_to_v2f64(<4 x double> %v, <2 x double>* %ptr) {
71 %ext0 = extractelement <4 x double> %v, i32 2
72 %ext1 = extractelement <4 x double> %v, i32 3
73 %ins0 = insertelement <2 x double> undef, double %ext0, i32 0
74 %ins1 = insertelement <2 x double> %ins0, double %ext1, i32 1
75 store <2 x double> %ins1, <2 x double>* %ptr, align 16
78 ; CHECK-LABEL: high_v4f64_to_v2f64
80 ; CHECK-NEXT: vzeroupper
84 ; PR25320 Make sure that a widened (possibly legalized) vector correctly zero-extends upper elements.
85 ; FIXME - Ideally these should just call VMOVD/VMOVQ/VMOVSS/VMOVSD
87 define void @legal_vzmovl_2i32_8i32(<2 x i32>* %in, <8 x i32>* %out) {
88 %ld = load <2 x i32>, <2 x i32>* %in, align 8
89 %ext = extractelement <2 x i32> %ld, i64 0
90 %ins = insertelement <8 x i32> <i32 undef, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0>, i32 %ext, i64 0
91 store <8 x i32> %ins, <8 x i32>* %out, align 32
94 ; CHECK-LABEL: legal_vzmovl_2i32_8i32
95 ; CHECK: vpmovzxdq {{.*#+}} xmm0 = mem[0],zero,mem[1],zero
96 ; CHECK-NEXT: vxorps %ymm1, %ymm1, %ymm1
97 ; CHECK-NEXT: vblendps {{.*#+}} ymm0 = ymm0[0],ymm1[1,2,3,4,5,6,7]
98 ; CHECK-NEXT: vmovaps %ymm0, (%rsi)
99 ; CHECK-NEXT: vzeroupper
103 define void @legal_vzmovl_2i64_4i64(<2 x i64>* %in, <4 x i64>* %out) {
104 %ld = load <2 x i64>, <2 x i64>* %in, align 8
105 %ext = extractelement <2 x i64> %ld, i64 0
106 %ins = insertelement <4 x i64> <i64 undef, i64 0, i64 0, i64 0>, i64 %ext, i64 0
107 store <4 x i64> %ins, <4 x i64>* %out, align 32
110 ; CHECK-LABEL: legal_vzmovl_2i64_4i64
111 ; CHECK: vmovupd (%rdi), %xmm0
112 ; CHECK-NEXT: vxorpd %ymm1, %ymm1, %ymm1
113 ; CHECK-NEXT: vblendpd {{.*#+}} ymm0 = ymm0[0],ymm1[1,2,3]
114 ; CHECK-NEXT: vmovapd %ymm0, (%rsi)
115 ; CHECK-NEXT: vzeroupper
119 define void @legal_vzmovl_2f32_8f32(<2 x float>* %in, <8 x float>* %out) {
120 %ld = load <2 x float>, <2 x float>* %in, align 8
121 %ext = extractelement <2 x float> %ld, i64 0
122 %ins = insertelement <8 x float> <float undef, float 0.0, float 0.0, float 0.0, float 0.0, float 0.0, float 0.0, float 0.0>, float %ext, i64 0
123 store <8 x float> %ins, <8 x float>* %out, align 32
126 ; CHECK-LABEL: legal_vzmovl_2f32_8f32
127 ; CHECK: vmovq {{.*#+}} xmm0 = mem[0],zero
128 ; CHECK-NEXT: vxorps %ymm1, %ymm1, %ymm1
129 ; CHECK-NEXT: vblendps {{.*#+}} ymm0 = ymm0[0],ymm1[1,2,3,4,5,6,7]
130 ; CHECK-NEXT: vmovaps %ymm0, (%rsi)
131 ; CHECK-NEXT: vzeroupper
135 define void @legal_vzmovl_2f64_4f64(<2 x double>* %in, <4 x double>* %out) {
136 %ld = load <2 x double>, <2 x double>* %in, align 8
137 %ext = extractelement <2 x double> %ld, i64 0
138 %ins = insertelement <4 x double> <double undef, double 0.0, double 0.0, double 0.0>, double %ext, i64 0
139 store <4 x double> %ins, <4 x double>* %out, align 32
142 ; CHECK-LABEL: legal_vzmovl_2f64_4f64
143 ; CHECK: vmovupd (%rdi), %xmm0
144 ; CHECK-NEXT: vxorpd %ymm1, %ymm1, %ymm1
145 ; CHECK-NEXT: vblendpd {{.*#+}} ymm0 = ymm0[0],ymm1[1,2,3]
146 ; CHECK-NEXT: vmovapd %ymm0, (%rsi)
147 ; CHECK-NEXT: vzeroupper