1 ; RUN: llc < %s -march=x86-64 | FileCheck %s
4 ; This should not generate SSE instructions:
10 define void @without.sse(float* nocapture %a, float* nocapture %b, float* nocapture %c, i32 %n) #0 {
12 %cmp9 = icmp sgt i32 %n, 0
13 br i1 %cmp9, label %for.body, label %for.end
16 %indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %entry ]
17 %arrayidx = getelementptr inbounds float* %b, i64 %indvars.iv
18 %0 = load float* %arrayidx, align 4, !tbaa !0
19 %arrayidx2 = getelementptr inbounds float* %c, i64 %indvars.iv
20 %1 = load float* %arrayidx2, align 4, !tbaa !0
21 %mul = fmul float %0, %1
22 %arrayidx4 = getelementptr inbounds float* %a, i64 %indvars.iv
23 store float %mul, float* %arrayidx4, align 4, !tbaa !0
24 %indvars.iv.next = add i64 %indvars.iv, 1
25 %lftr.wideiv = trunc i64 %indvars.iv.next to i32
26 %exitcond = icmp eq i32 %lftr.wideiv, %n
27 br i1 %exitcond, label %for.end, label %for.body
33 ; This should generate SSE instructions:
39 define void @with.sse(float* nocapture %a, float* nocapture %b, float* nocapture %c, i32 %n) #1 {
41 %cmp9 = icmp sgt i32 %n, 0
42 br i1 %cmp9, label %for.body, label %for.end
45 %indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %entry ]
46 %arrayidx = getelementptr inbounds float* %b, i64 %indvars.iv
47 %0 = load float* %arrayidx, align 4, !tbaa !0
48 %arrayidx2 = getelementptr inbounds float* %c, i64 %indvars.iv
49 %1 = load float* %arrayidx2, align 4, !tbaa !0
50 %mul = fmul float %0, %1
51 %arrayidx4 = getelementptr inbounds float* %a, i64 %indvars.iv
52 store float %mul, float* %arrayidx4, align 4, !tbaa !0
53 %indvars.iv.next = add i64 %indvars.iv, 1
54 %lftr.wideiv = trunc i64 %indvars.iv.next to i32
55 %exitcond = icmp eq i32 %lftr.wideiv, %n
56 br i1 %exitcond, label %for.end, label %for.body
62 attributes #0 = { nounwind optsize ssp uwtable "target-cpu"="core2" "target-features"="-sse4a,-avx2,-xop,-fma4,-bmi2,-3dnow,-3dnowa,-pclmul,-sse,-avx,-sse41,-ssse3,+mmx,-rtm,-sse42,-lzcnt,-f16c,-popcnt,-bmi,-aes,-fma,-rdrand,-sse2,-sse3" }
63 attributes #1 = { nounwind optsize ssp uwtable "target-cpu"="core2" "target-features"="-sse4a,-avx2,-xop,-fma4,-bmi2,-3dnow,-3dnowa,-pclmul,+sse,-avx,-sse41,+ssse3,+mmx,-rtm,-sse42,-lzcnt,-f16c,-popcnt,-bmi,-aes,-fma,-rdrand,+sse2,+sse3" }
65 !0 = metadata !{metadata !"float", metadata !1}
66 !1 = metadata !{metadata !"omnipotent char", metadata !2}
67 !2 = metadata !{metadata !"Simple C/C++ TBAA"}