1 ; Intel chips with slow unaligned memory accesses
3 ; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=pentium 2>&1 | FileCheck %s --check-prefix=SLOW
4 ; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=pentium-mmx 2>&1 | FileCheck %s --check-prefix=SLOW
5 ; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=pentiumpro 2>&1 | FileCheck %s --check-prefix=SLOW
6 ; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=pentium2 2>&1 | FileCheck %s --check-prefix=SLOW
7 ; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=pentium3 2>&1 | FileCheck %s --check-prefix=SLOW
8 ; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=pentium3m 2>&1 | FileCheck %s --check-prefix=SLOW
9 ; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=pentium-m 2>&1 | FileCheck %s --check-prefix=SLOW
10 ; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=pentium4 2>&1 | FileCheck %s --check-prefix=SLOW
11 ; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=pentium4m 2>&1 | FileCheck %s --check-prefix=SLOW
12 ; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=yonah 2>&1 | FileCheck %s --check-prefix=SLOW
13 ; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=prescott 2>&1 | FileCheck %s --check-prefix=SLOW
14 ; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=nocona 2>&1 | FileCheck %s --check-prefix=SLOW
15 ; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=core2 2>&1 | FileCheck %s --check-prefix=SLOW
16 ; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=penryn 2>&1 | FileCheck %s --check-prefix=SLOW
17 ; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=bonnell 2>&1 | FileCheck %s --check-prefix=SLOW
19 ; Intel chips with fast unaligned memory accesses
21 ; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=silvermont 2>&1 | FileCheck %s --check-prefix=FAST
22 ; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=nehalem 2>&1 | FileCheck %s --check-prefix=FAST
23 ; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=westmere 2>&1 | FileCheck %s --check-prefix=FAST
24 ; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=sandybridge 2>&1 | FileCheck %s --check-prefix=FAST
25 ; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=ivybridge 2>&1 | FileCheck %s --check-prefix=FAST
26 ; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=haswell 2>&1 | FileCheck %s --check-prefix=FAST
27 ; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=broadwell 2>&1 | FileCheck %s --check-prefix=FAST
28 ; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=knl 2>&1 | FileCheck %s --check-prefix=FAST
29 ; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=skylake 2>&1 | FileCheck %s --check-prefix=FAST
31 ; AMD chips with slow unaligned memory accesses
33 ; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=k6 2>&1 | FileCheck %s --check-prefix=SLOW
34 ; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=k6-2 2>&1 | FileCheck %s --check-prefix=SLOW
35 ; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=k6-3 2>&1 | FileCheck %s --check-prefix=SLOW
36 ; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=athlon 2>&1 | FileCheck %s --check-prefix=SLOW
37 ; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=athlon-tbird 2>&1 | FileCheck %s --check-prefix=SLOW
38 ; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=athlon-4 2>&1 | FileCheck %s --check-prefix=SLOW
39 ; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=athlon-xp 2>&1 | FileCheck %s --check-prefix=SLOW
40 ; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=k8 2>&1 | FileCheck %s --check-prefix=SLOW
41 ; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=opteron 2>&1 | FileCheck %s --check-prefix=SLOW
42 ; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=athlon64 2>&1 | FileCheck %s --check-prefix=SLOW
43 ; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=athlon-fx 2>&1 | FileCheck %s --check-prefix=SLOW
44 ; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=k8-sse3 2>&1 | FileCheck %s --check-prefix=SLOW
45 ; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=opteron-sse3 2>&1 | FileCheck %s --check-prefix=SLOW
46 ; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=athlon64-sse3 2>&1 | FileCheck %s --check-prefix=SLOW
48 ; AMD chips with fast unaligned memory accesses
49 ; FIXME: These are wrong except for btver2.
51 ; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=amdfam10 2>&1 | FileCheck %s --check-prefix=SLOW
52 ; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=barcelona 2>&1 | FileCheck %s --check-prefix=SLOW
53 ; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=btver1 2>&1 | FileCheck %s --check-prefix=SLOW
54 ; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=btver2 2>&1 | FileCheck %s --check-prefix=FAST
55 ; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=bdver1 2>&1 | FileCheck %s --check-prefix=SLOW
56 ; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=bdver2 2>&1 | FileCheck %s --check-prefix=SLOW
57 ; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=bdver3 2>&1 | FileCheck %s --check-prefix=SLOW
58 ; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=bdver4 2>&1 | FileCheck %s --check-prefix=SLOW
60 ; Other chips/general settings with slow unaligned memory accesses
62 ; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=generic 2>&1 | FileCheck %s --check-prefix=SLOW
63 ; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=i386 2>&1 | FileCheck %s --check-prefix=SLOW
64 ; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=i486 2>&1 | FileCheck %s --check-prefix=SLOW
65 ; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=i586 2>&1 | FileCheck %s --check-prefix=SLOW
66 ; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=i686 2>&1 | FileCheck %s --check-prefix=SLOW
67 ; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=geode 2>&1 | FileCheck %s --check-prefix=SLOW
68 ; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=winchip-c6 2>&1 | FileCheck %s --check-prefix=SLOW
69 ; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=winchip2 2>&1 | FileCheck %s --check-prefix=SLOW
70 ; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=c3 2>&1 | FileCheck %s --check-prefix=SLOW
71 ; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=c3-2 2>&1 | FileCheck %s --check-prefix=SLOW
73 ; Verify that the slow/fast unaligned memory attribute is set correctly for each CPU model.
74 ; Slow chips use 4-byte stores. Fast chips use something other than 4-byte stores.
76 define void @store_zeros(i8* %a) {
77 ; SLOW-NOT: not a recognized processor
78 ; SLOW-LABEL: store_zeros:
98 ; FAST-NOT: not a recognized processor
99 ; FAST-LABEL: store_zeros:
101 ; FAST-NEXT: movl {{[0-9]+}}(%esp), %eax
103 call void @llvm.memset.p0i8.i64(i8* %a, i8 0, i64 64, i32 1, i1 false)
107 declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i32, i1)