test/CodeGen/X86/bswap-vector.ll

   1 ; RUN: llc < %s -mcpu=x86-64 | FileCheck %s --check-prefix=CHECK-ALL --check-prefix=CHECK-SSE --check-prefix=CHECK-NOSSSE3
   2 ; RUN: llc < %s -mcpu=core2 | FileCheck %s --check-prefix=CHECK-ALL --check-prefix=CHECK-SSE --check-prefix=CHECK-SSSE3
   3 ; RUN: llc < %s -mcpu=core-avx2 | FileCheck %s --check-prefix=CHECK-AVX --check-prefix=CHECK-AVX2
   4 ; RUN: llc < %s -mcpu=core-avx2 -x86-experimental-vector-widening-legalization | FileCheck %s --check-prefix=CHECK-WIDE-AVX2
   5
   6 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
   7 target triple = "x86_64-unknown-linux-gnu"
   8
   9 declare <8 x i16> @llvm.bswap.v8i16(<8 x i16>)
  10 declare <4 x i32> @llvm.bswap.v4i32(<4 x i32>)
  11 declare <2 x i64> @llvm.bswap.v2i64(<2 x i64>)
  12
  13 define <8 x i16> @test1(<8 x i16> %v) {
  14 ; CHECK-NOSSSE3-LABEL: test1:
  15 ; CHECK-NOSSSE3:       # BB#0: # %entry
  16 ; CHECK-NOSSSE3-NEXT:    pxor %xmm1, %xmm1
  17 ; CHECK-NOSSSE3-NEXT:    movdqa %xmm0, %xmm2
  18 ; CHECK-NOSSSE3-NEXT:    punpckhbw {{.*#+}} xmm2 = xmm2[8],xmm1[8],xmm2[9],xmm1[9],xmm2[10],xmm1[10],xmm2[11],xmm1[11],xmm2[12],xmm1[12],xmm2[13],xmm1[13],xmm2[14],xmm1[14],xmm2[15],xmm1[15]
  19 ; CHECK-NOSSSE3-NEXT:    pshuflw {{.*#+}} xmm2 = xmm2[1,0,3,2,4,5,6,7]
  20 ; CHECK-NOSSSE3-NEXT:    pshufhw {{.*#+}} xmm2 = xmm2[0,1,2,3,5,4,7,6]
  21 ; CHECK-NOSSSE3-NEXT:    punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3],xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7]
  22 ; CHECK-NOSSSE3-NEXT:    pshuflw {{.*#+}} xmm0 = xmm0[1,0,3,2,4,5,6,7]
  23 ; CHECK-NOSSSE3-NEXT:    pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,5,4,7,6]
  24 ; CHECK-NOSSSE3-NEXT:    packuswb %xmm2, %xmm0
  25 ; CHECK-NOSSSE3-NEXT:    retq
  26 ;
  27 ; CHECK-SSSE3-LABEL: test1:
  28 ; CHECK-SSSE3:       # BB#0: # %entry
  29 ; CHECK-SSSE3-NEXT:    pshufb {{.*#+}} xmm0 = xmm0[1,0,3,2,5,4,7,6,9,8,11,10,13,12,15,14]
  30 ; CHECK-SSSE3-NEXT:    retq
  31 ;
  32 ; CHECK-AVX2-LABEL: test1:
  33 ; CHECK-AVX2:       # BB#0: # %entry
  34 ; CHECK-AVX2-NEXT:    vpshufb {{.*#+}} xmm0 = xmm0[1,0,3,2,5,4,7,6,9,8,11,10,13,12,15,14]
  35 ; CHECK-AVX2-NEXT:    retq
  36 ;
  37 ; CHECK-WIDE-AVX2-LABEL: test1:
  38 ; CHECK-WIDE-AVX2:       # BB#0: # %entry
  39 ; CHECK-WIDE-AVX2-NEXT:    vpshufb {{.*#+}} xmm0 = xmm0[1,0,3,2,5,4,7,6,9,8,11,10,13,12,15,14]
  40 ; CHECK-WIDE-AVX2-NEXT:    retq
  41 entry:
  42   %r = call <8 x i16> @llvm.bswap.v8i16(<8 x i16> %v)
  43   ret <8 x i16> %r
  44 }
  45
  46 define <4 x i32> @test2(<4 x i32> %v) {
  47 ; CHECK-NOSSSE3-LABEL: test2:
  48 ; CHECK-NOSSSE3:       # BB#0: # %entry
  49 ; CHECK-NOSSSE3-NEXT:    pxor %xmm1, %xmm1
  50 ; CHECK-NOSSSE3-NEXT:    movdqa %xmm0, %xmm2
  51 ; CHECK-NOSSSE3-NEXT:    punpckhbw {{.*#+}} xmm2 = xmm2[8],xmm1[8],xmm2[9],xmm1[9],xmm2[10],xmm1[10],xmm2[11],xmm1[11],xmm2[12],xmm1[12],xmm2[13],xmm1[13],xmm2[14],xmm1[14],xmm2[15],xmm1[15]
  52 ; CHECK-NOSSSE3-NEXT:    pshuflw {{.*#+}} xmm2 = xmm2[3,2,1,0,4,5,6,7]
  53 ; CHECK-NOSSSE3-NEXT:    pshufhw {{.*#+}} xmm2 = xmm2[0,1,2,3,7,6,5,4]
  54 ; CHECK-NOSSSE3-NEXT:    punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3],xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7]
  55 ; CHECK-NOSSSE3-NEXT:    pshuflw {{.*#+}} xmm0 = xmm0[3,2,1,0,4,5,6,7]
  56 ; CHECK-NOSSSE3-NEXT:    pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,7,6,5,4]
  57 ; CHECK-NOSSSE3-NEXT:    packuswb %xmm2, %xmm0
  58 ; CHECK-NOSSSE3-NEXT:    retq
  59 ;
  60 ; CHECK-SSSE3-LABEL: test2:
  61 ; CHECK-SSSE3:       # BB#0: # %entry
  62 ; CHECK-SSSE3-NEXT:    pshufb {{.*#+}} xmm0 = xmm0[3,2,1,0,7,6,5,4,11,10,9,8,15,14,13,12]
  63 ; CHECK-SSSE3-NEXT:    retq
  64 ;
  65 ; CHECK-AVX2-LABEL: test2:
  66 ; CHECK-AVX2:       # BB#0: # %entry
  67 ; CHECK-AVX2-NEXT:    vpshufb {{.*#+}} xmm0 = xmm0[3,2,1,0,7,6,5,4,11,10,9,8,15,14,13,12]
  68 ; CHECK-AVX2-NEXT:    retq
  69 ;
  70 ; CHECK-WIDE-AVX2-LABEL: test2:
  71 ; CHECK-WIDE-AVX2:       # BB#0: # %entry
  72 ; CHECK-WIDE-AVX2-NEXT:    vpshufb {{.*#+}} xmm0 = xmm0[3,2,1,0,7,6,5,4,11,10,9,8,15,14,13,12]
  73 ; CHECK-WIDE-AVX2-NEXT:    retq
  74 entry:
  75   %r = call <4 x i32> @llvm.bswap.v4i32(<4 x i32> %v)
  76   ret <4 x i32> %r
  77 }
  78
  79 define <2 x i64> @test3(<2 x i64> %v) {
  80 ; CHECK-NOSSSE3-LABEL: test3:
  81 ; CHECK-NOSSSE3:       # BB#0: # %entry
  82 ; CHECK-NOSSSE3-NEXT:    pxor %xmm1, %xmm1
  83 ; CHECK-NOSSSE3-NEXT:    movdqa %xmm0, %xmm2
  84 ; CHECK-NOSSSE3-NEXT:    punpckhbw {{.*#+}} xmm2 = xmm2[8],xmm1[8],xmm2[9],xmm1[9],xmm2[10],xmm1[10],xmm2[11],xmm1[11],xmm2[12],xmm1[12],xmm2[13],xmm1[13],xmm2[14],xmm1[14],xmm2[15],xmm1[15]
  85 ; CHECK-NOSSSE3-NEXT:    pshufd {{.*#+}} xmm2 = xmm2[2,3,0,1]
  86 ; CHECK-NOSSSE3-NEXT:    pshuflw {{.*#+}} xmm2 = xmm2[3,2,1,0,4,5,6,7]
  87 ; CHECK-NOSSSE3-NEXT:    pshufhw {{.*#+}} xmm2 = xmm2[0,1,2,3,7,6,5,4]
  88 ; CHECK-NOSSSE3-NEXT:    punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3],xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7]
  89 ; CHECK-NOSSSE3-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1]
  90 ; CHECK-NOSSSE3-NEXT:    pshuflw {{.*#+}} xmm0 = xmm0[3,2,1,0,4,5,6,7]
  91 ; CHECK-NOSSSE3-NEXT:    pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,7,6,5,4]
  92 ; CHECK-NOSSSE3-NEXT:    packuswb %xmm2, %xmm0
  93 ; CHECK-NOSSSE3-NEXT:    retq
  94 ;
  95 ; CHECK-SSSE3-LABEL: test3:
  96 ; CHECK-SSSE3:       # BB#0: # %entry
  97 ; CHECK-SSSE3-NEXT:    pshufb {{.*#+}} xmm0 = xmm0[7,6,5,4,3,2,1,0,15,14,13,12,11,10,9,8]
  98 ; CHECK-SSSE3-NEXT:    retq
  99 ;
 100 ; CHECK-AVX2-LABEL: test3:
 101 ; CHECK-AVX2:       # BB#0: # %entry
 102 ; CHECK-AVX2-NEXT:    vpshufb {{.*#+}} xmm0 = xmm0[7,6,5,4,3,2,1,0,15,14,13,12,11,10,9,8]
 103 ; CHECK-AVX2-NEXT:    retq
 104 ;
 105 ; CHECK-WIDE-AVX2-LABEL: test3:
 106 ; CHECK-WIDE-AVX2:       # BB#0: # %entry
 107 ; CHECK-WIDE-AVX2-NEXT:    vpshufb {{.*#+}} xmm0 = xmm0[7,6,5,4,3,2,1,0,15,14,13,12,11,10,9,8]
 108 ; CHECK-WIDE-AVX2-NEXT:    retq
 109 entry:
 110   %r = call <2 x i64> @llvm.bswap.v2i64(<2 x i64> %v)
 111   ret <2 x i64> %r
 112 }
 113
 114 declare <16 x i16> @llvm.bswap.v16i16(<16 x i16>)
 115 declare <8 x i32> @llvm.bswap.v8i32(<8 x i32>)
 116 declare <4 x i64> @llvm.bswap.v4i64(<4 x i64>)
 117
 118 define <16 x i16> @test4(<16 x i16> %v) {
 119 ; CHECK-NOSSSE3-LABEL: test4:
 120 ; CHECK-NOSSSE3:       # BB#0: # %entry
 121 ; CHECK-NOSSSE3-NEXT:    pxor %xmm2, %xmm2
 122 ; CHECK-NOSSSE3-NEXT:    movdqa %xmm0, %xmm3
 123 ; CHECK-NOSSSE3-NEXT:    punpckhbw {{.*#+}} xmm3 = xmm3[8],xmm2[8],xmm3[9],xmm2[9],xmm3[10],xmm2[10],xmm3[11],xmm2[11],xmm3[12],xmm2[12],xmm3[13],xmm2[13],xmm3[14],xmm2[14],xmm3[15],xmm2[15]
 124 ; CHECK-NOSSSE3-NEXT:    pshuflw {{.*#+}} xmm3 = xmm3[1,0,3,2,4,5,6,7]
 125 ; CHECK-NOSSSE3-NEXT:    pshufhw {{.*#+}} xmm3 = xmm3[0,1,2,3,5,4,7,6]
 126 ; CHECK-NOSSSE3-NEXT:    punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3],xmm0[4],xmm2[4],xmm0[5],xmm2[5],xmm0[6],xmm2[6],xmm0[7],xmm2[7]
 127 ; CHECK-NOSSSE3-NEXT:    pshuflw {{.*#+}} xmm0 = xmm0[1,0,3,2,4,5,6,7]
 128 ; CHECK-NOSSSE3-NEXT:    pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,5,4,7,6]
 129 ; CHECK-NOSSSE3-NEXT:    packuswb %xmm3, %xmm0
 130 ; CHECK-NOSSSE3-NEXT:    movdqa %xmm1, %xmm3
 131 ; CHECK-NOSSSE3-NEXT:    punpckhbw {{.*#+}} xmm3 = xmm3[8],xmm2[8],xmm3[9],xmm2[9],xmm3[10],xmm2[10],xmm3[11],xmm2[11],xmm3[12],xmm2[12],xmm3[13],xmm2[13],xmm3[14],xmm2[14],xmm3[15],xmm2[15]
 132 ; CHECK-NOSSSE3-NEXT:    pshuflw {{.*#+}} xmm3 = xmm3[1,0,3,2,4,5,6,7]
 133 ; CHECK-NOSSSE3-NEXT:    pshufhw {{.*#+}} xmm3 = xmm3[0,1,2,3,5,4,7,6]
 134 ; CHECK-NOSSSE3-NEXT:    punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1],xmm1[2],xmm2[2],xmm1[3],xmm2[3],xmm1[4],xmm2[4],xmm1[5],xmm2[5],xmm1[6],xmm2[6],xmm1[7],xmm2[7]
 135 ; CHECK-NOSSSE3-NEXT:    pshuflw {{.*#+}} xmm1 = xmm1[1,0,3,2,4,5,6,7]
 136 ; CHECK-NOSSSE3-NEXT:    pshufhw {{.*#+}} xmm1 = xmm1[0,1,2,3,5,4,7,6]
 137 ; CHECK-NOSSSE3-NEXT:    packuswb %xmm3, %xmm1
 138 ; CHECK-NOSSSE3-NEXT:    retq
 139 ;
 140 ; CHECK-SSSE3-LABEL: test4:
 141 ; CHECK-SSSE3:       # BB#0: # %entry
 142 ; CHECK-SSSE3-NEXT:    movdqa {{.*#+}} xmm2 = [1,0,3,2,5,4,7,6,9,8,11,10,13,12,15,14]
 143 ; CHECK-SSSE3-NEXT:    pshufb %xmm2, %xmm0
 144 ; CHECK-SSSE3-NEXT:    pshufb %xmm2, %xmm1
 145 ; CHECK-SSSE3-NEXT:    retq
 146 ;
 147 ; CHECK-AVX2-LABEL: test4:
 148 ; CHECK-AVX2:       # BB#0: # %entry
 149 ; CHECK-AVX2-NEXT:    vpshufb {{.*#+}} ymm0 = ymm0[1,0,3,2,5,4,7,6,9,8,11,10,13,12,15,14,17,16,19,18,21,20,23,22,25,24,27,26,29,28,31,30]
 150 ; CHECK-AVX2-NEXT:    retq
 151 ;
 152 ; CHECK-WIDE-AVX2-LABEL: test4:
 153 ; CHECK-WIDE-AVX2:       # BB#0: # %entry
 154 ; CHECK-WIDE-AVX2-NEXT:    vpshufb {{.*#+}} ymm0 = ymm0[1,0,3,2,5,4,7,6,9,8,11,10,13,12,15,14,17,16,19,18,21,20,23,22,25,24,27,26,29,28,31,30]
 155 ; CHECK-WIDE-AVX2-NEXT:    retq
 156 entry:
 157   %r = call <16 x i16> @llvm.bswap.v16i16(<16 x i16> %v)
 158   ret <16 x i16> %r
 159 }
 160
 161 define <8 x i32> @test5(<8 x i32> %v) {
 162 ; CHECK-NOSSSE3-LABEL: test5:
 163 ; CHECK-NOSSSE3:       # BB#0: # %entry
 164 ; CHECK-NOSSSE3-NEXT:    pxor %xmm2, %xmm2
 165 ; CHECK-NOSSSE3-NEXT:    movdqa %xmm0, %xmm3
 166 ; CHECK-NOSSSE3-NEXT:    punpckhbw {{.*#+}} xmm3 = xmm3[8],xmm2[8],xmm3[9],xmm2[9],xmm3[10],xmm2[10],xmm3[11],xmm2[11],xmm3[12],xmm2[12],xmm3[13],xmm2[13],xmm3[14],xmm2[14],xmm3[15],xmm2[15]
 167 ; CHECK-NOSSSE3-NEXT:    pshuflw {{.*#+}} xmm3 = xmm3[3,2,1,0,4,5,6,7]
 168 ; CHECK-NOSSSE3-NEXT:    pshufhw {{.*#+}} xmm3 = xmm3[0,1,2,3,7,6,5,4]
 169 ; CHECK-NOSSSE3-NEXT:    punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3],xmm0[4],xmm2[4],xmm0[5],xmm2[5],xmm0[6],xmm2[6],xmm0[7],xmm2[7]
 170 ; CHECK-NOSSSE3-NEXT:    pshuflw {{.*#+}} xmm0 = xmm0[3,2,1,0,4,5,6,7]
 171 ; CHECK-NOSSSE3-NEXT:    pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,7,6,5,4]
 172 ; CHECK-NOSSSE3-NEXT:    packuswb %xmm3, %xmm0
 173 ; CHECK-NOSSSE3-NEXT:    movdqa %xmm1, %xmm3
 174 ; CHECK-NOSSSE3-NEXT:    punpckhbw {{.*#+}} xmm3 = xmm3[8],xmm2[8],xmm3[9],xmm2[9],xmm3[10],xmm2[10],xmm3[11],xmm2[11],xmm3[12],xmm2[12],xmm3[13],xmm2[13],xmm3[14],xmm2[14],xmm3[15],xmm2[15]
 175 ; CHECK-NOSSSE3-NEXT:    pshuflw {{.*#+}} xmm3 = xmm3[3,2,1,0,4,5,6,7]
 176 ; CHECK-NOSSSE3-NEXT:    pshufhw {{.*#+}} xmm3 = xmm3[0,1,2,3,7,6,5,4]
 177 ; CHECK-NOSSSE3-NEXT:    punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1],xmm1[2],xmm2[2],xmm1[3],xmm2[3],xmm1[4],xmm2[4],xmm1[5],xmm2[5],xmm1[6],xmm2[6],xmm1[7],xmm2[7]
 178 ; CHECK-NOSSSE3-NEXT:    pshuflw {{.*#+}} xmm1 = xmm1[3,2,1,0,4,5,6,7]
 179 ; CHECK-NOSSSE3-NEXT:    pshufhw {{.*#+}} xmm1 = xmm1[0,1,2,3,7,6,5,4]
 180 ; CHECK-NOSSSE3-NEXT:    packuswb %xmm3, %xmm1
 181 ; CHECK-NOSSSE3-NEXT:    retq
 182 ;
 183 ; CHECK-SSSE3-LABEL: test5:
 184 ; CHECK-SSSE3:       # BB#0: # %entry
 185 ; CHECK-SSSE3-NEXT:    movdqa {{.*#+}} xmm2 = [3,2,1,0,7,6,5,4,11,10,9,8,15,14,13,12]
 186 ; CHECK-SSSE3-NEXT:    pshufb %xmm2, %xmm0
 187 ; CHECK-SSSE3-NEXT:    pshufb %xmm2, %xmm1
 188 ; CHECK-SSSE3-NEXT:    retq
 189 ;
 190 ; CHECK-AVX2-LABEL: test5:
 191 ; CHECK-AVX2:       # BB#0: # %entry
 192 ; CHECK-AVX2-NEXT:    vpshufb {{.*#+}} ymm0 = ymm0[3,2,1,0,7,6,5,4,11,10,9,8,15,14,13,12,19,18,17,16,23,22,21,20,27,26,25,24,31,30,29,28]
 193 ; CHECK-AVX2-NEXT:    retq
 194 ;
 195 ; CHECK-WIDE-AVX2-LABEL: test5:
 196 ; CHECK-WIDE-AVX2:       # BB#0: # %entry
 197 ; CHECK-WIDE-AVX2-NEXT:    vpshufb {{.*#+}} ymm0 = ymm0[3,2,1,0,7,6,5,4,11,10,9,8,15,14,13,12,19,18,17,16,23,22,21,20,27,26,25,24,31,30,29,28]
 198 ; CHECK-WIDE-AVX2-NEXT:    retq
 199 entry:
 200   %r = call <8 x i32> @llvm.bswap.v8i32(<8 x i32> %v)
 201   ret <8 x i32> %r
 202 }
 203
 204 define <4 x i64> @test6(<4 x i64> %v) {
 205 ; CHECK-NOSSSE3-LABEL: test6:
 206 ; CHECK-NOSSSE3:       # BB#0: # %entry
 207 ; CHECK-NOSSSE3-NEXT:    pxor %xmm2, %xmm2
 208 ; CHECK-NOSSSE3-NEXT:    movdqa %xmm0, %xmm3
 209 ; CHECK-NOSSSE3-NEXT:    punpckhbw {{.*#+}} xmm3 = xmm3[8],xmm2[8],xmm3[9],xmm2[9],xmm3[10],xmm2[10],xmm3[11],xmm2[11],xmm3[12],xmm2[12],xmm3[13],xmm2[13],xmm3[14],xmm2[14],xmm3[15],xmm2[15]
 210 ; CHECK-NOSSSE3-NEXT:    pshufd {{.*#+}} xmm3 = xmm3[2,3,0,1]
 211 ; CHECK-NOSSSE3-NEXT:    pshuflw {{.*#+}} xmm3 = xmm3[3,2,1,0,4,5,6,7]
 212 ; CHECK-NOSSSE3-NEXT:    pshufhw {{.*#+}} xmm3 = xmm3[0,1,2,3,7,6,5,4]
 213 ; CHECK-NOSSSE3-NEXT:    punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3],xmm0[4],xmm2[4],xmm0[5],xmm2[5],xmm0[6],xmm2[6],xmm0[7],xmm2[7]
 214 ; CHECK-NOSSSE3-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1]
 215 ; CHECK-NOSSSE3-NEXT:    pshuflw {{.*#+}} xmm0 = xmm0[3,2,1,0,4,5,6,7]
 216 ; CHECK-NOSSSE3-NEXT:    pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,7,6,5,4]
 217 ; CHECK-NOSSSE3-NEXT:    packuswb %xmm3, %xmm0
 218 ; CHECK-NOSSSE3-NEXT:    movdqa %xmm1, %xmm3
 219 ; CHECK-NOSSSE3-NEXT:    punpckhbw {{.*#+}} xmm3 = xmm3[8],xmm2[8],xmm3[9],xmm2[9],xmm3[10],xmm2[10],xmm3[11],xmm2[11],xmm3[12],xmm2[12],xmm3[13],xmm2[13],xmm3[14],xmm2[14],xmm3[15],xmm2[15]
 220 ; CHECK-NOSSSE3-NEXT:    pshufd {{.*#+}} xmm3 = xmm3[2,3,0,1]
 221 ; CHECK-NOSSSE3-NEXT:    pshuflw {{.*#+}} xmm3 = xmm3[3,2,1,0,4,5,6,7]
 222 ; CHECK-NOSSSE3-NEXT:    pshufhw {{.*#+}} xmm3 = xmm3[0,1,2,3,7,6,5,4]
 223 ; CHECK-NOSSSE3-NEXT:    punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1],xmm1[2],xmm2[2],xmm1[3],xmm2[3],xmm1[4],xmm2[4],xmm1[5],xmm2[5],xmm1[6],xmm2[6],xmm1[7],xmm2[7]
 224 ; CHECK-NOSSSE3-NEXT:    pshufd {{.*#+}} xmm1 = xmm1[2,3,0,1]
 225 ; CHECK-NOSSSE3-NEXT:    pshuflw {{.*#+}} xmm1 = xmm1[3,2,1,0,4,5,6,7]
 226 ; CHECK-NOSSSE3-NEXT:    pshufhw {{.*#+}} xmm1 = xmm1[0,1,2,3,7,6,5,4]
 227 ; CHECK-NOSSSE3-NEXT:    packuswb %xmm3, %xmm1
 228 ; CHECK-NOSSSE3-NEXT:    retq
 229 ;
 230 ; CHECK-SSSE3-LABEL: test6:
 231 ; CHECK-SSSE3:       # BB#0: # %entry
 232 ; CHECK-SSSE3-NEXT:    movdqa {{.*#+}} xmm2 = [7,6,5,4,3,2,1,0,15,14,13,12,11,10,9,8]
 233 ; CHECK-SSSE3-NEXT:    pshufb %xmm2, %xmm0
 234 ; CHECK-SSSE3-NEXT:    pshufb %xmm2, %xmm1
 235 ; CHECK-SSSE3-NEXT:    retq
 236 ;
 237 ; CHECK-AVX2-LABEL: test6:
 238 ; CHECK-AVX2:       # BB#0: # %entry
 239 ; CHECK-AVX2-NEXT:    vpshufb {{.*#+}} ymm0 = ymm0[7,6,5,4,3,2,1,0,15,14,13,12,11,10,9,8,23,22,21,20,19,18,17,16,31,30,29,28,27,26,25,24]
 240 ; CHECK-AVX2-NEXT:    retq
 241 ;
 242 ; CHECK-WIDE-AVX2-LABEL: test6:
 243 ; CHECK-WIDE-AVX2:       # BB#0: # %entry
 244 ; CHECK-WIDE-AVX2-NEXT:    vpshufb {{.*#+}} ymm0 = ymm0[7,6,5,4,3,2,1,0,15,14,13,12,11,10,9,8,23,22,21,20,19,18,17,16,31,30,29,28,27,26,25,24]
 245 ; CHECK-WIDE-AVX2-NEXT:    retq
 246 entry:
 247   %r = call <4 x i64> @llvm.bswap.v4i64(<4 x i64> %v)
 248   ret <4 x i64> %r
 249 }
 250
 251 declare <4 x i16> @llvm.bswap.v4i16(<4 x i16>)
 252
 253 define <4 x i16> @test7(<4 x i16> %v) {
 254 ; CHECK-NOSSSE3-LABEL: test7:
 255 ; CHECK-NOSSSE3:       # BB#0: # %entry
 256 ; CHECK-NOSSSE3-NEXT:    pxor %xmm1, %xmm1
 257 ; CHECK-NOSSSE3-NEXT:    movdqa %xmm0, %xmm2
 258 ; CHECK-NOSSSE3-NEXT:    punpckhbw {{.*#+}} xmm2 = xmm2[8],xmm1[8],xmm2[9],xmm1[9],xmm2[10],xmm1[10],xmm2[11],xmm1[11],xmm2[12],xmm1[12],xmm2[13],xmm1[13],xmm2[14],xmm1[14],xmm2[15],xmm1[15]
 259 ; CHECK-NOSSSE3-NEXT:    pshuflw {{.*#+}} xmm2 = xmm2[3,2,1,0,4,5,6,7]
 260 ; CHECK-NOSSSE3-NEXT:    pshufhw {{.*#+}} xmm2 = xmm2[0,1,2,3,7,6,5,4]
 261 ; CHECK-NOSSSE3-NEXT:    punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3],xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7]
 262 ; CHECK-NOSSSE3-NEXT:    pshuflw {{.*#+}} xmm0 = xmm0[3,2,1,0,4,5,6,7]
 263 ; CHECK-NOSSSE3-NEXT:    pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,7,6,5,4]
 264 ; CHECK-NOSSSE3-NEXT:    packuswb %xmm2, %xmm0
 265 ; CHECK-NOSSSE3-NEXT:    psrld $16, %xmm0
 266 ; CHECK-NOSSSE3-NEXT:    retq
 267 ;
 268 ; CHECK-SSSE3-LABEL: test7:
 269 ; CHECK-SSSE3:       # BB#0: # %entry
 270 ; CHECK-SSSE3-NEXT:    pshufb {{.*#+}} xmm0 = xmm0[3,2,1,0,7,6,5,4,11,10,9,8,15,14,13,12]
 271 ; CHECK-SSSE3-NEXT:    psrld $16, %xmm0
 272 ; CHECK-SSSE3-NEXT:    retq
 273 ;
 274 ; CHECK-AVX2-LABEL: test7:
 275 ; CHECK-AVX2:       # BB#0: # %entry
 276 ; CHECK-AVX2-NEXT:    vpshufb {{.*#+}} xmm0 = xmm0[3,2,1,0,7,6,5,4,11,10,9,8,15,14,13,12]
 277 ; CHECK-AVX2-NEXT:    vpsrld $16, %xmm0, %xmm0
 278 ; CHECK-AVX2-NEXT:    retq
 279 ;
 280 ; CHECK-WIDE-AVX2-LABEL: test7:
 281 ; CHECK-WIDE-AVX2:       # BB#0: # %entry
 282 ; CHECK-WIDE-AVX2-NEXT:    vpshufb {{.*#+}} xmm0 = xmm0[1,0,3,2,5,4,7,6,9,8,11,10,13,12,15,14]
 283 ; CHECK-WIDE-AVX2-NEXT:    retq
 284 entry:
 285   %r = call <4 x i16> @llvm.bswap.v4i16(<4 x i16> %v)
 286   ret <4 x i16> %r
 287 }
 288
 289 ;
 290 ; Double BSWAP -> Identity
 291 ;
 292
 293 define <8 x i16> @identity_v8i16(<8 x i16> %v) {
 294 ; CHECK-ALL-LABEL: identity_v8i16:
 295 ; CHECK-ALL:       # BB#0: # %entry
 296 ; CHECK-ALL:         retq
 297 entry:
 298   %bs1 = call <8 x i16> @llvm.bswap.v8i16(<8 x i16> %v)
 299   %bs2 = call <8 x i16> @llvm.bswap.v8i16(<8 x i16> %bs1)
 300   ret <8 x i16> %bs2
 301 }
 302
 303 define <4 x i32> @identity_v4i32(<4 x i32> %v) {
 304 ; CHECK-ALL-LABEL: identity_v4i32:
 305 ; CHECK-ALL:       # BB#0: # %entry
 306 ; CHECK-ALL-NEXT:    retq
 307 entry:
 308   %bs1 = call <4 x i32> @llvm.bswap.v4i32(<4 x i32> %v)
 309   %bs2 = call <4 x i32> @llvm.bswap.v4i32(<4 x i32> %bs1)
 310   ret <4 x i32> %bs2
 311 }
 312
 313 define <2 x i64> @identity_v2i64(<2 x i64> %v) {
 314 ; CHECK-ALL-LABEL: identity_v2i64:
 315 ; CHECK-ALL:       # BB#0: # %entry
 316 ; CHECK-ALL-NEXT:    retq
 317 entry:
 318   %bs1 = call <2 x i64> @llvm.bswap.v2i64(<2 x i64> %v)
 319   %bs2 = call <2 x i64> @llvm.bswap.v2i64(<2 x i64> %bs1)
 320   ret <2 x i64> %bs2
 321 }
 322
 323 define <16 x i16> @identity_v16i16(<16 x i16> %v) {
 324 ; CHECK-ALL-LABEL: identity_v16i16:
 325 ; CHECK-ALL:       # BB#0: # %entry
 326 ; CHECK-ALL-NEXT:    retq
 327 entry:
 328   %bs1 = call <16 x i16> @llvm.bswap.v16i16(<16 x i16> %v)
 329   %bs2 = call <16 x i16> @llvm.bswap.v16i16(<16 x i16> %bs1)
 330   ret <16 x i16> %bs2
 331 }
 332
 333 define <8 x i32> @identity_v8i32(<8 x i32> %v) {
 334 ; CHECK-ALL-LABEL: identity_v8i32:
 335 ; CHECK-ALL:       # BB#0: # %entry
 336 ; CHECK-ALL-NEXT:    retq
 337 entry:
 338   %bs1 = call <8 x i32> @llvm.bswap.v8i32(<8 x i32> %v)
 339   %bs2 = call <8 x i32> @llvm.bswap.v8i32(<8 x i32> %bs1)
 340   ret <8 x i32> %bs2
 341 }
 342
 343 define <4 x i64> @identity_v4i64(<4 x i64> %v) {
 344 ; CHECK-ALL-LABEL: identity_v4i64:
 345 ; CHECK-ALL:       # BB#0: # %entry
 346 ; CHECK-ALL-NEXT:    retq
 347 entry:
 348   %bs1 = call <4 x i64> @llvm.bswap.v4i64(<4 x i64> %v)
 349   %bs2 = call <4 x i64> @llvm.bswap.v4i64(<4 x i64> %bs1)
 350   ret <4 x i64> %bs2
 351 }
 352
 353 define <4 x i16> @identity_v4i16(<4 x i16> %v) {
 354 ; CHECK-ALL-LABEL: identity_v4i16:
 355 ; CHECK-ALL:       # BB#0: # %entry
 356 ; CHECK-ALL-NEXT:    retq
 357 entry:
 358   %bs1 = call <4 x i16> @llvm.bswap.v4i16(<4 x i16> %v)
 359   %bs2 = call <4 x i16> @llvm.bswap.v4i16(<4 x i16> %bs1)
 360   ret <4 x i16> %bs2
 361 }
 362
 363 ;
 364 ; Constant Folding
 365 ;
 366
 367 define <8 x i16> @fold_v8i16() {
 368 ; CHECK-SSE-LABEL: fold_v8i16:
 369 ; CHECK-SSE:       # BB#0: # %entry
 370 ; CHECK-SSE-NEXT:    movaps {{.*#+}} xmm0 = [0,256,65535,512,65023,1024,64511,1536]
 371 ; CHECK-SSE-NEXT:    retq
 372 ;
 373 ; CHECK-AVX-LABEL: fold_v8i16:
 374 ; CHECK-AVX:       # BB#0: # %entry
 375 ; CHECK-AVX-NEXT:    vmovaps {{.*#+}} xmm0 = [0,256,65535,512,65023,1024,64511,1536]
 376 ; CHECK-AVX-NEXT:    retq
 377 entry:
 378   %r = call <8 x i16> @llvm.bswap.v8i16(<8 x i16> <i16 0, i16 1, i16 -1, i16 2, i16 -3, i16 4, i16 -5, i16 6>)
 379   ret <8 x i16> %r
 380 }
 381
 382 define <4 x i32> @fold_v4i32() {
 383 ; CHECK-SSE-LABEL: fold_v4i32:
 384 ; CHECK-SSE:       # BB#0: # %entry
 385 ; CHECK-SSE-NEXT:    movaps {{.*#+}} xmm0 = [0,4294967295,33554432,4261412863]
 386 ; CHECK-SSE-NEXT:    retq
 387 ;
 388 ; CHECK-AVX-LABEL: fold_v4i32:
 389 ; CHECK-AVX:       # BB#0: # %entry
 390 ; CHECK-AVX-NEXT:    vmovaps {{.*#+}} xmm0 = [0,4294967295,33554432,4261412863]
 391 ; CHECK-AVX-NEXT:    retq
 392 entry:
 393   %r = call <4 x i32> @llvm.bswap.v4i32(<4 x i32> <i32 0, i32 -1, i32 2, i32 -3>)
 394   ret <4 x i32> %r
 395 }
 396
 397 define <2 x i64> @fold_v2i64() {
 398 ; CHECK-SSE-LABEL: fold_v2i64:
 399 ; CHECK-SSE:       # BB#0: # %entry
 400 ; CHECK-SSE-NEXT:    movaps {{.*#+}} xmm0 = [18374686479671623680,18446744073709551615]
 401 ; CHECK-SSE-NEXT:    retq
 402 ;
 403 ; CHECK-AVX-LABEL: fold_v2i64:
 404 ; CHECK-AVX:       # BB#0: # %entry
 405 ; CHECK-AVX-NEXT:    vmovaps {{.*#+}} xmm0 = [18374686479671623680,18446744073709551615]
 406 ; CHECK-AVX-NEXT:    retq
 407 entry:
 408   %r = call <2 x i64> @llvm.bswap.v2i64(<2 x i64> <i64 255, i64 -1>)
 409   ret <2 x i64> %r
 410 }
 411
 412 define <16 x i16> @fold_v16i16() {
 413 ; CHECK-SSE-LABEL: fold_v16i16:
 414 ; CHECK-SSE:       # BB#0: # %entry
 415 ; CHECK-SSE-NEXT:    movaps {{.*#+}} xmm0 = [0,256,65535,512,65023,1024,64511,1536]
 416 ; CHECK-SSE-NEXT:    movaps {{.*#+}} xmm1 = [63999,2048,63487,2560,62975,3072,62463,3584]
 417 ; CHECK-SSE-NEXT:    retq
 418 ;
 419 ; CHECK-AVX-LABEL: fold_v16i16:
 420 ; CHECK-AVX:       # BB#0: # %entry
 421 ; CHECK-AVX-NEXT:    vmovaps {{.*#+}} ymm0 = [0,256,65535,512,65023,1024,64511,1536,63999,2048,63487,2560,62975,3072,62463,3584]
 422 ; CHECK-AVX-NEXT:    retq
 423 entry:
 424   %r = call <16 x i16> @llvm.bswap.v16i16(<16 x i16> <i16 0, i16 1, i16 -1, i16 2, i16 -3, i16 4, i16 -5, i16 6, i16 -7, i16 8, i16 -9, i16 10, i16 -11, i16 12, i16 -13, i16 14>)
 425   ret <16 x i16> %r
 426 }
 427
 428 define <8 x i32> @fold_v8i32() {
 429 ; CHECK-SSE-LABEL: fold_v8i32:
 430 ; CHECK-SSE:       # BB#0: # %entry
 431 ; CHECK-SSE-NEXT:    movaps {{.*#+}} xmm0 = [0,16777216,4294967295,33554432]
 432 ; CHECK-SSE-NEXT:    movaps {{.*#+}} xmm1 = [4261412863,67108864,4227858431,100663296]
 433 ; CHECK-SSE-NEXT:    retq
 434 ;
 435 ; CHECK-AVX-LABEL: fold_v8i32:
 436 ; CHECK-AVX:       # BB#0: # %entry
 437 ; CHECK-AVX-NEXT:    vmovaps {{.*#+}} ymm0 = [0,16777216,4294967295,33554432,4261412863,67108864,4227858431,100663296]
 438 ; CHECK-AVX-NEXT:    retq
 439 entry:
 440   %r = call <8 x i32> @llvm.bswap.v8i32(<8 x i32> <i32 0, i32 1, i32 -1, i32 2, i32 -3, i32 4, i32 -5, i32 6>)
 441   ret <8 x i32> %r
 442 }
 443
 444 define <4 x i64> @fold_v4i64() {
 445 ; CHECK-SSE-LABEL: fold_v4i64:
 446 ; CHECK-SSE:       # BB#0: # %entry
 447 ; CHECK-SSE-NEXT:    movaps {{.*#+}} xmm0 = [18374686479671623680,18446744073709551615]
 448 ; CHECK-SSE-NEXT:    movaps {{.*#+}} xmm1 = [18446462598732840960,72056494526300160]
 449 ; CHECK-SSE-NEXT:    retq
 450 ;
 451 ; CHECK-AVX-LABEL: fold_v4i64:
 452 ; CHECK-AVX:       # BB#0: # %entry
 453 ; CHECK-AVX-NEXT:    vmovaps {{.*#+}} ymm0 = [18374686479671623680,18446744073709551615,18446462598732840960,72056494526300160]
 454 ; CHECK-AVX-NEXT:    retq
 455 entry:
 456   %r = call <4 x i64> @llvm.bswap.v4i64(<4 x i64> <i64 255, i64 -1, i64 65535, i64 16776960>)
 457   ret <4 x i64> %r
 458 }