1 ; RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI --check-prefix=CHECK %s
2 ; RUN: llc -march=r600 -mcpu=bonaire -verify-machineinstrs < %s | FileCheck -check-prefix=CI --check-prefix=CHECK %s
4 declare i32 @llvm.r600.read.tidig.x() #0
5 declare void @llvm.AMDGPU.barrier.local() #1
7 ; Function Attrs: nounwind
8 ; CHECK-LABEL: {{^}}signed_ds_offset_addressing_loop:
10 ; CHECK: V_ADD_I32_e32 [[VADDR:v[0-9]+]],
11 ; SI-DAG: DS_READ_B32 v{{[0-9]+}}, [[VADDR]], 0x0
12 ; SI-DAG: V_ADD_I32_e32 [[VADDR4:v[0-9]+]], 4, [[VADDR]]
13 ; SI-DAG: DS_READ_B32 v{{[0-9]+}}, [[VADDR4]], 0x0
14 ; SI-DAG: V_ADD_I32_e32 [[VADDR0x80:v[0-9]+]], 0x80, [[VADDR]]
15 ; SI-DAG: DS_READ_B32 v{{[0-9]+}}, [[VADDR0x80]], 0x0
16 ; SI-DAG: V_ADD_I32_e32 [[VADDR0x84:v[0-9]+]], 0x84, [[VADDR]]
17 ; SI-DAG: DS_READ_B32 v{{[0-9]+}}, [[VADDR0x84]], 0x0
18 ; SI-DAG: V_ADD_I32_e32 [[VADDR0x100:v[0-9]+]], 0x100, [[VADDR]]
19 ; SI-DAG: DS_READ_B32 v{{[0-9]+}}, [[VADDR0x100]], 0x0
21 ; CI-DAG: DS_READ_B32 v{{[0-9]+}}, [[VADDR]], 0x0
22 ; CI-DAG: DS_READ_B32 v{{[0-9]+}}, [[VADDR]], 0x4
23 ; CI-DAG: DS_READ_B32 v{{[0-9]+}}, [[VADDR]], 0x80
24 ; CI-DAG: DS_READ_B32 v{{[0-9]+}}, [[VADDR]], 0x84
25 ; CI-DAG: DS_READ_B32 v{{[0-9]+}}, [[VADDR]], 0x100
27 define void @signed_ds_offset_addressing_loop(float addrspace(1)* noalias nocapture %out, float addrspace(3)* noalias nocapture readonly %lptr, i32 %n) #2 {
29 %x.i = tail call i32 @llvm.r600.read.tidig.x() #0
30 %mul = shl nsw i32 %x.i, 1
33 for.body: ; preds = %for.body, %entry
34 %sum.03 = phi float [ 0.000000e+00, %entry ], [ %add13, %for.body ]
35 %offset.02 = phi i32 [ %mul, %entry ], [ %add14, %for.body ]
36 %k.01 = phi i32 [ 0, %entry ], [ %inc, %for.body ]
37 tail call void @llvm.AMDGPU.barrier.local() #1
38 %arrayidx = getelementptr inbounds float addrspace(3)* %lptr, i32 %offset.02
39 %tmp = load float addrspace(3)* %arrayidx, align 4
40 %add1 = add nsw i32 %offset.02, 1
41 %arrayidx2 = getelementptr inbounds float addrspace(3)* %lptr, i32 %add1
42 %tmp1 = load float addrspace(3)* %arrayidx2, align 4
43 %add3 = add nsw i32 %offset.02, 32
44 %arrayidx4 = getelementptr inbounds float addrspace(3)* %lptr, i32 %add3
45 %tmp2 = load float addrspace(3)* %arrayidx4, align 4
46 %add5 = add nsw i32 %offset.02, 33
47 %arrayidx6 = getelementptr inbounds float addrspace(3)* %lptr, i32 %add5
48 %tmp3 = load float addrspace(3)* %arrayidx6, align 4
49 %add7 = add nsw i32 %offset.02, 64
50 %arrayidx8 = getelementptr inbounds float addrspace(3)* %lptr, i32 %add7
51 %tmp4 = load float addrspace(3)* %arrayidx8, align 4
52 %add9 = fadd float %tmp, %tmp1
53 %add10 = fadd float %add9, %tmp2
54 %add11 = fadd float %add10, %tmp3
55 %add12 = fadd float %add11, %tmp4
56 %add13 = fadd float %sum.03, %add12
57 %inc = add nsw i32 %k.01, 1
58 %add14 = add nsw i32 %offset.02, 97
59 %exitcond = icmp eq i32 %inc, 8
60 br i1 %exitcond, label %for.end, label %for.body
62 for.end: ; preds = %for.body
63 %tmp5 = sext i32 %x.i to i64
64 %arrayidx15 = getelementptr inbounds float addrspace(1)* %out, i64 %tmp5
65 store float %add13, float addrspace(1)* %arrayidx15, align 4
69 attributes #0 = { nounwind readnone }
70 attributes #1 = { noduplicate nounwind }
71 attributes #2 = { nounwind "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }