[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
[oota-llvm.git] / test / CodeGen / Mips / const6a.ll
1 ; RUN: llc -mtriple=mipsel-linux-gnu -march=mipsel -mattr=mips16 -mattr=+soft-float -mips16-hard-float -relocation-model=pic -mips16-constant-islands   < %s | FileCheck %s -check-prefix=load-relax1
2
3 ; RUN: llc -mtriple=mipsel-linux-gnu -march=mipsel -mattr=mips16 -mattr=+soft-float -mips16-hard-float -relocation-model=pic -mips16-constant-islands   < %s | FileCheck %s -check-prefix=load-relax
4
5 ; ModuleID = 'const6a.c'
6 target datalayout = "E-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32-S64"
7 target triple = "mips--linux-gnu"
8
9 @i = common global i32 0, align 4
10
11 ; Function Attrs: nounwind
12 define void @t() #0 {
13 entry:
14   store i32 -559023410, i32* @i, align 4
15 ; load-relax-NOT:       lw      ${{[0-9]+}}, $CPI0_0 # 16 bit inst
16 ; load-relax1: lw       ${{[0-9]+}}, $CPI0_0
17 ; load-relax:   jrc      $ra
18 ; load-relax:   .align  2
19 ; load-relax: $CPI0_0:
20 ; load-relax:   .4byte  3735943886
21 ; load-relax:   .end    t
22   call void asm sideeffect ".space 10000", ""() #1, !srcloc !1
23   ret void
24 }
25
26 attributes #0 = { nounwind "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="true" }
27 attributes #1 = { nounwind }
28
29 !1 = !{i32 121}