1 ; RUN: llc -march=mips -relocation-model=static < %s | FileCheck --check-prefix=ALL --check-prefix=SYM32 --check-prefix=O32 --check-prefix=O32BE %s
2 ; RUN: llc -march=mipsel -relocation-model=static < %s | FileCheck --check-prefix=ALL --check-prefix=SYM32 --check-prefix=O32 --check-prefix=O32LE %s
4 ; RUN-TODO: llc -march=mips64 -relocation-model=static -mattr=-n64,+o32 < %s | FileCheck --check-prefix=ALL --check-prefix=SYM32 --check-prefix=O32 %s
5 ; RUN-TODO: llc -march=mips64el -relocation-model=static -mattr=-n64,+o32 < %s | FileCheck --check-prefix=ALL --check-prefix=SYM32 --check-prefix=O32 %s
7 ; RUN: llc -march=mips64 -relocation-model=static -mattr=-n64,+n32 < %s | FileCheck --check-prefix=ALL --check-prefix=SYM32 --check-prefix=N32 --check-prefix=NEW --check-prefix=NEWBE %s
8 ; RUN: llc -march=mips64el -relocation-model=static -mattr=-n64,+n32 < %s | FileCheck --check-prefix=ALL --check-prefix=SYM32 --check-prefix=N32 --check-prefix=NEW --check-prefix=NEWLE %s
10 ; RUN: llc -march=mips64 -relocation-model=static -mattr=-n64,+n64 < %s | FileCheck --check-prefix=ALL --check-prefix=SYM64 --check-prefix=N64 --check-prefix=NEW --check-prefix=NEWBE %s
11 ; RUN: llc -march=mips64el -relocation-model=static -mattr=-n64,+n64 < %s | FileCheck --check-prefix=ALL --check-prefix=SYM64 --check-prefix=N64 --check-prefix=NEW --check-prefix=NEWLE %s
13 ; Test the effect of varargs on floating point types in the non-variable part
14 ; of the argument list as specified by section 2 of the MIPSpro N32 Handbook.
16 ; N32/N64 are almost identical in this area so many of their checks have been
17 ; combined into the 'NEW' prefix (the N stands for New).
19 ; On O32, varargs prevents all FPU argument register usage. This contradicts
20 ; the N32 handbook, but agrees with the SYSV ABI and GCC's behaviour.
22 @floats = global [11 x float] zeroinitializer
23 @doubles = global [11 x double] zeroinitializer
25 define void @double_args(double %a, ...)
28 %0 = getelementptr [11 x double]* @doubles, i32 0, i32 1
29 store volatile double %a, double* %0
32 %ap2 = bitcast i8** %ap to i8*
33 call void @llvm.va_start(i8* %ap2)
34 %b = va_arg i8** %ap, double
35 %1 = getelementptr [11 x double]* @doubles, i32 0, i32 2
36 store volatile double %b, double* %1
37 call void @llvm.va_end(i8* %ap2)
41 ; ALL-LABEL: double_args:
42 ; We won't test the way the global address is calculated in this test. This is
43 ; just to get the register number for the other checks.
44 ; SYM32-DAG: addiu [[R2:\$[0-9]+]], ${{[0-9]+}}, %lo(doubles)
45 ; SYM64-DAG: ld [[R2:\$[0-9]]], %got_disp(doubles)(
47 ; O32 forbids using floating point registers for the non-variable portion.
49 ; O32BE-DAG: mtc1 $5, [[FTMP1:\$f[0-9]*[02468]+]]
50 ; O32BE-DAG: mtc1 $4, [[FTMP2:\$f[0-9]*[13579]+]]
51 ; O32LE-DAG: mtc1 $4, [[FTMP1:\$f[0-9]*[02468]+]]
52 ; O32LE-DAG: mtc1 $5, [[FTMP2:\$f[0-9]*[13579]+]]
53 ; O32-DAG: sdc1 [[FTMP1]], 8([[R2]])
54 ; NEW-DAG: sdc1 $f12, 8([[R2]])
56 ; The varargs portion is dumped to stack
57 ; O32-DAG: sw $6, 16($sp)
58 ; O32-DAG: sw $7, 20($sp)
59 ; NEW-DAG: sd $5, 8($sp)
60 ; NEW-DAG: sd $6, 16($sp)
61 ; NEW-DAG: sd $7, 24($sp)
62 ; NEW-DAG: sd $8, 32($sp)
63 ; NEW-DAG: sd $9, 40($sp)
64 ; NEW-DAG: sd $10, 48($sp)
65 ; NEW-DAG: sd $11, 56($sp)
67 ; Get the varargs pointer
68 ; O32 has 4 bytes padding, 4 bytes for the varargs pointer, and 8 bytes reserved
69 ; for arguments 1 and 2.
70 ; N32/N64 has 8 bytes for the varargs pointer, and no reserved area.
71 ; O32-DAG: addiu [[VAPTR:\$[0-9]+]], $sp, 16
72 ; O32-DAG: sw [[VAPTR]], 4($sp)
73 ; N32-DAG: addiu [[VAPTR:\$[0-9]+]], $sp, 8
74 ; N32-DAG: sw [[VAPTR]], 4($sp)
75 ; N64-DAG: daddiu [[VAPTR:\$[0-9]+]], $sp, 8
76 ; N64-DAG: sd [[VAPTR]], 0($sp)
78 ; Increment the pointer then get the varargs arg
79 ; LLVM will rebind the load to the stack pointer instead of the varargs pointer
80 ; during lowering. This is fine and doesn't change the behaviour.
81 ; O32-DAG: addiu [[VAPTR]], [[VAPTR]], 8
82 ; O32-DAG: sw [[VAPTR]], 4($sp)
83 ; N32-DAG: addiu [[VAPTR]], [[VAPTR]], 8
84 ; N32-DAG: sw [[VAPTR]], 4($sp)
85 ; N64-DAG: daddiu [[VAPTR]], [[VAPTR]], 8
86 ; N64-DAG: sd [[VAPTR]], 0($sp)
87 ; O32-DAG: ldc1 [[FTMP1:\$f[0-9]+]], 16($sp)
88 ; NEW-DAG: ldc1 [[FTMP1:\$f[0-9]+]], 8($sp)
89 ; ALL-DAG: sdc1 [[FTMP1]], 16([[R2]])
91 define void @float_args(float %a, ...) nounwind {
93 %0 = getelementptr [11 x float]* @floats, i32 0, i32 1
94 store volatile float %a, float* %0
97 %ap2 = bitcast i8** %ap to i8*
98 call void @llvm.va_start(i8* %ap2)
99 %b = va_arg i8** %ap, float
100 %1 = getelementptr [11 x float]* @floats, i32 0, i32 2
101 store volatile float %b, float* %1
102 call void @llvm.va_end(i8* %ap2)
106 ; ALL-LABEL: float_args:
107 ; We won't test the way the global address is calculated in this test. This is
108 ; just to get the register number for the other checks.
109 ; SYM32-DAG: addiu [[R2:\$[0-9]+]], ${{[0-9]+}}, %lo(floats)
110 ; SYM64-DAG: ld [[R2:\$[0-9]]], %got_disp(floats)(
112 ; The first four arguments are the same in O32/N32/N64.
113 ; The non-variable portion should be unaffected.
114 ; O32-DAG: sw $4, 4([[R2]])
115 ; NEW-DAG: swc1 $f12, 4([[R2]])
117 ; The varargs portion is dumped to stack
118 ; O32-DAG: sw $5, 12($sp)
119 ; O32-DAG: sw $6, 16($sp)
120 ; O32-DAG: sw $7, 20($sp)
121 ; NEW-DAG: sd $5, 8($sp)
122 ; NEW-DAG: sd $6, 16($sp)
123 ; NEW-DAG: sd $7, 24($sp)
124 ; NEW-DAG: sd $8, 32($sp)
125 ; NEW-DAG: sd $9, 40($sp)
126 ; NEW-DAG: sd $10, 48($sp)
127 ; NEW-DAG: sd $11, 56($sp)
129 ; Get the varargs pointer
130 ; O32 has 4 bytes padding, 4 bytes for the varargs pointer, and should have 8
131 ; bytes reserved for arguments 1 and 2 (the first float arg) but as discussed in
132 ; arguments-float.ll, GCC doesn't agree with MD00305 and treats floats as 4
133 ; bytes so we only have 12 bytes total.
134 ; N32/N64 has 8 bytes for the varargs pointer, and no reserved area.
135 ; O32-DAG: addiu [[VAPTR:\$[0-9]+]], $sp, 12
136 ; O32-DAG: sw [[VAPTR]], 4($sp)
137 ; N32-DAG: addiu [[VAPTR:\$[0-9]+]], $sp, 8
138 ; N32-DAG: sw [[VAPTR]], 4($sp)
139 ; N64-DAG: daddiu [[VAPTR:\$[0-9]+]], $sp, 8
140 ; N64-DAG: sd [[VAPTR]], 0($sp)
142 ; Increment the pointer then get the varargs arg
143 ; LLVM will rebind the load to the stack pointer instead of the varargs pointer
144 ; during lowering. This is fine and doesn't change the behaviour.
145 ; Also, in big-endian mode the offset must be increased by 4 to retrieve the
146 ; correct half of the argument slot.
148 ; O32-DAG: addiu [[VAPTR]], [[VAPTR]], 4
149 ; O32-DAG: sw [[VAPTR]], 4($sp)
150 ; N32-DAG: addiu [[VAPTR]], [[VAPTR]], 8
151 ; N32-DAG: sw [[VAPTR]], 4($sp)
152 ; N64-DAG: daddiu [[VAPTR]], [[VAPTR]], 8
153 ; N64-DAG: sd [[VAPTR]], 0($sp)
154 ; O32-DAG: lwc1 [[FTMP1:\$f[0-9]+]], 12($sp)
155 ; NEWLE-DAG: lwc1 [[FTMP1:\$f[0-9]+]], 8($sp)
156 ; NEWBE-DAG: lwc1 [[FTMP1:\$f[0-9]+]], 12($sp)
157 ; ALL-DAG: swc1 [[FTMP1]], 8([[R2]])
159 declare void @llvm.va_start(i8*)
160 declare void @llvm.va_copy(i8*, i8*)
161 declare void @llvm.va_end(i8*)