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HEAD
MIR Serialization: Serialize the machine basic block live in registers.
[oota-llvm.git]
/
test
/
CodeGen
/
MIR
/
X86
/
expected-named-register-livein.mir
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# RUN: not llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
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--- |
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define i32 @test(i32 %a) {
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body:
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ret i32 %a
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}
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...
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---
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name: test
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body:
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- id: 0
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name: body
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# CHECK: [[@LINE+1]]:21: expected a named register
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liveins: [ '%0' ]
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instructions:
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- '%eax = COPY %edi'
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- 'RETQ %eax'
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...