1 //===-- X86/MachineCodeEmitter.cpp - Convert X86 code to machine code -----===//
3 // This file contains the pass that transforms the X86 machine instructions into
4 // actual executable machine code.
6 //===----------------------------------------------------------------------===//
8 #include "X86TargetMachine.h"
10 #include "llvm/PassManager.h"
11 #include "llvm/CodeGen/MachineCodeEmitter.h"
12 #include "llvm/CodeGen/MachineFunction.h"
13 #include "llvm/CodeGen/MachineInstr.h"
16 class Emitter : public FunctionPass {
18 const X86InstrInfo ⅈ
19 MachineCodeEmitter &MCE;
22 Emitter(X86TargetMachine &tm, MachineCodeEmitter &mce)
23 : TM(tm), II(TM.getInstrInfo()), MCE(mce) {}
25 bool runOnFunction(Function &F);
28 void emitBasicBlock(MachineBasicBlock &MBB);
29 void emitInstruction(MachineInstr &MI);
31 void emitRegModRMByte(unsigned ModRMReg, unsigned RegOpcodeField);
32 void emitSIBByte(unsigned SS, unsigned Index, unsigned Base);
33 void emitConstant(unsigned Val, unsigned Size);
35 void emitMemModRMByte(const MachineInstr &MI,
36 unsigned Op, unsigned RegOpcodeField);
42 /// addPassesToEmitMachineCode - Add passes to the specified pass manager to get
43 /// machine code emitted. This uses a MAchineCodeEmitter object to handle
44 /// actually outputting the machine code and resolving things like the address
45 /// of functions. This method should returns true if machine code emission is
48 bool X86TargetMachine::addPassesToEmitMachineCode(PassManager &PM,
49 MachineCodeEmitter &MCE) {
50 PM.add(new Emitter(*this, MCE));
54 bool Emitter::runOnFunction(Function &F) {
55 MachineFunction &MF = MachineFunction::get(&F);
57 MCE.startFunction(MF);
58 for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ++I)
60 MCE.finishFunction(MF);
64 void Emitter::emitBasicBlock(MachineBasicBlock &MBB) {
65 MCE.startBasicBlock(MBB);
66 for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end(); I != E; ++I)
71 namespace N86 { // Native X86 Register numbers...
73 EAX = 0, ECX = 1, EDX = 2, EBX = 3, ESP = 4, EBP = 5, ESI = 6, EDI = 7
78 // getX86RegNum - This function maps LLVM register identifiers to their X86
79 // specific numbering, which is used in various places encoding instructions.
81 static unsigned getX86RegNum(unsigned RegNo) {
83 case X86::EAX: case X86::AX: case X86::AL: return N86::EAX;
84 case X86::ECX: case X86::CX: case X86::CL: return N86::ECX;
85 case X86::EDX: case X86::DX: case X86::DL: return N86::EDX;
86 case X86::EBX: case X86::BX: case X86::BL: return N86::EBX;
87 case X86::ESP: case X86::SP: case X86::AH: return N86::ESP;
88 case X86::EBP: case X86::BP: case X86::CH: return N86::EBP;
89 case X86::ESI: case X86::SI: case X86::DH: return N86::ESI;
90 case X86::EDI: case X86::DI: case X86::BH: return N86::EDI;
92 assert(RegNo >= MRegisterInfo::FirstVirtualRegister &&
93 "Unknown physical register!");
94 assert(0 && "Register allocator hasn't allocated reg correctly yet!");
99 inline static unsigned char ModRMByte(unsigned Mod, unsigned RegOpcode,
101 assert(Mod < 4 && RegOpcode < 8 && RM < 8 && "ModRM Fields out of range!");
102 return RM | (RegOpcode << 3) | (Mod << 6);
105 void Emitter::emitRegModRMByte(unsigned ModRMReg, unsigned RegOpcodeFld){
106 MCE.emitByte(ModRMByte(3, RegOpcodeFld, getX86RegNum(ModRMReg)));
109 void Emitter::emitSIBByte(unsigned SS, unsigned Index, unsigned Base) {
110 // SIB byte is in the same format as the ModRMByte...
111 MCE.emitByte(ModRMByte(SS, Index, Base));
114 void Emitter::emitConstant(unsigned Val, unsigned Size) {
115 // Output the constant in little endian byte order...
116 for (unsigned i = 0; i != Size; ++i) {
117 MCE.emitByte(Val & 255);
122 static bool isDisp8(int Value) {
123 return Value == (signed char)Value;
126 void Emitter::emitMemModRMByte(const MachineInstr &MI,
127 unsigned Op, unsigned RegOpcodeField) {
128 const MachineOperand &BaseReg = MI.getOperand(Op);
129 const MachineOperand &Scale = MI.getOperand(Op+1);
130 const MachineOperand &IndexReg = MI.getOperand(Op+2);
131 const MachineOperand &Disp = MI.getOperand(Op+3);
133 // Is a SIB byte needed?
134 if (IndexReg.getReg() == 0 && BaseReg.getReg() != X86::ESP) {
135 if (BaseReg.getReg() == 0) { // Just a displacement?
136 // Emit special case [disp32] encoding
137 MCE.emitByte(ModRMByte(0, RegOpcodeField, 5));
138 emitConstant(Disp.getImmedValue(), 4);
140 unsigned BaseRegNo = getX86RegNum(BaseReg.getReg());
141 if (Disp.getImmedValue() == 0 && BaseRegNo != N86::EBP) {
142 // Emit simple indirect register encoding... [EAX] f.e.
143 MCE.emitByte(ModRMByte(0, RegOpcodeField, BaseRegNo));
144 } else if (isDisp8(Disp.getImmedValue())) {
145 // Emit the disp8 encoding... [REG+disp8]
146 MCE.emitByte(ModRMByte(1, RegOpcodeField, BaseRegNo));
147 emitConstant(Disp.getImmedValue(), 1);
149 // Emit the most general non-SIB encoding: [REG+disp32]
150 MCE.emitByte(ModRMByte(1, RegOpcodeField, BaseRegNo));
151 emitConstant(Disp.getImmedValue(), 4);
155 } else { // We need a SIB byte, so start by outputting the ModR/M byte first
156 assert(IndexReg.getReg() != X86::ESP && "Cannot use ESP as index reg!");
158 bool ForceDisp32 = false;
159 if (BaseReg.getReg() == 0) {
160 // If there is no base register, we emit the special case SIB byte with
161 // MOD=0, BASE=5, to JUST get the index, scale, and displacement.
162 MCE.emitByte(ModRMByte(0, RegOpcodeField, 4));
164 } else if (Disp.getImmedValue() == 0) {
165 // Emit no displacement ModR/M byte
166 MCE.emitByte(ModRMByte(0, RegOpcodeField, 4));
167 } else if (isDisp8(Disp.getImmedValue())) {
168 // Emit the disp8 encoding...
169 MCE.emitByte(ModRMByte(1, RegOpcodeField, 4));
171 // Emit the normal disp32 encoding...
172 MCE.emitByte(ModRMByte(2, RegOpcodeField, 4));
175 // Calculate what the SS field value should be...
176 static const unsigned SSTable[] = { ~0, 0, 1, ~0, 2, ~0, ~0, ~0, 3 };
177 unsigned SS = SSTable[Scale.getImmedValue()];
179 if (BaseReg.getReg() == 0) {
180 // Handle the SIB byte for the case where there is no base. The
181 // displacement has already been output.
182 assert(IndexReg.getReg() && "Index register must be specified!");
183 emitSIBByte(SS, getX86RegNum(IndexReg.getReg()), 5);
185 unsigned BaseRegNo = getX86RegNum(BaseReg.getReg());
186 unsigned IndexRegNo = getX86RegNum(IndexReg.getReg());
187 emitSIBByte(SS, IndexRegNo, BaseRegNo);
190 // Do we need to output a displacement?
191 if (Disp.getImmedValue() != 0 || ForceDisp32) {
192 if (!ForceDisp32 && isDisp8(Disp.getImmedValue()))
193 emitConstant(Disp.getImmedValue(), 1);
195 emitConstant(Disp.getImmedValue(), 4);
200 static bool isImmediate(const MachineOperand &MO) {
201 return MO.getType() == MachineOperand::MO_SignExtendedImmed ||
202 MO.getType() == MachineOperand::MO_UnextendedImmed;
205 void Emitter::emitInstruction(MachineInstr &MI) {
206 unsigned Opcode = MI.getOpcode();
207 const MachineInstrDescriptor &Desc = II.get(Opcode);
209 // Emit instruction prefixes if neccesary
210 if (Desc.TSFlags & X86II::OpSize) MCE.emitByte(0x66);// Operand size...
211 if (Desc.TSFlags & X86II::TB) MCE.emitByte(0x0F);// Two-byte opcode prefix
213 unsigned char BaseOpcode = II.getBaseOpcodeFor(Opcode);
214 switch (Desc.TSFlags & X86II::FormMask) {
216 MCE.emitByte(BaseOpcode);
218 if (MI.getNumOperands() == 1) {
219 assert(MI.getOperand(0).getType() == MachineOperand::MO_PCRelativeDisp);
220 MCE.emitPCRelativeDisp(MI.getOperand(0).getVRegValue());
223 case X86II::AddRegFrm:
224 MCE.emitByte(BaseOpcode + getX86RegNum(MI.getOperand(0).getReg()));
225 if (MI.getNumOperands() == 2) {
227 emitConstant(MI.getOperand(1).getImmedValue(), Size);
230 case X86II::MRMDestReg:
231 MCE.emitByte(BaseOpcode);
232 emitRegModRMByte(MI.getOperand(0).getReg(),
233 getX86RegNum(MI.getOperand(MI.getNumOperands()-1).getReg()));
235 case X86II::MRMDestMem:
236 MCE.emitByte(BaseOpcode);
237 emitMemModRMByte(MI, 0, getX86RegNum(MI.getOperand(4).getReg()));
239 case X86II::MRMSrcReg:
240 MCE.emitByte(BaseOpcode);
241 emitRegModRMByte(MI.getOperand(MI.getNumOperands()-1).getReg(),
242 getX86RegNum(MI.getOperand(0).getReg()));
244 case X86II::MRMSrcMem:
245 MCE.emitByte(BaseOpcode);
246 emitMemModRMByte(MI, MI.getNumOperands()-4,
247 getX86RegNum(MI.getOperand(0).getReg()));
250 case X86II::MRMS0r: case X86II::MRMS1r:
251 case X86II::MRMS2r: case X86II::MRMS3r:
252 case X86II::MRMS4r: case X86II::MRMS5r:
253 case X86II::MRMS6r: case X86II::MRMS7r:
254 MCE.emitByte(BaseOpcode);
255 emitRegModRMByte(MI.getOperand(0).getReg(),
256 (Desc.TSFlags & X86II::FormMask)-X86II::MRMS0r);
258 if (isImmediate(MI.getOperand(MI.getNumOperands()-1))) {
260 emitConstant(MI.getOperand(MI.getNumOperands()-1).getImmedValue(), Size);