1 //===-- X86InstComments.cpp - Generate verbose-asm comments for instrs ----===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This defines functionality used to emit comments about X86 instructions to
11 // an output stream for -fverbose-asm.
13 //===----------------------------------------------------------------------===//
15 #include "X86InstComments.h"
16 #include "MCTargetDesc/X86MCTargetDesc.h"
17 #include "Utils/X86ShuffleDecode.h"
18 #include "llvm/MC/MCInst.h"
19 #include "llvm/CodeGen/MachineValueType.h"
20 #include "llvm/Support/raw_ostream.h"
24 static unsigned getVectorRegSize(unsigned RegNo) {
26 if (X86::ZMM0 <= RegNo && RegNo <= X86::ZMM31)
28 if (X86::YMM0 <= RegNo && RegNo <= X86::YMM31)
30 if (X86::XMM0 <= RegNo && RegNo <= X86::XMM31)
33 llvm_unreachable("Unknown vector reg!");
37 static MVT getRegOperandVectorVT(const MCInst *MI, const MVT &ScalarVT,
38 unsigned OperandIndex) {
39 unsigned OpReg = MI->getOperand(OperandIndex).getReg();
40 return MVT::getVectorVT(ScalarVT,
41 getVectorRegSize(OpReg)/ScalarVT.getSizeInBits());
44 /// \brief Extracts the src/dst types for a given zero extension instruction.
45 /// \note While the number of elements in DstVT type correct, the
46 /// number in the SrcVT type is expanded to fill the src xmm register and the
47 /// upper elements may not be included in the dst xmm/ymm register.
48 static void getZeroExtensionTypes(const MCInst *MI, MVT &SrcVT, MVT &DstVT) {
49 switch (MI->getOpcode()) {
51 llvm_unreachable("Unknown zero extension instruction");
55 case X86::VPMOVZXBWrm:
56 case X86::VPMOVZXBWrr:
60 case X86::VPMOVZXBWYrm:
61 case X86::VPMOVZXBWYrr:
67 case X86::VPMOVZXBDrm:
68 case X86::VPMOVZXBDrr:
72 case X86::VPMOVZXBDYrm:
73 case X86::VPMOVZXBDYrr:
79 case X86::VPMOVZXBQrm:
80 case X86::VPMOVZXBQrr:
84 case X86::VPMOVZXBQYrm:
85 case X86::VPMOVZXBQYrr:
92 case X86::VPMOVZXWDrm:
93 case X86::VPMOVZXWDrr:
97 case X86::VPMOVZXWDYrm:
98 case X86::VPMOVZXWDYrr:
102 case X86::PMOVZXWQrm:
103 case X86::PMOVZXWQrr:
104 case X86::VPMOVZXWQrm:
105 case X86::VPMOVZXWQrr:
109 case X86::VPMOVZXWQYrm:
110 case X86::VPMOVZXWQYrr:
114 // i32 zero extension
115 case X86::PMOVZXDQrm:
116 case X86::PMOVZXDQrr:
117 case X86::VPMOVZXDQrm:
118 case X86::VPMOVZXDQrr:
122 case X86::VPMOVZXDQYrm:
123 case X86::VPMOVZXDQYrr:
130 #define CASE_MASK_INS_COMMON(Inst, Suffix, src) \
131 case X86::V##Inst##Suffix##src: \
132 case X86::V##Inst##Suffix##src##k: \
133 case X86::V##Inst##Suffix##src##kz:
135 #define CASE_SSE_INS_COMMON(Inst, src) \
138 #define CASE_AVX_INS_COMMON(Inst, Suffix, src) \
139 case X86::V##Inst##Suffix##src:
141 #define CASE_MOVDUP(Inst, src) \
142 CASE_MASK_INS_COMMON(Inst, Z, r##src) \
143 CASE_MASK_INS_COMMON(Inst, Z256, r##src) \
144 CASE_MASK_INS_COMMON(Inst, Z128, r##src) \
145 CASE_AVX_INS_COMMON(Inst, , r##src) \
146 CASE_AVX_INS_COMMON(Inst, Y, r##src) \
147 CASE_SSE_INS_COMMON(Inst, r##src) \
149 #define CASE_VSHUF(Inst, src) \
150 CASE_MASK_INS_COMMON(SHUFF##Inst, Z, r##src##i) \
151 CASE_MASK_INS_COMMON(SHUFI##Inst, Z, r##src##i) \
152 CASE_MASK_INS_COMMON(SHUFF##Inst, Z256, r##src##i) \
153 CASE_MASK_INS_COMMON(SHUFI##Inst, Z256, r##src##i) \
155 /// \brief Extracts the types and if it has memory operand for a given
156 /// (SHUFF32x4/SHUFF64x2/SHUFI32x4/SHUFI64x2) instruction.
157 static void getVSHUF64x2FamilyInfo(const MCInst *MI, MVT &VT, bool &HasMemOp) {
159 switch (MI->getOpcode()) {
161 llvm_unreachable("Unknown VSHUF64x2 family instructions.");
164 HasMemOp = true; // FALL THROUGH.
166 VT = getRegOperandVectorVT(MI, MVT::i64, 0);
169 HasMemOp = true; // FALL THROUGH.
171 VT = getRegOperandVectorVT(MI, MVT::i32, 0);
176 //===----------------------------------------------------------------------===//
177 // Top Level Entrypoint
178 //===----------------------------------------------------------------------===//
180 /// EmitAnyX86InstComments - This function decodes x86 instructions and prints
181 /// newline terminated strings to the specified string if desired. This
182 /// information is shown in disassembly dumps when verbose assembly is enabled.
183 bool llvm::EmitAnyX86InstComments(const MCInst *MI, raw_ostream &OS,
184 const char *(*getRegName)(unsigned)) {
185 // If this is a shuffle operation, the switch should fill in this state.
186 SmallVector<int, 8> ShuffleMask;
187 const char *DestName = nullptr, *Src1Name = nullptr, *Src2Name = nullptr;
189 switch (MI->getOpcode()) {
191 // Not an instruction for which we can decode comments.
194 case X86::BLENDPDrri:
195 case X86::VBLENDPDrri:
196 Src2Name = getRegName(MI->getOperand(2).getReg());
198 case X86::BLENDPDrmi:
199 case X86::VBLENDPDrmi:
200 if (MI->getOperand(MI->getNumOperands() - 1).isImm())
201 DecodeBLENDMask(MVT::v2f64,
202 MI->getOperand(MI->getNumOperands() - 1).getImm(),
204 Src1Name = getRegName(MI->getOperand(1).getReg());
205 DestName = getRegName(MI->getOperand(0).getReg());
207 case X86::VBLENDPDYrri:
208 Src2Name = getRegName(MI->getOperand(2).getReg());
210 case X86::VBLENDPDYrmi:
211 if (MI->getOperand(MI->getNumOperands() - 1).isImm())
212 DecodeBLENDMask(MVT::v4f64,
213 MI->getOperand(MI->getNumOperands() - 1).getImm(),
215 Src1Name = getRegName(MI->getOperand(1).getReg());
216 DestName = getRegName(MI->getOperand(0).getReg());
219 case X86::BLENDPSrri:
220 case X86::VBLENDPSrri:
221 Src2Name = getRegName(MI->getOperand(2).getReg());
223 case X86::BLENDPSrmi:
224 case X86::VBLENDPSrmi:
225 if (MI->getOperand(MI->getNumOperands() - 1).isImm())
226 DecodeBLENDMask(MVT::v4f32,
227 MI->getOperand(MI->getNumOperands() - 1).getImm(),
229 Src1Name = getRegName(MI->getOperand(1).getReg());
230 DestName = getRegName(MI->getOperand(0).getReg());
232 case X86::VBLENDPSYrri:
233 Src2Name = getRegName(MI->getOperand(2).getReg());
235 case X86::VBLENDPSYrmi:
236 if (MI->getOperand(MI->getNumOperands() - 1).isImm())
237 DecodeBLENDMask(MVT::v8f32,
238 MI->getOperand(MI->getNumOperands() - 1).getImm(),
240 Src1Name = getRegName(MI->getOperand(1).getReg());
241 DestName = getRegName(MI->getOperand(0).getReg());
244 case X86::PBLENDWrri:
245 case X86::VPBLENDWrri:
246 Src2Name = getRegName(MI->getOperand(2).getReg());
248 case X86::PBLENDWrmi:
249 case X86::VPBLENDWrmi:
250 if (MI->getOperand(MI->getNumOperands() - 1).isImm())
251 DecodeBLENDMask(MVT::v8i16,
252 MI->getOperand(MI->getNumOperands() - 1).getImm(),
254 Src1Name = getRegName(MI->getOperand(1).getReg());
255 DestName = getRegName(MI->getOperand(0).getReg());
257 case X86::VPBLENDWYrri:
258 Src2Name = getRegName(MI->getOperand(2).getReg());
260 case X86::VPBLENDWYrmi:
261 if (MI->getOperand(MI->getNumOperands() - 1).isImm())
262 DecodeBLENDMask(MVT::v16i16,
263 MI->getOperand(MI->getNumOperands() - 1).getImm(),
265 Src1Name = getRegName(MI->getOperand(1).getReg());
266 DestName = getRegName(MI->getOperand(0).getReg());
269 case X86::VPBLENDDrri:
270 Src2Name = getRegName(MI->getOperand(2).getReg());
272 case X86::VPBLENDDrmi:
273 if (MI->getOperand(MI->getNumOperands() - 1).isImm())
274 DecodeBLENDMask(MVT::v4i32,
275 MI->getOperand(MI->getNumOperands() - 1).getImm(),
277 Src1Name = getRegName(MI->getOperand(1).getReg());
278 DestName = getRegName(MI->getOperand(0).getReg());
281 case X86::VPBLENDDYrri:
282 Src2Name = getRegName(MI->getOperand(2).getReg());
284 case X86::VPBLENDDYrmi:
285 if (MI->getOperand(MI->getNumOperands() - 1).isImm())
286 DecodeBLENDMask(MVT::v8i32,
287 MI->getOperand(MI->getNumOperands() - 1).getImm(),
289 Src1Name = getRegName(MI->getOperand(1).getReg());
290 DestName = getRegName(MI->getOperand(0).getReg());
293 case X86::INSERTPSrr:
294 case X86::VINSERTPSrr:
295 Src2Name = getRegName(MI->getOperand(2).getReg());
297 case X86::INSERTPSrm:
298 case X86::VINSERTPSrm:
299 DestName = getRegName(MI->getOperand(0).getReg());
300 Src1Name = getRegName(MI->getOperand(1).getReg());
301 if (MI->getOperand(MI->getNumOperands() - 1).isImm())
302 DecodeINSERTPSMask(MI->getOperand(MI->getNumOperands() - 1).getImm(),
307 case X86::VMOVLHPSrr:
308 Src2Name = getRegName(MI->getOperand(2).getReg());
309 Src1Name = getRegName(MI->getOperand(1).getReg());
310 DestName = getRegName(MI->getOperand(0).getReg());
311 DecodeMOVLHPSMask(2, ShuffleMask);
315 case X86::VMOVHLPSrr:
316 Src2Name = getRegName(MI->getOperand(2).getReg());
317 Src1Name = getRegName(MI->getOperand(1).getReg());
318 DestName = getRegName(MI->getOperand(0).getReg());
319 DecodeMOVHLPSMask(2, ShuffleMask);
321 CASE_MOVDUP(MOVSLDUP, r)
322 Src1Name = getRegName(MI->getOperand(MI->getNumOperands() - 1).getReg());
324 CASE_MOVDUP(MOVSLDUP, m) {
325 MVT VT = getRegOperandVectorVT(MI, MVT::f32, 0);
326 DestName = getRegName(MI->getOperand(0).getReg());
327 DecodeMOVSLDUPMask(VT, ShuffleMask);
330 CASE_MOVDUP(MOVSHDUP, r)
331 Src1Name = getRegName(MI->getOperand(MI->getNumOperands() - 1).getReg());
333 CASE_MOVDUP(MOVSHDUP, m) {
334 MVT VT = getRegOperandVectorVT(MI, MVT::f32, 0);
335 DestName = getRegName(MI->getOperand(0).getReg());
336 DecodeMOVSHDUPMask(VT, ShuffleMask);
339 case X86::VMOVDDUPYrr:
340 Src1Name = getRegName(MI->getOperand(1).getReg());
342 case X86::VMOVDDUPYrm:
343 DestName = getRegName(MI->getOperand(0).getReg());
344 DecodeMOVDDUPMask(MVT::v4f64, ShuffleMask);
348 case X86::VMOVDDUPrr:
349 Src1Name = getRegName(MI->getOperand(1).getReg());
352 case X86::VMOVDDUPrm:
353 DestName = getRegName(MI->getOperand(0).getReg());
354 DecodeMOVDDUPMask(MVT::v2f64, ShuffleMask);
359 Src1Name = getRegName(MI->getOperand(1).getReg());
360 DestName = getRegName(MI->getOperand(0).getReg());
361 if (MI->getOperand(MI->getNumOperands() - 1).isImm())
362 DecodePSLLDQMask(MVT::v16i8,
363 MI->getOperand(MI->getNumOperands() - 1).getImm(),
367 case X86::VPSLLDQYri:
368 Src1Name = getRegName(MI->getOperand(1).getReg());
369 DestName = getRegName(MI->getOperand(0).getReg());
370 if (MI->getOperand(MI->getNumOperands() - 1).isImm())
371 DecodePSLLDQMask(MVT::v32i8,
372 MI->getOperand(MI->getNumOperands() - 1).getImm(),
378 Src1Name = getRegName(MI->getOperand(1).getReg());
379 DestName = getRegName(MI->getOperand(0).getReg());
380 if (MI->getOperand(MI->getNumOperands() - 1).isImm())
381 DecodePSRLDQMask(MVT::v16i8,
382 MI->getOperand(MI->getNumOperands() - 1).getImm(),
386 case X86::VPSRLDQYri:
387 Src1Name = getRegName(MI->getOperand(1).getReg());
388 DestName = getRegName(MI->getOperand(0).getReg());
389 if (MI->getOperand(MI->getNumOperands() - 1).isImm())
390 DecodePSRLDQMask(MVT::v32i8,
391 MI->getOperand(MI->getNumOperands() - 1).getImm(),
395 case X86::PALIGNR128rr:
396 case X86::VPALIGNR128rr:
397 Src1Name = getRegName(MI->getOperand(2).getReg());
399 case X86::PALIGNR128rm:
400 case X86::VPALIGNR128rm:
401 Src2Name = getRegName(MI->getOperand(1).getReg());
402 DestName = getRegName(MI->getOperand(0).getReg());
403 if (MI->getOperand(MI->getNumOperands() - 1).isImm())
404 DecodePALIGNRMask(MVT::v16i8,
405 MI->getOperand(MI->getNumOperands() - 1).getImm(),
408 case X86::VPALIGNR256rr:
409 Src1Name = getRegName(MI->getOperand(2).getReg());
411 case X86::VPALIGNR256rm:
412 Src2Name = getRegName(MI->getOperand(1).getReg());
413 DestName = getRegName(MI->getOperand(0).getReg());
414 if (MI->getOperand(MI->getNumOperands() - 1).isImm())
415 DecodePALIGNRMask(MVT::v32i8,
416 MI->getOperand(MI->getNumOperands() - 1).getImm(),
422 Src1Name = getRegName(MI->getOperand(1).getReg());
426 DestName = getRegName(MI->getOperand(0).getReg());
427 if (MI->getOperand(MI->getNumOperands() - 1).isImm())
428 DecodePSHUFMask(MVT::v4i32,
429 MI->getOperand(MI->getNumOperands() - 1).getImm(),
432 case X86::VPSHUFDYri:
433 Src1Name = getRegName(MI->getOperand(1).getReg());
435 case X86::VPSHUFDYmi:
436 DestName = getRegName(MI->getOperand(0).getReg());
437 if (MI->getOperand(MI->getNumOperands() - 1).isImm())
438 DecodePSHUFMask(MVT::v8i32,
439 MI->getOperand(MI->getNumOperands() - 1).getImm(),
444 case X86::VPSHUFHWri:
445 Src1Name = getRegName(MI->getOperand(1).getReg());
448 case X86::VPSHUFHWmi:
449 DestName = getRegName(MI->getOperand(0).getReg());
450 if (MI->getOperand(MI->getNumOperands() - 1).isImm())
451 DecodePSHUFHWMask(MVT::v8i16,
452 MI->getOperand(MI->getNumOperands() - 1).getImm(),
455 case X86::VPSHUFHWYri:
456 Src1Name = getRegName(MI->getOperand(1).getReg());
458 case X86::VPSHUFHWYmi:
459 DestName = getRegName(MI->getOperand(0).getReg());
460 if (MI->getOperand(MI->getNumOperands() - 1).isImm())
461 DecodePSHUFHWMask(MVT::v16i16,
462 MI->getOperand(MI->getNumOperands() - 1).getImm(),
466 case X86::VPSHUFLWri:
467 Src1Name = getRegName(MI->getOperand(1).getReg());
470 case X86::VPSHUFLWmi:
471 DestName = getRegName(MI->getOperand(0).getReg());
472 if (MI->getOperand(MI->getNumOperands() - 1).isImm())
473 DecodePSHUFLWMask(MVT::v8i16,
474 MI->getOperand(MI->getNumOperands() - 1).getImm(),
477 case X86::VPSHUFLWYri:
478 Src1Name = getRegName(MI->getOperand(1).getReg());
480 case X86::VPSHUFLWYmi:
481 DestName = getRegName(MI->getOperand(0).getReg());
482 if (MI->getOperand(MI->getNumOperands() - 1).isImm())
483 DecodePSHUFLWMask(MVT::v16i16,
484 MI->getOperand(MI->getNumOperands() - 1).getImm(),
488 case X86::MMX_PSHUFWri:
489 Src1Name = getRegName(MI->getOperand(1).getReg());
491 case X86::MMX_PSHUFWmi:
492 DestName = getRegName(MI->getOperand(0).getReg());
493 if (MI->getOperand(MI->getNumOperands() - 1).isImm())
494 DecodePSHUFMask(MVT::v4i16,
495 MI->getOperand(MI->getNumOperands() - 1).getImm(),
500 Src1Name = getRegName(MI->getOperand(1).getReg());
503 DestName = getRegName(MI->getOperand(0).getReg());
504 DecodePSWAPMask(MVT::v2i32, ShuffleMask);
507 case X86::MMX_PUNPCKHBWirr:
508 Src2Name = getRegName(MI->getOperand(2).getReg());
509 case X86::MMX_PUNPCKHBWirm:
510 Src1Name = getRegName(MI->getOperand(1).getReg());
511 DestName = getRegName(MI->getOperand(0).getReg());
512 DecodeUNPCKHMask(MVT::v8i8, ShuffleMask);
514 case X86::MMX_PUNPCKHWDirr:
515 Src2Name = getRegName(MI->getOperand(2).getReg());
516 case X86::MMX_PUNPCKHWDirm:
517 Src1Name = getRegName(MI->getOperand(1).getReg());
518 DestName = getRegName(MI->getOperand(0).getReg());
519 DecodeUNPCKHMask(MVT::v4i16, ShuffleMask);
521 case X86::MMX_PUNPCKHDQirr:
522 Src2Name = getRegName(MI->getOperand(2).getReg());
523 case X86::MMX_PUNPCKHDQirm:
524 Src1Name = getRegName(MI->getOperand(1).getReg());
525 DestName = getRegName(MI->getOperand(0).getReg());
526 DecodeUNPCKHMask(MVT::v2i32, ShuffleMask);
528 case X86::PUNPCKHBWrr:
529 case X86::VPUNPCKHBWrr:
530 Src2Name = getRegName(MI->getOperand(2).getReg());
532 case X86::PUNPCKHBWrm:
533 case X86::VPUNPCKHBWrm:
534 Src1Name = getRegName(MI->getOperand(1).getReg());
535 DestName = getRegName(MI->getOperand(0).getReg());
536 DecodeUNPCKHMask(MVT::v16i8, ShuffleMask);
538 case X86::VPUNPCKHBWYrr:
539 Src2Name = getRegName(MI->getOperand(2).getReg());
541 case X86::VPUNPCKHBWYrm:
542 Src1Name = getRegName(MI->getOperand(1).getReg());
543 DestName = getRegName(MI->getOperand(0).getReg());
544 DecodeUNPCKHMask(MVT::v32i8, ShuffleMask);
546 case X86::PUNPCKHWDrr:
547 case X86::VPUNPCKHWDrr:
548 Src2Name = getRegName(MI->getOperand(2).getReg());
550 case X86::PUNPCKHWDrm:
551 case X86::VPUNPCKHWDrm:
552 Src1Name = getRegName(MI->getOperand(1).getReg());
553 DestName = getRegName(MI->getOperand(0).getReg());
554 DecodeUNPCKHMask(MVT::v8i16, ShuffleMask);
556 case X86::VPUNPCKHWDYrr:
557 Src2Name = getRegName(MI->getOperand(2).getReg());
559 case X86::VPUNPCKHWDYrm:
560 Src1Name = getRegName(MI->getOperand(1).getReg());
561 DestName = getRegName(MI->getOperand(0).getReg());
562 DecodeUNPCKHMask(MVT::v16i16, ShuffleMask);
564 case X86::PUNPCKHDQrr:
565 case X86::VPUNPCKHDQrr:
566 Src2Name = getRegName(MI->getOperand(2).getReg());
568 case X86::PUNPCKHDQrm:
569 case X86::VPUNPCKHDQrm:
570 Src1Name = getRegName(MI->getOperand(1).getReg());
571 DestName = getRegName(MI->getOperand(0).getReg());
572 DecodeUNPCKHMask(MVT::v4i32, ShuffleMask);
574 case X86::VPUNPCKHDQYrr:
575 Src2Name = getRegName(MI->getOperand(2).getReg());
577 case X86::VPUNPCKHDQYrm:
578 Src1Name = getRegName(MI->getOperand(1).getReg());
579 DestName = getRegName(MI->getOperand(0).getReg());
580 DecodeUNPCKHMask(MVT::v8i32, ShuffleMask);
582 case X86::VPUNPCKHDQZrr:
583 Src2Name = getRegName(MI->getOperand(2).getReg());
585 case X86::VPUNPCKHDQZrm:
586 Src1Name = getRegName(MI->getOperand(1).getReg());
587 DestName = getRegName(MI->getOperand(0).getReg());
588 DecodeUNPCKHMask(MVT::v16i32, ShuffleMask);
590 case X86::PUNPCKHQDQrr:
591 case X86::VPUNPCKHQDQrr:
592 Src2Name = getRegName(MI->getOperand(2).getReg());
594 case X86::PUNPCKHQDQrm:
595 case X86::VPUNPCKHQDQrm:
596 Src1Name = getRegName(MI->getOperand(1).getReg());
597 DestName = getRegName(MI->getOperand(0).getReg());
598 DecodeUNPCKHMask(MVT::v2i64, ShuffleMask);
600 case X86::VPUNPCKHQDQYrr:
601 Src2Name = getRegName(MI->getOperand(2).getReg());
603 case X86::VPUNPCKHQDQYrm:
604 Src1Name = getRegName(MI->getOperand(1).getReg());
605 DestName = getRegName(MI->getOperand(0).getReg());
606 DecodeUNPCKHMask(MVT::v4i64, ShuffleMask);
608 case X86::VPUNPCKHQDQZrr:
609 Src2Name = getRegName(MI->getOperand(2).getReg());
611 case X86::VPUNPCKHQDQZrm:
612 Src1Name = getRegName(MI->getOperand(1).getReg());
613 DestName = getRegName(MI->getOperand(0).getReg());
614 DecodeUNPCKHMask(MVT::v8i64, ShuffleMask);
617 case X86::MMX_PUNPCKLBWirr:
618 Src2Name = getRegName(MI->getOperand(2).getReg());
619 case X86::MMX_PUNPCKLBWirm:
620 Src1Name = getRegName(MI->getOperand(1).getReg());
621 DestName = getRegName(MI->getOperand(0).getReg());
622 DecodeUNPCKLMask(MVT::v8i8, ShuffleMask);
624 case X86::MMX_PUNPCKLWDirr:
625 Src2Name = getRegName(MI->getOperand(2).getReg());
626 case X86::MMX_PUNPCKLWDirm:
627 Src1Name = getRegName(MI->getOperand(1).getReg());
628 DestName = getRegName(MI->getOperand(0).getReg());
629 DecodeUNPCKLMask(MVT::v4i16, ShuffleMask);
631 case X86::MMX_PUNPCKLDQirr:
632 Src2Name = getRegName(MI->getOperand(2).getReg());
633 case X86::MMX_PUNPCKLDQirm:
634 Src1Name = getRegName(MI->getOperand(1).getReg());
635 DestName = getRegName(MI->getOperand(0).getReg());
636 DecodeUNPCKLMask(MVT::v2i32, ShuffleMask);
638 case X86::PUNPCKLBWrr:
639 case X86::VPUNPCKLBWrr:
640 Src2Name = getRegName(MI->getOperand(2).getReg());
642 case X86::PUNPCKLBWrm:
643 case X86::VPUNPCKLBWrm:
644 Src1Name = getRegName(MI->getOperand(1).getReg());
645 DestName = getRegName(MI->getOperand(0).getReg());
646 DecodeUNPCKLMask(MVT::v16i8, ShuffleMask);
648 case X86::VPUNPCKLBWYrr:
649 Src2Name = getRegName(MI->getOperand(2).getReg());
651 case X86::VPUNPCKLBWYrm:
652 Src1Name = getRegName(MI->getOperand(1).getReg());
653 DestName = getRegName(MI->getOperand(0).getReg());
654 DecodeUNPCKLMask(MVT::v32i8, ShuffleMask);
656 case X86::PUNPCKLWDrr:
657 case X86::VPUNPCKLWDrr:
658 Src2Name = getRegName(MI->getOperand(2).getReg());
660 case X86::PUNPCKLWDrm:
661 case X86::VPUNPCKLWDrm:
662 Src1Name = getRegName(MI->getOperand(1).getReg());
663 DestName = getRegName(MI->getOperand(0).getReg());
664 DecodeUNPCKLMask(MVT::v8i16, ShuffleMask);
666 case X86::VPUNPCKLWDYrr:
667 Src2Name = getRegName(MI->getOperand(2).getReg());
669 case X86::VPUNPCKLWDYrm:
670 Src1Name = getRegName(MI->getOperand(1).getReg());
671 DestName = getRegName(MI->getOperand(0).getReg());
672 DecodeUNPCKLMask(MVT::v16i16, ShuffleMask);
674 case X86::PUNPCKLDQrr:
675 case X86::VPUNPCKLDQrr:
676 Src2Name = getRegName(MI->getOperand(2).getReg());
678 case X86::PUNPCKLDQrm:
679 case X86::VPUNPCKLDQrm:
680 Src1Name = getRegName(MI->getOperand(1).getReg());
681 DestName = getRegName(MI->getOperand(0).getReg());
682 DecodeUNPCKLMask(MVT::v4i32, ShuffleMask);
684 case X86::VPUNPCKLDQYrr:
685 Src2Name = getRegName(MI->getOperand(2).getReg());
687 case X86::VPUNPCKLDQYrm:
688 Src1Name = getRegName(MI->getOperand(1).getReg());
689 DestName = getRegName(MI->getOperand(0).getReg());
690 DecodeUNPCKLMask(MVT::v8i32, ShuffleMask);
692 case X86::VPUNPCKLDQZrr:
693 Src2Name = getRegName(MI->getOperand(2).getReg());
695 case X86::VPUNPCKLDQZrm:
696 Src1Name = getRegName(MI->getOperand(1).getReg());
697 DestName = getRegName(MI->getOperand(0).getReg());
698 DecodeUNPCKLMask(MVT::v16i32, ShuffleMask);
700 case X86::PUNPCKLQDQrr:
701 case X86::VPUNPCKLQDQrr:
702 Src2Name = getRegName(MI->getOperand(2).getReg());
704 case X86::PUNPCKLQDQrm:
705 case X86::VPUNPCKLQDQrm:
706 Src1Name = getRegName(MI->getOperand(1).getReg());
707 DestName = getRegName(MI->getOperand(0).getReg());
708 DecodeUNPCKLMask(MVT::v2i64, ShuffleMask);
710 case X86::VPUNPCKLQDQYrr:
711 Src2Name = getRegName(MI->getOperand(2).getReg());
713 case X86::VPUNPCKLQDQYrm:
714 Src1Name = getRegName(MI->getOperand(1).getReg());
715 DestName = getRegName(MI->getOperand(0).getReg());
716 DecodeUNPCKLMask(MVT::v4i64, ShuffleMask);
718 case X86::VPUNPCKLQDQZrr:
719 Src2Name = getRegName(MI->getOperand(2).getReg());
721 case X86::VPUNPCKLQDQZrm:
722 Src1Name = getRegName(MI->getOperand(1).getReg());
723 DestName = getRegName(MI->getOperand(0).getReg());
724 DecodeUNPCKLMask(MVT::v8i64, ShuffleMask);
728 case X86::VSHUFPDrri:
729 Src2Name = getRegName(MI->getOperand(2).getReg());
732 case X86::VSHUFPDrmi:
733 if (MI->getOperand(MI->getNumOperands() - 1).isImm())
734 DecodeSHUFPMask(MVT::v2f64,
735 MI->getOperand(MI->getNumOperands() - 1).getImm(),
737 Src1Name = getRegName(MI->getOperand(1).getReg());
738 DestName = getRegName(MI->getOperand(0).getReg());
740 case X86::VSHUFPDYrri:
741 Src2Name = getRegName(MI->getOperand(2).getReg());
743 case X86::VSHUFPDYrmi:
744 if (MI->getOperand(MI->getNumOperands() - 1).isImm())
745 DecodeSHUFPMask(MVT::v4f64,
746 MI->getOperand(MI->getNumOperands() - 1).getImm(),
748 Src1Name = getRegName(MI->getOperand(1).getReg());
749 DestName = getRegName(MI->getOperand(0).getReg());
753 case X86::VSHUFPSrri:
754 Src2Name = getRegName(MI->getOperand(2).getReg());
757 case X86::VSHUFPSrmi:
758 if (MI->getOperand(MI->getNumOperands() - 1).isImm())
759 DecodeSHUFPMask(MVT::v4f32,
760 MI->getOperand(MI->getNumOperands() - 1).getImm(),
762 Src1Name = getRegName(MI->getOperand(1).getReg());
763 DestName = getRegName(MI->getOperand(0).getReg());
765 case X86::VSHUFPSYrri:
766 Src2Name = getRegName(MI->getOperand(2).getReg());
768 case X86::VSHUFPSYrmi:
769 if (MI->getOperand(MI->getNumOperands() - 1).isImm())
770 DecodeSHUFPMask(MVT::v8f32,
771 MI->getOperand(MI->getNumOperands() - 1).getImm(),
773 Src1Name = getRegName(MI->getOperand(1).getReg());
774 DestName = getRegName(MI->getOperand(0).getReg());
779 CASE_VSHUF(32X4, m) {
782 unsigned NumOp = MI->getNumOperands();
783 getVSHUF64x2FamilyInfo(MI, VT, HasMemOp);
784 decodeVSHUF64x2FamilyMask(VT, MI->getOperand(NumOp - 1).getImm(),
786 DestName = getRegName(MI->getOperand(0).getReg());
788 assert((NumOp >= 8) && "Expected at least 8 operands!");
789 Src1Name = getRegName(MI->getOperand(NumOp - 7).getReg());
791 assert((NumOp >= 4) && "Expected at least 4 operands!");
792 Src2Name = getRegName(MI->getOperand(NumOp - 2).getReg());
793 Src1Name = getRegName(MI->getOperand(NumOp - 3).getReg());
797 case X86::UNPCKLPDrr:
798 case X86::VUNPCKLPDrr:
799 Src2Name = getRegName(MI->getOperand(2).getReg());
801 case X86::UNPCKLPDrm:
802 case X86::VUNPCKLPDrm:
803 DecodeUNPCKLMask(MVT::v2f64, ShuffleMask);
804 Src1Name = getRegName(MI->getOperand(1).getReg());
805 DestName = getRegName(MI->getOperand(0).getReg());
807 case X86::VUNPCKLPDYrr:
808 Src2Name = getRegName(MI->getOperand(2).getReg());
810 case X86::VUNPCKLPDYrm:
811 DecodeUNPCKLMask(MVT::v4f64, ShuffleMask);
812 Src1Name = getRegName(MI->getOperand(1).getReg());
813 DestName = getRegName(MI->getOperand(0).getReg());
815 case X86::VUNPCKLPDZrr:
816 Src2Name = getRegName(MI->getOperand(2).getReg());
818 case X86::VUNPCKLPDZrm:
819 DecodeUNPCKLMask(MVT::v8f64, ShuffleMask);
820 Src1Name = getRegName(MI->getOperand(1).getReg());
821 DestName = getRegName(MI->getOperand(0).getReg());
823 case X86::UNPCKLPSrr:
824 case X86::VUNPCKLPSrr:
825 Src2Name = getRegName(MI->getOperand(2).getReg());
827 case X86::UNPCKLPSrm:
828 case X86::VUNPCKLPSrm:
829 DecodeUNPCKLMask(MVT::v4f32, ShuffleMask);
830 Src1Name = getRegName(MI->getOperand(1).getReg());
831 DestName = getRegName(MI->getOperand(0).getReg());
833 case X86::VUNPCKLPSYrr:
834 Src2Name = getRegName(MI->getOperand(2).getReg());
836 case X86::VUNPCKLPSYrm:
837 DecodeUNPCKLMask(MVT::v8f32, ShuffleMask);
838 Src1Name = getRegName(MI->getOperand(1).getReg());
839 DestName = getRegName(MI->getOperand(0).getReg());
841 case X86::VUNPCKLPSZrr:
842 Src2Name = getRegName(MI->getOperand(2).getReg());
844 case X86::VUNPCKLPSZrm:
845 DecodeUNPCKLMask(MVT::v16f32, ShuffleMask);
846 Src1Name = getRegName(MI->getOperand(1).getReg());
847 DestName = getRegName(MI->getOperand(0).getReg());
849 case X86::UNPCKHPDrr:
850 case X86::VUNPCKHPDrr:
851 Src2Name = getRegName(MI->getOperand(2).getReg());
853 case X86::UNPCKHPDrm:
854 case X86::VUNPCKHPDrm:
855 DecodeUNPCKHMask(MVT::v2f64, ShuffleMask);
856 Src1Name = getRegName(MI->getOperand(1).getReg());
857 DestName = getRegName(MI->getOperand(0).getReg());
859 case X86::VUNPCKHPDYrr:
860 Src2Name = getRegName(MI->getOperand(2).getReg());
862 case X86::VUNPCKHPDYrm:
863 DecodeUNPCKHMask(MVT::v4f64, ShuffleMask);
864 Src1Name = getRegName(MI->getOperand(1).getReg());
865 DestName = getRegName(MI->getOperand(0).getReg());
867 case X86::VUNPCKHPDZrr:
868 Src2Name = getRegName(MI->getOperand(2).getReg());
870 case X86::VUNPCKHPDZrm:
871 DecodeUNPCKHMask(MVT::v8f64, ShuffleMask);
872 Src1Name = getRegName(MI->getOperand(1).getReg());
873 DestName = getRegName(MI->getOperand(0).getReg());
875 case X86::UNPCKHPSrr:
876 case X86::VUNPCKHPSrr:
877 Src2Name = getRegName(MI->getOperand(2).getReg());
879 case X86::UNPCKHPSrm:
880 case X86::VUNPCKHPSrm:
881 DecodeUNPCKHMask(MVT::v4f32, ShuffleMask);
882 Src1Name = getRegName(MI->getOperand(1).getReg());
883 DestName = getRegName(MI->getOperand(0).getReg());
885 case X86::VUNPCKHPSYrr:
886 Src2Name = getRegName(MI->getOperand(2).getReg());
888 case X86::VUNPCKHPSYrm:
889 DecodeUNPCKHMask(MVT::v8f32, ShuffleMask);
890 Src1Name = getRegName(MI->getOperand(1).getReg());
891 DestName = getRegName(MI->getOperand(0).getReg());
893 case X86::VUNPCKHPSZrr:
894 Src2Name = getRegName(MI->getOperand(2).getReg());
896 case X86::VUNPCKHPSZrm:
897 DecodeUNPCKHMask(MVT::v16f32, ShuffleMask);
898 Src1Name = getRegName(MI->getOperand(1).getReg());
899 DestName = getRegName(MI->getOperand(0).getReg());
901 case X86::VPERMILPSri:
902 Src1Name = getRegName(MI->getOperand(1).getReg());
904 case X86::VPERMILPSmi:
905 if (MI->getOperand(MI->getNumOperands() - 1).isImm())
906 DecodePSHUFMask(MVT::v4f32,
907 MI->getOperand(MI->getNumOperands() - 1).getImm(),
909 DestName = getRegName(MI->getOperand(0).getReg());
911 case X86::VPERMILPSYri:
912 Src1Name = getRegName(MI->getOperand(1).getReg());
914 case X86::VPERMILPSYmi:
915 if (MI->getOperand(MI->getNumOperands() - 1).isImm())
916 DecodePSHUFMask(MVT::v8f32,
917 MI->getOperand(MI->getNumOperands() - 1).getImm(),
919 DestName = getRegName(MI->getOperand(0).getReg());
921 case X86::VPERMILPDri:
922 Src1Name = getRegName(MI->getOperand(1).getReg());
924 case X86::VPERMILPDmi:
925 if (MI->getOperand(MI->getNumOperands() - 1).isImm())
926 DecodePSHUFMask(MVT::v2f64,
927 MI->getOperand(MI->getNumOperands() - 1).getImm(),
929 DestName = getRegName(MI->getOperand(0).getReg());
931 case X86::VPERMILPDYri:
932 Src1Name = getRegName(MI->getOperand(1).getReg());
934 case X86::VPERMILPDYmi:
935 if (MI->getOperand(MI->getNumOperands() - 1).isImm())
936 DecodePSHUFMask(MVT::v4f64,
937 MI->getOperand(MI->getNumOperands() - 1).getImm(),
939 DestName = getRegName(MI->getOperand(0).getReg());
941 case X86::VPERM2F128rr:
942 case X86::VPERM2I128rr:
943 Src2Name = getRegName(MI->getOperand(2).getReg());
945 case X86::VPERM2F128rm:
946 case X86::VPERM2I128rm:
947 // For instruction comments purpose, assume the 256-bit vector is v4i64.
948 if (MI->getOperand(MI->getNumOperands() - 1).isImm())
949 DecodeVPERM2X128Mask(MVT::v4i64,
950 MI->getOperand(MI->getNumOperands() - 1).getImm(),
952 Src1Name = getRegName(MI->getOperand(1).getReg());
953 DestName = getRegName(MI->getOperand(0).getReg());
956 case X86::VPERMPDYri:
957 Src1Name = getRegName(MI->getOperand(1).getReg());
960 case X86::VPERMPDYmi:
961 if (MI->getOperand(MI->getNumOperands() - 1).isImm())
962 DecodeVPERMMask(MI->getOperand(MI->getNumOperands() - 1).getImm(),
964 DestName = getRegName(MI->getOperand(0).getReg());
969 Src2Name = getRegName(MI->getOperand(2).getReg());
970 Src1Name = getRegName(MI->getOperand(1).getReg());
974 DecodeScalarMoveMask(MVT::v2f64, nullptr == Src2Name, ShuffleMask);
975 DestName = getRegName(MI->getOperand(0).getReg());
979 Src2Name = getRegName(MI->getOperand(2).getReg());
980 Src1Name = getRegName(MI->getOperand(1).getReg());
984 DecodeScalarMoveMask(MVT::v4f32, nullptr == Src2Name, ShuffleMask);
985 DestName = getRegName(MI->getOperand(0).getReg());
988 case X86::MOVPQI2QIrr:
989 case X86::MOVZPQILo2PQIrr:
990 case X86::VMOVPQI2QIrr:
991 case X86::VMOVZPQILo2PQIrr:
992 Src1Name = getRegName(MI->getOperand(1).getReg());
994 case X86::MOVQI2PQIrm:
995 case X86::MOVZQI2PQIrm:
996 case X86::MOVZPQILo2PQIrm:
997 case X86::VMOVQI2PQIrm:
998 case X86::VMOVZQI2PQIrm:
999 case X86::VMOVZPQILo2PQIrm:
1000 DecodeZeroMoveLowMask(MVT::v2i64, ShuffleMask);
1001 DestName = getRegName(MI->getOperand(0).getReg());
1003 case X86::MOVDI2PDIrm:
1004 case X86::VMOVDI2PDIrm:
1005 DecodeZeroMoveLowMask(MVT::v4i32, ShuffleMask);
1006 DestName = getRegName(MI->getOperand(0).getReg());
1010 if (MI->getOperand(2).isImm() &&
1011 MI->getOperand(3).isImm())
1012 DecodeEXTRQIMask(MI->getOperand(2).getImm(),
1013 MI->getOperand(3).getImm(),
1016 DestName = getRegName(MI->getOperand(0).getReg());
1017 Src1Name = getRegName(MI->getOperand(1).getReg());
1021 if (MI->getOperand(3).isImm() &&
1022 MI->getOperand(4).isImm())
1023 DecodeINSERTQIMask(MI->getOperand(3).getImm(),
1024 MI->getOperand(4).getImm(),
1027 DestName = getRegName(MI->getOperand(0).getReg());
1028 Src1Name = getRegName(MI->getOperand(1).getReg());
1029 Src2Name = getRegName(MI->getOperand(2).getReg());
1032 case X86::PMOVZXBWrr:
1033 case X86::PMOVZXBDrr:
1034 case X86::PMOVZXBQrr:
1035 case X86::PMOVZXWDrr:
1036 case X86::PMOVZXWQrr:
1037 case X86::PMOVZXDQrr:
1038 case X86::VPMOVZXBWrr:
1039 case X86::VPMOVZXBDrr:
1040 case X86::VPMOVZXBQrr:
1041 case X86::VPMOVZXWDrr:
1042 case X86::VPMOVZXWQrr:
1043 case X86::VPMOVZXDQrr:
1044 case X86::VPMOVZXBWYrr:
1045 case X86::VPMOVZXBDYrr:
1046 case X86::VPMOVZXBQYrr:
1047 case X86::VPMOVZXWDYrr:
1048 case X86::VPMOVZXWQYrr:
1049 case X86::VPMOVZXDQYrr:
1050 Src1Name = getRegName(MI->getOperand(1).getReg());
1052 case X86::PMOVZXBWrm:
1053 case X86::PMOVZXBDrm:
1054 case X86::PMOVZXBQrm:
1055 case X86::PMOVZXWDrm:
1056 case X86::PMOVZXWQrm:
1057 case X86::PMOVZXDQrm:
1058 case X86::VPMOVZXBWrm:
1059 case X86::VPMOVZXBDrm:
1060 case X86::VPMOVZXBQrm:
1061 case X86::VPMOVZXWDrm:
1062 case X86::VPMOVZXWQrm:
1063 case X86::VPMOVZXDQrm:
1064 case X86::VPMOVZXBWYrm:
1065 case X86::VPMOVZXBDYrm:
1066 case X86::VPMOVZXBQYrm:
1067 case X86::VPMOVZXWDYrm:
1068 case X86::VPMOVZXWQYrm:
1069 case X86::VPMOVZXDQYrm: {
1071 getZeroExtensionTypes(MI, SrcVT, DstVT);
1072 DecodeZeroExtendMask(SrcVT, DstVT, ShuffleMask);
1073 DestName = getRegName(MI->getOperand(0).getReg());
1077 // The only comments we decode are shuffles, so give up if we were unable to
1078 // decode a shuffle mask.
1079 if (ShuffleMask.empty())
1082 if (!DestName) DestName = Src1Name;
1083 OS << (DestName ? DestName : "mem") << " = ";
1085 // If the two sources are the same, canonicalize the input elements to be
1086 // from the first src so that we get larger element spans.
1087 if (Src1Name == Src2Name) {
1088 for (unsigned i = 0, e = ShuffleMask.size(); i != e; ++i) {
1089 if ((int)ShuffleMask[i] >= 0 && // Not sentinel.
1090 ShuffleMask[i] >= (int)e) // From second mask.
1091 ShuffleMask[i] -= e;
1095 // The shuffle mask specifies which elements of the src1/src2 fill in the
1096 // destination, with a few sentinel values. Loop through and print them
1098 for (unsigned i = 0, e = ShuffleMask.size(); i != e; ++i) {
1101 if (ShuffleMask[i] == SM_SentinelZero) {
1106 // Otherwise, it must come from src1 or src2. Print the span of elements
1107 // that comes from this src.
1108 bool isSrc1 = ShuffleMask[i] < (int)ShuffleMask.size();
1109 const char *SrcName = isSrc1 ? Src1Name : Src2Name;
1110 OS << (SrcName ? SrcName : "mem") << '[';
1111 bool IsFirst = true;
1112 while (i != e && (int)ShuffleMask[i] != SM_SentinelZero &&
1113 (ShuffleMask[i] < (int)ShuffleMask.size()) == isSrc1) {
1118 if (ShuffleMask[i] == SM_SentinelUndef)
1121 OS << ShuffleMask[i] % ShuffleMask.size();
1125 --i; // For loop increments element #.
1130 // We successfully added a comment to this instruction.