1 //===-- PPCSubtarget.h - Define Subtarget for the PPC ----------*- C++ -*--===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file declares the PowerPC specific subclass of TargetSubtargetInfo.
12 //===----------------------------------------------------------------------===//
14 #ifndef POWERPCSUBTARGET_H
15 #define POWERPCSUBTARGET_H
17 #include "PPCFrameLowering.h"
18 #include "llvm/ADT/Triple.h"
19 #include "llvm/IR/DataLayout.h"
20 #include "llvm/MC/MCInstrItineraries.h"
21 #include "llvm/Target/TargetSubtargetInfo.h"
24 #define GET_SUBTARGETINFO_HEADER
25 #include "PPCGenSubtargetInfo.inc"
27 // GCC #defines PPC on Linux but we use it as our namespace name
34 // -m directive values.
62 class PPCSubtarget : public PPCGenSubtargetInfo {
64 /// stackAlignment - The minimum alignment known to hold of the stack frame on
65 /// entry to the function and which must be maintained by every function.
66 unsigned StackAlignment;
68 /// Selected instruction itineraries (one entry per itinerary class.)
69 InstrItineraryData InstrItins;
71 /// Which cpu directive was used.
72 unsigned DarwinDirective;
74 /// Used by the ISel to turn in optimizations for POWER4-derived architectures
85 bool HasFRE, HasFRES, HasFRSQRTE, HasFRSQRTES;
97 bool HasLazyResolverStubs;
101 /// TargetTriple - What processor and OS we're targeting.
104 /// OptLevel - What default optimization level we're emitting code for.
105 CodeGenOpt::Level OptLevel;
107 PPCFrameLowering FrameLowering;
111 /// This constructor initializes the data members to match that
112 /// of the specified triple.
114 PPCSubtarget(const std::string &TT, const std::string &CPU,
115 const std::string &FS, bool is64Bit,
116 CodeGenOpt::Level OptLevel);
118 /// ParseSubtargetFeatures - Parses features string setting specified
119 /// subtarget options. Definition of function is auto generated by tblgen.
120 void ParseSubtargetFeatures(StringRef CPU, StringRef FS);
122 /// SetJITMode - This is called to inform the subtarget info that we are
123 /// producing code for the JIT.
126 /// getStackAlignment - Returns the minimum alignment known to hold of the
127 /// stack frame on entry to the function and which must be maintained by every
128 /// function for this subtarget.
129 unsigned getStackAlignment() const { return StackAlignment; }
131 /// getDarwinDirective - Returns the -m directive specified for the cpu.
133 unsigned getDarwinDirective() const { return DarwinDirective; }
135 /// getInstrItins - Return the instruction itineraies based on subtarget
137 const InstrItineraryData &getInstrItineraryData() const { return InstrItins; }
139 const PPCFrameLowering *getFrameLowering() const { return &FrameLowering; }
140 const DataLayout *getDataLayout() const { return &DL; }
142 /// initializeSubtargetDependencies - Initializes using a CPU and feature string
143 /// so that we can use initializer lists for subtarget initialization.
144 PPCSubtarget &initializeSubtargetDependencies(StringRef CPU, StringRef FS);
146 /// \brief Reset the features for the PowerPC target.
147 void resetSubtargetFeatures(const MachineFunction *MF) override;
149 void initializeEnvironment();
150 void resetSubtargetFeatures(StringRef CPU, StringRef FS);
153 /// isPPC64 - Return true if we are generating code for 64-bit pointer mode.
155 bool isPPC64() const { return IsPPC64; }
157 /// has64BitSupport - Return true if the selected CPU supports 64-bit
158 /// instructions, regardless of whether we are in 32-bit or 64-bit mode.
159 bool has64BitSupport() const { return Has64BitSupport; }
161 /// use64BitRegs - Return true if in 64-bit mode or if we should use 64-bit
162 /// registers in 32-bit mode when possible. This can only true if
163 /// has64BitSupport() returns true.
164 bool use64BitRegs() const { return Use64BitRegs; }
166 /// useCRBits - Return true if we should store and manipulate i1 values in
167 /// the individual condition register bits.
168 bool useCRBits() const { return UseCRBits; }
170 /// hasLazyResolverStub - Return true if accesses to the specified global have
171 /// to go through a dyld lazy resolution stub. This means that an extra load
172 /// is required to get the address of the global.
173 bool hasLazyResolverStub(const GlobalValue *GV,
174 const TargetMachine &TM) const;
176 // isJITCodeModel - True if we're generating code for the JIT
177 bool isJITCodeModel() const { return IsJITCodeModel; }
179 // isLittleEndian - True if generating little-endian code
180 bool isLittleEndian() const { return IsLittleEndian; }
182 // Specific obvious features.
183 bool hasFCPSGN() const { return HasFCPSGN; }
184 bool hasFSQRT() const { return HasFSQRT; }
185 bool hasFRE() const { return HasFRE; }
186 bool hasFRES() const { return HasFRES; }
187 bool hasFRSQRTE() const { return HasFRSQRTE; }
188 bool hasFRSQRTES() const { return HasFRSQRTES; }
189 bool hasRecipPrec() const { return HasRecipPrec; }
190 bool hasSTFIWX() const { return HasSTFIWX; }
191 bool hasLFIWAX() const { return HasLFIWAX; }
192 bool hasFPRND() const { return HasFPRND; }
193 bool hasFPCVT() const { return HasFPCVT; }
194 bool hasAltivec() const { return HasAltivec; }
195 bool hasQPX() const { return HasQPX; }
196 bool hasVSX() const { return HasVSX; }
197 bool hasMFOCRF() const { return HasMFOCRF; }
198 bool hasISEL() const { return HasISEL; }
199 bool hasPOPCNTD() const { return HasPOPCNTD; }
200 bool hasLDBRX() const { return HasLDBRX; }
201 bool isBookE() const { return IsBookE; }
202 bool isDeprecatedMFTB() const { return DeprecatedMFTB; }
203 bool isDeprecatedDST() const { return DeprecatedDST; }
205 const Triple &getTargetTriple() const { return TargetTriple; }
207 /// isDarwin - True if this is any darwin platform.
208 bool isDarwin() const { return TargetTriple.isMacOSX(); }
209 /// isBGQ - True if this is a BG/Q platform.
210 bool isBGQ() const { return TargetTriple.getVendor() == Triple::BGQ; }
212 bool isDarwinABI() const { return isDarwin(); }
213 bool isSVR4ABI() const { return !isDarwin(); }
215 /// enablePostRAScheduler - True at 'More' optimization.
216 bool enablePostRAScheduler(CodeGenOpt::Level OptLevel,
217 TargetSubtargetInfo::AntiDepBreakMode& Mode,
218 RegClassVector& CriticalPathRCs) const override;
220 bool enableEarlyIfConversion() const override { return hasISEL(); }
222 // Scheduling customization.
223 bool enableMachineScheduler() const override;
224 void overrideSchedPolicy(MachineSchedPolicy &Policy,
227 unsigned NumRegionInstrs) const override;
228 bool useAA() const override;
230 } // End llvm namespace