1 //===-- MipsSubtarget.cpp - Mips Subtarget Information --------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements the Mips specific subclass of TargetSubtargetInfo.
12 //===----------------------------------------------------------------------===//
14 #define DEBUG_TYPE "mips-subtarget"
16 #include "MipsMachineFunction.h"
18 #include "MipsRegisterInfo.h"
19 #include "MipsSubtarget.h"
20 #include "MipsTargetMachine.h"
21 #include "llvm/IR/Attributes.h"
22 #include "llvm/IR/Function.h"
23 #include "llvm/Support/CommandLine.h"
24 #include "llvm/Support/Debug.h"
25 #include "llvm/Support/TargetRegistry.h"
26 #include "llvm/Support/raw_ostream.h"
28 #define GET_SUBTARGETINFO_TARGET_DESC
29 #define GET_SUBTARGETINFO_CTOR
30 #include "MipsGenSubtargetInfo.inc"
35 // FIXME: Maybe this should be on by default when Mips16 is specified
37 static cl::opt<bool> Mixed16_32(
40 cl::desc("Allow for a mixture of Mips16 "
41 "and Mips32 code in a single source file"),
44 static cl::opt<bool> Mips_Os16(
47 cl::desc("Compile all functions that don' use "
48 "floating point as Mips 16"),
52 Mips16HardFloat("mips16-hard-float", cl::NotHidden,
53 cl::desc("MIPS: mips16 hard float enable."),
57 Mips16ConstantIslands(
58 "mips16-constant-islands", cl::NotHidden,
59 cl::desc("MIPS: mips16 constant islands enable."),
62 /// Select the Mips CPU for the given triple and cpu name.
63 /// FIXME: Merge with the copy in MipsMCTargetDesc.cpp
64 static inline StringRef selectMipsCPU(StringRef TT, StringRef CPU) {
67 if (TheTriple.getArch() == Triple::mips ||
68 TheTriple.getArch() == Triple::mipsel)
76 void MipsSubtarget::anchor() { }
78 MipsSubtarget::MipsSubtarget(const std::string &TT, const std::string &CPU,
79 const std::string &FS, bool little,
80 Reloc::Model _RM, MipsTargetMachine *_TM) :
81 MipsGenSubtargetInfo(TT, CPU, FS),
82 MipsArchVersion(Mips32), MipsABI(UnknownABI), IsLittle(little),
83 IsSingleFloat(false), IsFP64bit(false), IsGP64bit(false), HasVFPU(false),
84 IsLinux(true), HasSEInReg(false), HasCondMov(false), HasSwap(false),
85 HasBitCount(false), HasFPIdx(false),
86 InMips16Mode(false), InMips16HardFloat(Mips16HardFloat),
87 InMicroMipsMode(false), HasDSP(false), HasDSPR2(false),
88 AllowMixed16_32(Mixed16_32 | Mips_Os16), Os16(Mips_Os16), HasMSA(false),
89 RM(_RM), OverrideMode(NoOverride), TM(_TM), TargetTriple(TT)
91 std::string CPUName = CPU;
92 CPUName = selectMipsCPU(TT, CPUName);
94 // Parse features string.
95 ParseSubtargetFeatures(CPUName, FS);
97 if (InMips16Mode && !TM->Options.UseSoftFloat) {
98 // Hard float for mips16 means essentially to compile as soft float
99 // but to use a runtime library for soft float that is written with
100 // native mips32 floating point instructions (those runtime routines
101 // run in mips32 hard float mode).
102 TM->Options.UseSoftFloat = true;
103 TM->Options.FloatABIType = FloatABI::Soft;
104 InMips16HardFloat = true;
107 PreviousInMips16Mode = InMips16Mode;
109 // Initialize scheduling itinerary for the specified CPU.
110 InstrItins = getInstrItineraryForCPU(CPUName);
112 // Set MipsABI if it hasn't been set yet.
113 if (MipsABI == UnknownABI)
114 MipsABI = hasMips64() ? N64 : O32;
116 // Check if Architecture and ABI are compatible.
117 assert(((!hasMips64() && (isABI_O32() || isABI_EABI())) ||
118 (hasMips64() && (isABI_N32() || isABI_N64()))) &&
119 "Invalid Arch & ABI pair.");
121 if (hasMSA() && !isFP64bit())
122 report_fatal_error("MSA requires a 64-bit FPU register file (FR=1 mode). "
126 // Is the target system Linux ?
127 if (TT.find("linux") == std::string::npos)
130 // Set UseSmallSection.
131 UseSmallSection = !IsLinux && (RM == Reloc::Static);
132 // set some subtarget specific features
138 MipsSubtarget::enablePostRAScheduler(CodeGenOpt::Level OptLevel,
139 TargetSubtargetInfo::AntiDepBreakMode &Mode,
140 RegClassVector &CriticalPathRCs) const {
141 Mode = TargetSubtargetInfo::ANTIDEP_NONE;
142 CriticalPathRCs.clear();
143 CriticalPathRCs.push_back(hasMips64() ?
144 &Mips::GPR64RegClass : &Mips::GPR32RegClass);
145 return OptLevel >= CodeGenOpt::Aggressive;
148 //FIXME: This logic for reseting the subtarget along with
149 // the helper classes can probably be simplified but there are a lot of
150 // cases so we will defer rewriting this to later.
152 void MipsSubtarget::resetSubtarget(MachineFunction *MF) {
153 bool ChangeToMips16 = false, ChangeToNoMips16 = false;
154 DEBUG(dbgs() << "resetSubtargetFeatures" << "\n");
155 AttributeSet FnAttrs = MF->getFunction()->getAttributes();
156 ChangeToMips16 = FnAttrs.hasAttribute(AttributeSet::FunctionIndex,
158 ChangeToNoMips16 = FnAttrs.hasAttribute(AttributeSet::FunctionIndex,
160 assert (!(ChangeToMips16 & ChangeToNoMips16) &&
161 "mips16 and nomips16 specified on the same function");
162 if (ChangeToMips16) {
163 if (PreviousInMips16Mode)
165 OverrideMode = Mips16Override;
166 PreviousInMips16Mode = true;
167 TM->setHelperClassesMips16();
169 } else if (ChangeToNoMips16) {
170 if (!PreviousInMips16Mode)
172 OverrideMode = NoMips16Override;
173 PreviousInMips16Mode = false;
174 TM->setHelperClassesMipsSE();
177 if (OverrideMode == NoOverride)
179 OverrideMode = NoOverride;
180 DEBUG(dbgs() << "back to default" << "\n");
181 if (inMips16Mode() && !PreviousInMips16Mode) {
182 TM->setHelperClassesMips16();
183 PreviousInMips16Mode = true;
184 } else if (!inMips16Mode() && PreviousInMips16Mode) {
185 TM->setHelperClassesMipsSE();
186 PreviousInMips16Mode = false;
192 bool MipsSubtarget::mipsSEUsesSoftFloat() const {
193 return TM->Options.UseSoftFloat && !InMips16HardFloat;
196 bool MipsSubtarget::useConstantIslands() {
197 DEBUG(dbgs() << "use constant islands " << Mips16ConstantIslands << "\n");
198 return Mips16ConstantIslands;